我想表扬那些科学家、工程师、教授、作家、教师和学生，他们在过去 130 年里通过研究、实验、理论、分析、出版物和教科书，完美地解释了物质的行为方式、如何使用物质以及如何向下一代科学家解释物质。在此过程中，他们创造了一场电子革命。正如有人所说，我们正站在前人数千位天才的肩膀上前进。

I would like to recognize all those scientists, engineers, professors, authors, teachers, and also students who in the past 130 years with their research, experiments, theories, analysis, publications, and textbook have been able to explain beautifully how matter behaves, how to use it, and how to explain it to the next generation of scientists. In the process they created an electronic revolution. As someone already said, we are sailing on the shoulders of all those thousands of geniuses that preceded us.

我要感谢 Wiley 编辑们的努力和支持，他们使得文本更加易读、更加清晰。

I want to acknowledge the efforts and support of the Wiley editors who made the text more readable and clearer.

我要感谢我的家人，他们一直对我和我的项目给予帮助、鼓励和耐心。

I want to thank my family who have been always helpful, encouraging, and patient with me and my project.

最后，我想提到 Gerry Hanh 博士，他在阅读了我出于业余爱好撰写的前几章后，坚持让我将它们发送给 Wiley，才有了您现在手中的这本书。

Finally, I would like to mention Dr. Gerry Hanh, who upon reading the first chapters that I wrote as a hobby, insisted I send them to Wiley, resulting in the book you have now in your hands.

几年前，有人邀请我去巴塞罗那西北约 20 英里的 Terrassa 市的扶轮社做演讲。他们让我把演讲分为三个部分：15 分钟个人简介、15 分钟介绍我的技术工作，以及 15 分钟介绍 NASA。演讲的前 15 分钟和后 15 分钟进行得很顺利，但关于红外探测器工作原理的技术解释却令人失望。是的，他们确实了解红外探测器的用途和应用，以及我在 NASA 天文台的技术工作，但关于红外探测器工作原理的解释并不像我希望的那样清晰和具有指导意义。我当时和现在都坚信，任何受过教育的人都能理解半导体器件的工作原理。两年前的这次演讲是我开始写这本书的动机。

A couple of years ago, I was asked to give a talk to the Rotary club in Terrassa, a city about 20 miles northwest of Barcelona. They asked me to divide the talk into three parts: 15 minutes biographical, 15 minutes on my technical work, and 15 minutes about NASA. The first and last 15 minutes of the talk went well, but the technical explanation about how infrared detectors work was disappointing. Yes, they did understand the uses and applications of infrared detectors, my technical work with the astronomical observatories of NASA, but the explanation on how infrared detectors work was not as clear and instructive as I had hoped. I was then and I am now convinced that any educated person can understand how semiconductor devices work. This talk two years ago was my motivation to start writing this book.

半导体是几乎所有现代电子设备的基础。对许多人来说，半导体是一种神秘的材料，不知何故已经占领了现代电子产品。就像我们理解神和生物的概念，但半神却令人困惑一样，我们大多数人都知道导体（电流通过它）和绝缘体（它不流动）是什么，但半导体到底是什么？此外，用于制造半导体的普遍材料是纯硅，它是地球上第二常见的元素（28%），仅次于氧（47%）。为什么不使用铝（下一个常见元素）（8%），或者锶或其他一些奇特而更高级的材料？为什么我们使用半导体而不是导体？难道我们不希望电子在我们的设备中自由移动吗？

Semiconductors are the basis for almost all modern electronic devices. For many people semiconductors are a mysterious material that somehow has taken over modern electronics. In the same way that we understand the concept of god and creatures, but semi‐gods are confusing, most of us have an idea of what a conductor (electricity flows through it) and an insulator (it doesn’t) are, but what the heck is a semiconductor? Furthermore, the prevalent material used for fabricating semiconductors is pure silicon, the second most common element found on earth (28%) after oxygen (47%). Why not use aluminum, the next common element (8%), or strontium or some other exotic and more classy material? Why do we use semiconductors instead of conductors? Don’t we want electrons to move freely through our devices?

我试图以一种任何受过教育的人都能理解的方式解释半导体的工作原理。每一章都以一种定性的方式解释了这个主题，包括图画、照片、图表和非常简单的关系（我讨厌在这里使用“方程式”这个词）。在大多数章节的末尾，我都添加了附录，其中包含一些数学公式和相关方程式，供那些想更深入地研究这个主题的人参考。我不会试图证明这些方程式；我的目的不是正式向您介绍半导体的物理原理（有很多优秀的书籍都这样做），而只是展示结果是什么。在这本书中，您必须相信这些结果。

I attempt here to explain why and how semiconductors work in a form that any educated person can understand. Every chapter explains the subject in a qualitative way, with drawings, photographs, and figures, and very simple relationships (I hate to use the word “equations” here). At the end of most chapters I add appendices where I include some mathematical formulation with the relevant equations for those who would enjoy looking a little deeper into the subject. I do not try to proof these equations; my purpose is not formally present to you the physics of semiconductors (there are many excellent books that do that) but just to show what the results are. In this book you have to take these results on faith.

除非你对数学非常敏感，否则不要跳过附录。附录中有一些有趣的概念，可以加深对半导体工作原理的理解。别担心，每章末尾都没有问题，也没有建议测验。

Unless you are very allergic to math, do not skip the appendices. There are interesting concepts that amplify the understanding of how semiconductors work. Don’t worry; there are no problems at the end of each chapter and no suggested quizzes.

首先，我解释了什么是半导体、我们使用的不同类型以及它们与导体和绝缘体的区别。接下来，我将解释使用半导体材料可以构建的关键设备：二极管、无源元件和晶体管。我讨论了集成电路、如何构建它们以及更大的电子元件，最后讨论了我们对未来的期望（第15 章）。我打断了“理论”流程，用专门介绍应用的章节（第4、7和9章）来理解这些应用，只需使用我在前几章中介绍的概念即可。

First, I explain what a semiconductor is, the different types we use, and how they are different from conductors and insulators. Next, I explain the key devices that can be constructed using the semiconductor materials: diodes, passive element, and transistors. I talk about the integrated circuits, how we build them and the larger electronic components, and finally what can we expect in the future (Chapter 15). I interrupt the “theoretical” flow with chapters devoted to applications (Chapters 4, 7, and 9) that can be understood with just the concepts I have covered in the previous chapters.

本书可以用不同的方式来阅读。如果你有兴趣了解晶体管的工作原理，那么你应该连续阅读第1、2、3、5和8章。你不能跳过其中任何一个或以不同的顺序阅读它们，除非当然你已经熟悉了前面的一些主题。第 6 章解释了基本电气元件（电阻器、电容器和电感器），我们需要这些元件来了解如何构建有用的半导体电路。在介绍相关理论后，我会尝试讨论一些半导体应用。只要理解能级和能带的概念（第2 章和第 3 章），你就可以掌握红外探测器的工作原理（第 4 章）。你甚至不需要知道什么是电阻器或电容器。同样，在读完第 6 章之后，你可以了解可以用二极管制作的不同电路应用（第 7 章），在第 8 章之后，我会解释如何使用晶体管（第 9 章）。接下来的章节，集成电路制造（第 10 章）和逻辑电路（第 11 章），可以随时单独阅读，尽管了解晶体管的工作原理会有所帮助。是的，我谈论的是半导体器件，但您不需要知道它们如何工作的物理原理就可以理解这两章。

This book can be read in different ways. If you are interested in understanding how transistors work, then you should read, in succession, Chapters 1, 2, 3, 5, and 8. You cannot skip any of them or read them in a different order unless, of course, you are already familiar with some of the previous topics. Chapter 6 explains the basic electrical components (resistors, capacitors, and inductors) which we need to understand how we build useful semiconductor circuits. I try to discuss some of the semiconductor applications as soon as I cover the relevant theory. Just by understanding the concept of energy levels and energy bands (Chapters 2 and 3) you can grasp how infrared detectors work (Chapter 4). You do not even need to know what resistors or capacitors are. Similarly, after Chapter 6 you can understand the different circuit applications we can fabricate with diodes (Chapter 7) and after Chapter 8 I explain how we use transistors (Chapter 9). The next chapters, integrated circuit fabrication (Chapter 10) and logic circuits (Chapter 11), can be read separately at any time, although knowing how a transistor works will help. Yes, I talk about semiconductor devices, but you do not need to know the physics of how they work to understand these two chapters.

接下来，在第 12 章中，我将解释多路复用器和存储器等大型半导体元件。在第 13 章光电子学中，我将介绍激光器和 LED，并在第 14 章中讨论一些与计算机架构和液晶显示器相关的简单概念，以此作为本书的结尾。我在第 15 章中对未来进行了推测。

Next, in Chapter 12, I explain large semiconductor components like multiplexers and memories. In Chapter 13, optoelectronics, I cover lasers and LEDs, and I end the book by discussing some simple concepts related to computer architectures and liquid crystal displays in Chapter 14. I speculate about the future in Chapter 15.

本书的目的是向外行解释半导体的工作原理和使用方法。我希望我做到了。如果您有任何意见，或者发现错误、不一致、不清楚、不完整或令人困惑的图表或解释，请通过电子邮件告知我：semiconductorbasics@hotmail.com。

The objective of this book is to explain to the layman how semiconductors work and how they are used. I hope I have succeeded. If you have any comments or if you find errors, inconsistencies, unclear, incomplete or confusing figures or explanations, please let me know by emailing me at semiconductorbasics@hotmail.com.

我有一位教授教我相对论量子力学，这是我上过的最难的课程之一，他曾经说过，“一切数学都是微不足道的。”我同意他的观点，虽然不是 100%，但部分同意。事实是，我们让年轻学生相信数学、物理和工程很难，这让他们吓坏了。错了！数学并不难，物理及其所有衍生学科都很迷人。

I had a professor who taught me relativistic quantum mechanics, one of the hardest courses I ever took, who used to say, “Everything mathematical is trivial.” I agree with him, not 100%, but partially so. The truth is that we scare the hell out of young students by making them believe that mathematics, physics, and engineering are difficult. Wrong! Math is not difficult and physics, and all its derivatives, is fascinating.

1.1 正弦波

1.1 Sinusoidal Waves

在开始之前，我想先澄清一下定义波的术语（我将在接下来的几节中使用这些术语）以及这些术语之间的关系（见图1.1）。我们使用四个变量来定义任何正弦波：

Before I start, I want to clarify the terms used to define a wave, which I use in the next few sections, and the relations between these terms (see Figure 1.1). There are four variables that we use to define any sinusoidal wave:

• 振幅，A：波的每个峰相对于中间（其零值）的高度。
• The amplitude, A: How high each peak of the wave is in relation to the middle, its zero value.
• 频率，f：给定时间内波浪的起伏次数。单位为赫兹或每秒的起伏次数：a number/s 。
• The frequency, f: The number of ups and downs in the wave in a given time. The units are Hertz or number of ups and downs per second: a number/s.
• 波长，λ：两个峰之间的距离，以米（m）、厘米（cm）或微米（μm）为单位。
• The wavelength, λ: The distance between two peaks, in meters (m), centimeters (cm), or micrometers (μm).
• 波数ν （希腊字母 nu，而不是字母v）：波长的倒数。波的某些特性最好用波长的倒数来表达。因此，单位为 1/m 或 m ^{−1 ，}或cm ⁻¹，或 μm ⁻¹。
• The wave number, ν (the Greek letter nu, not the letter v): The reciprocal of the wavelength. Some properties of waves are better expressed by the reciprocal of the wavelength. The units are therefore 1/m or m⁻¹, or cm⁻¹, or μm⁻¹.

最后三个变量与波的速度有关。速度是移动物体在固定时间内覆盖的距离，因此速度v（现在是字母v）的单位是米/秒 (m/s)。关键关系如下

The last three variables are related by the velocity of the wave. Velocity is the distance that a moving object covers during a fixed amount of time, so the velocity v (this is now the letter v) has units of meters per second (m/s). The key relationships are

(1.1)

波数（波长的倒数）是

and the wave number – the reciprocal of the wavelength – is

(1.2)

例如，假设图 1.1表示声波。声音在空气中的传播速度为 343 m s ⁻¹。请看图 1.1：

For example, suppose that Figure 1.1 represents a sound wave. The velocity of sound in air is 343 m s⁻¹. Take a look at Figure 1.1:

• 图中显示 0.001 秒内有 5 个周期，这意味着频率为每秒 5000 个周期或f = 5000 Hz，（其中 Hz，赫兹是频率的单位）这恰好是我们听力范围的中间。
• The figure shows 5 cycles in 0.001 seconds, which means the frequency is 5000 cycles per second or f = 5000 Hz, (where Hz, Hertz is the unit for frequency) which happens to be the middle of our hearing range.
• 波长等于速度除以频率，即λ = 343 (m s ⁻¹ )/5000 (1 s ⁻¹ ) = 0.069 m 或 6.9 cm。请注意，秒数相消，因此单位为米或厘米。
• The wavelength is the velocity divided by the frequency, or λ = 343 (m s⁻¹)/5000 (1 s⁻¹) = 0.069 m or 6.9 cm. Notice that the seconds cancel out, and therefore the units are in meters or centimeters.
• 波数为v = 1/0.069 m = 14.5 m ⁻¹。
• The wave number is v = 1/0.069 m = 14.5 m⁻¹.

我尽可能使用公制单位（MKS、米、千克、秒）。我总是发现书本不断更改单位制非常烦人。必要时，我会提供等价单位。

As much as possible, I use the metric system of units (MKS, meter, kilogram, second). I have always found it very annoying when books keep changing the unit system. When necessary, I will give you the equivalents.

现在我们准备深入研究玻尔​​原子的史前史，并了解玻尔博士如何提出他的著名模型。

Now we are ready to dive into the pre‐history of the Bohr atom and understand how Dr. Bohr came up with his famous model.

1.2 缺失线条的情况

1.2 The Case of the Missing Lines

为了解释半导体的工作原理，我们从玻尔原子开始。大多数读者都熟悉玻尔的行星原子模型。玻尔如何提出这个模型是一个非常有趣的科学历史路径，涉及十九世纪和二十世纪初的许多著名科学家。科学一步一步地前进。

To explain how semiconductors work, we start with the Bohr atom. Most readers are familiar with Bohr's planetary model of the atom. How Bohr came up with this model is a very interesting scientific historical path involving many famous scientists of the nineteenth and early twentieth centuries. Science goes one step at a time.

图 1.2左侧显示的威廉·沃勒斯顿 (William Wollaston，1766-1826)是一位英国化学家，他发现了钯和铑等几种原子元素。19 世纪初期，他制造了第一台光谱仪。沃勒斯顿通过棱镜聚焦太阳光，令他惊讶的是，他发现黑线将光谱分开（图 1.3）。到底发生了什么？

William Wollaston (1766–1826), shown on the left in Figure 1.2, was an English chemist who discovered a couple of atomic elements, including palladium and rhodium. Very early in the 1800s, he built the first spectrometer. Wollaston focused the light from the sun through a prism and, to his surprise, found black lines partitioning the spectra (Figure 1.3). What the heck was going on?

假设您正在烤一只鸡，并仔细观察插入鸡胸肉的数字温度计的刻度盘，温度从室温 24 °C (摄氏度) 升至 80 °C（煮熟的鸡胸肉的推荐内部温度）。随着温度升高，温度计突然从 39 °C 跳至 41 °C，然后从 56 °C 跳至 58 °C，最后从 66 °C 跳至 68 °C。您想知道温度计出了什么问题：为什么刻度盘上不显示 40、57 和 67 °C 的温度？这些温度似乎不存在。您买了一个新温度计，只是为了确保万无一失，却发现缺少了完全相同的温度值。第三支温度计给出了相同的结果。您将同样的温度计放入汤中，温度计表现良好，依次显示 39、40 和 41 °C 的数值。所以，温度计是正常工作的。温度缺失并非巧合。鸡体内有某种物质，导致温度从一个值跳到另一个值，而不经过中间值。

Suppose you are roasting a chicken and carefully watching the dial of a digital thermometer inserted in the chicken's breast as the temperature increases from room temperature, 24 °C (degrees Celsius), to 80 °C, the recommended internal temperature of a well‐cooked chicken breast. As the temperature increases, suddenly the thermometer jumps from 39 °C to 41 °C, then from 56 °C to 58 °C, and finally from 66 °C to 68 °C. You wonder what is wrong with the thermometer: why don't the temperatures 40, 57, and 67 °C show up on the dial? They don't seem to exist. You buy a new thermometer, just to be sure, and find that exactly the same temperature values are missing. A third thermometer gives the same results. You place the same thermometers in soup, and the thermometers are well behaved, showing in succession the values 39, 40, and 41 °C. So, the thermometers work. The missing temperatures are no coincidence. There is something in that chicken that makes the temperature jump from one value to another without passing through the one in the middle.

嗯，沃勒斯顿的第一反应可能就是这样。是什么把这些颜色分开了？仪器镜头脏了吗？他甚至考虑过某些颜色之间可能存在自然边界。但为什么当他将光谱仪指向白光时，这些黑色边界没有出现呢？

Well, that was probably Wollaston's initial reaction. What separated the colors? Was the instrument lens dirty? He even considered the possibility that there were natural boundaries between certain colors. But why didn't these black boundaries appear when he pointed the spectrometer at a white light?

图 1.2右侧的德国物理学家约瑟夫·冯·夫琅禾费 (1787-1826)对太阳光谱的这些暗线进行了更详细地研究，并用字母 A–K 命名了缺失的线（想象力不是太丰富；古代天文学家会找到更引人注目的名字）。

German physicist Joseph von Fraunhofer (1787–1826), on the right in Figure 1.2, studied these dark lines of the sun's spectrum in much more detail and actually named the missing lines with the letters A–K (not too imaginative; ancient astronomers would have found much more attention‐grabbing names).

1.3 气体和金属光谱的奇异行为

1.3 The Strange Behavior of Spectra from Gases and Metals

下一步是观察几种金属、气体和恒星发出的光。观察者很快发现，每种元素都有自己独特的线条。请看图 1.4。白光通过棱镜产生连续光谱（上图）；没有颜色缺失。如果我们加热气体直到它发光，并将光穿过同一个棱镜（中图），只有某些线条会投射到屏幕上：其余的光谱消失了。但如果我们换一种方式——也就是说，如果我们在白光和棱镜之间放置冷气体（下图）——那么就会出现完整的光谱，除了与之前的光谱测量中可见的完全相同的线条。中间和下部光谱的叠加等于顶部白光的光谱。气体在冷却时吸收的特定光波与它发光时发射的光波相同。太巧了！所有气体和材料都是这样。线条的频率不同，但都有线条。

The next step was to take a look at the emission of light from several metals, gases, and stars. The observers soon found that each element has its own unique set of lines. Take a look at Figure 1.4. White light through a prism generates a continuous spectrum (top diagram); no colors are missing. If we heat a gas until it glows and pass the light through the same prism (middle diagram), only certain lines are projected onto the screen: the rest of the spectrum has disappeared. But if we do it differently – that is, if we have the cold gas between the white light and the prism (bottom diagram) – then the full spectrum appears, except for exactly the same lines that were visible in the previous spectral measurement. The superposition of the middle and lower spectra is equal to the spectrum of the white light at the top. The gas, when cold, absorbs the same specific light waves as the ones it emits when it glows. What a coincidence! And this happens with all gases and materials. The lines are at different frequencies, but all of them have lines.

1.4 基本元素的分类

1.4 The Classifications of Basic Elements

1766 年，英国贵族亨利·卡文迪许 (Henry Cavendish，1731-1810) 首次将氢视为一种元素，即一种独特的物质，是水分子不可分割的一部分。100 年后，当德米特里·门捷列夫 (Dmitri Mendeleev，1834-1907) 于 1869 年发表如今随处可见的元素周期表时，人们已经知道氢是所有已知元素中最轻的（当时已知元素有 60 种）。门捷列夫（图 1.5）根据相对原子量对已知元素进行了重新排序，将氢列为 1。

In 1766, an English aristocrat named Henry Cavendish (1731–1810) was the first to recognize hydrogen as an element, that is, a unique substance and an integral part of the water molecule. By the time Dmitri Mendeleev (1834–1907) published his now ubiquitous periodic table of the elements in 1869, 100 years later, it was already known that hydrogen was the lightest of all the known elements (at that time, 60 elements were known). Mendeleev (Figure 1.5) reordered the known elements by their relative atomic weight, with hydrogen as 1.

1.5 氢谱线

1.5 The Hydrogen Spectrum Lines

瑞士数学家约翰·巴尔末（1825-1898）于 1895 年通过经验发现，氢气产生的光学线分离可以用一个仅包含常数C和整数的公式来表示。他用公式 (1.3) 表达了他的观察结果

Johann Balmer (1825–1898), a Swiss mathematician, found empirically in 1895 that the separation of the optical lines generated by hydrogen gas can be expressed by a formula using just a constant, C, and integer numbers. He expressed his observation with Eq. (1.3)

(1.3)

这里λ是缺失线的波长，C是启发式获得的常数（C = 3.64 × 10 ⁻⁹ m），n = 2，m是大于 2 的整数（即 3、4、5 等）。将任意这些整数代入公式 (1.3)中，即可得到氢光谱中所有线的波长。

here λ is the wavelength of the missing line, C is a heuristically obtained constant (C = 3.64 × 10⁻⁹ m), n = 2, and m is an integer greater than 2 (i.e. 3, 4, 5, and so on). When you put any of these integer numbers in Eq. (1.3), you get the wavelength of all the lines in the hydrogen spectrum.

图 1.6左侧显示了氢光谱，以及其特征发射线和吸收线。这些线是巴尔末用来开发方程 (1.3)以计算缺失氢的波长的线。所有元素在不同波长下都有类似的吸收线和发射线，我在图 1.6右侧显示了其中几条。

Figure 1.6 shows the hydrogen spectrum on the left, with its characteristic emission and absorption lines. These are the lines that Balmer used to develop Eq. (1.3) to calculate the missing hydrogen's wavelengths. All the elements have similar absorption and emission lines at different wavelengths, and I show a few on the right in Figure 1.6.

仅仅三年后，约翰内斯·里德堡（1854-1919）发现巴尔末方程是一个更一般公式的一个特例，即公式 (1.4)：

Just three years later, Johannes Rydberg (1854–1919) found that the Balmer equation was one specific case of a more general formula, Eq. (1.4):

(1.4)

波长的倒数现在由常数R和相同的整数给出，只是现在n可以有不同的整数：2、3、4 等等。R也是一个启发式得出的常数（R = 1.1 × 107m ⁻  1 ^），称为里德伯常数。巴尔末和里德伯（图 1.7）都能够使用公式 (1.4)中的关系量化氢原子的整个光谱。有趣的是，尼尔斯·玻尔（我将在第 1.8 节中详细讨论他）能够使用基本物理值（例如电子质量、电子电荷、自由空间的介电常数、普朗克常数和光速（参见附录 1.3）计算出里德伯数。这种行为迫切需要解释。

The reciprocal of the wavelength is now given by a constant R and the same integer numbers, except that now n is allowed to have different integer numbers: 2, 3, 4, and so on. R is also a heuristically derived constant (R = 1.1 × 10⁷ m⁻¹), called the Rydberg constant. Both Balmer and Rydberg (Figure 1.7) were able to quantify the entire spectrum of the hydrogen atom using the relationship in Eq. (1.4). It is interesting that Niels Bohr, whom I'll talk more about in Section 1.8, was able to calculate the Rydberg number using fundamental physical values, such as the mass of the electron, the electronic charge, the permittivity of free space, Planck's constant, and the speed of light (see Appendix 1.3). This behavior screams for an explanation.

1.6 光是粒子

1.6 Light is a Particle

阿尔伯特·爱因斯坦（Albert Einstein，1879-1955，图 1.8）于 1905 年发表了一篇关于光电效应理论的论文。当光线照射到金属表面时，如果其能量高于给定的阈值，就会释放出一个电子。任何剩余的能量都用于将电子踢出表面。在他的论文中，爱因斯坦提出了光具有双重性格的概念；它的行为像波或像粒子，粒子的能量与光的波长相关。

Albert Einstein (1879–1955, Figure 1.8) published a paper in 1905 on the theory of the photoelectric effect. When light strikes a metal surface, it frees an electron if its energy is higher than a given threshold value. Any remaining energy is used to kick the electron off the surface. In his paper, Einstein proposed the concept that light has a dual personality; it behaves like a wave or like a particle, and the particle has an energy associated with the wavelength of that light.

他称这种粒子为“光量子”。（1926 年，法国物理学家弗里蒂奥夫·沃尔弗斯 [1891-1971] 将光量子重新命名为光子。有趣的是，爱因斯坦因发现光子而于 1921 年获得诺贝尔奖，而不是因其更为著名的相对论工作。）这种光粒子，即光子，具有取决于光频率的能量。与这种光相关的能量由以下公式给出

He called this particle a “light quantum.” (In 1926, a French physicist named Frithiof Wolfers [1891–1971] renamed the light quantum a photon. It is interesting that Einstein received the Nobel Prize in 1921 for the discovery of the photon, not for his much more famous work on relativity.) This light particle, the photon, has an energy that depends on the frequency of the light. The energy associated with this light is given by the formula

(1.5)

其中h为普朗克常数（h = 6.63 10 ⁻³⁴ m ²  kg s ⁻¹），c为光速（c = 3 × 10 ⁸  m s ⁻¹），λ为波长（m）。分子中的米数减去分母中的米数，得出以焦耳为单位的能量（= kg m ² s ⁻²）。

where h is Planck's constant (h = 6.63 10⁻³⁴ m² kg s⁻¹), c is the speed of light (c = 3 × 10⁸ m s⁻¹), and λ is the wavelength (m). The meter in the numerator cancels the one in the denominator, resulting in the energy given in Joules (= kg m² s⁻²).

1.7 原子的结构

1.7 The Atom's Structure

当所有这些光实验和关系都在十九世纪末被观察到时，其他科学家正在研究阴极射线管（旧电视机和示波器的前身），试图了解原子的本质。阴极射线管由一个真空管组成，管两端各有一个触点：阴极和阳极。当在管子上施加电压时，电流从阴极流向阳极，管子发光。科学家这样解释这种现象：电子穿过一个含有极少原子的真空管时，能够获得足够的速度（因此也具有动能）来撞击原子并使其发光。它们被称为阴极射线。

While all of these light experiments and relationships were being observed in the late nineteenth century, other scientists were playing with cathode‐ray tubes, the precursors of old television sets and oscilloscopes, trying to understand the nature of the atom. The cathode‐ray tube consists of an evacuated tube with two contacts, one at each end: the cathode and the anode. When a voltage is applied across the tube, current flows from the cathode to the anode, and the tube glows. The scientists explained this phenomenon by saying that electrons going through an evacuated tube containing very few atoms are able to attain sufficient velocity (and therefore kinetic energy) to hit the atoms and make them glow. They were called cathode rays.

诺贝尔奖获得者、英国物理学家约瑟夫·约翰·汤姆森（Joseph John Thomson，1856-1940 年，图 1.9）研究了阴极射线，并于 1897 年假设它们由极小的带负电的粒子组成，他最初将这些粒子称为“微粒”。 （就像光子这一术语一样，乔治·斯托尼（George Stoney，1826-1911 年）后来将微粒改名为电子。）通过研究这些粒子如何在气体中移动以及如何被磁铁偏转，汤姆森得出结论，“微粒”是 (i) 带负电的粒子，并且 (ii) 比原子本身小得多 – 至少小 1000 倍。为了解释电中性的原子，他提出存在一个质量很大的正电荷核心，周围环绕着一层无定形的带负电的电子云。

Nobel Prize winning British physicist Joseph John Thomson (1856–1940, Figure 1.9) studied cathode rays and postulated in 1897 that they consisted of extremely small negatively charged particles, which he initially called “corpuscles.” (As happened with the term photon, George Stoney (1826–1911) later renamed corpuscles as electrons.) By studying how these particles moved through the gas and how they could be deflected by magnets, Thomson concluded that the “corpuscles” were (i) negatively charged particles and (ii) much smaller than the atoms themselves – at least 1000 times smaller. To account for electrically neutral atoms, he proposed that there is a core of positive charges with a large mass surrounded by an amorphous cloud of negatively charged electrons.

欧内斯特·卢瑟福（1871-1937，图 1.10）也是诺贝尔奖获得者，他研究放射性。1911 年，他用阿尔法粒子轰击非常薄的金箔，并观察辐射穿过箔时的散射反射。大多数辐射都未偏转地穿过了箔。只有少数阿尔法粒子被反射回来，从反射辐射的角度，他得出结论，原子必须有一个非常小的集中的带正电的原子核可以补偿带负电的电子。由于大多数阿尔法粒子在穿过箔片时方向没有发生任何变化，因此他得出​​结论，原子中的大部分空间是空的，电子围绕原子核旋转，而不是像汤姆森所说的那样，只是一团乱七八糟的带负电的云。

Ernest Rutherford (1871–1937, Figure 1.10), also a Nobel Prize winner, worked with radioactivity. In 1911, he bombarded very thin gold foil with alpha particles and looked at the scattered reflections as the radiation went through the foil. Most of the radiation went through the foil undeflected. Only a few alpha particles were reflected back and, from the angle of the reflected radiation, he concluded that the atom must have a very small, concentrated, positively charged core to compensate for the negatively charged electrons. Because the large majority of alpha particles passed through the foil without any directional change, he concluded that the majority of the space in an atom is empty, and the electrons are orbiting the nucleus instead of just being a scrambled negatively charged cloud as Thomson had suggested.

罗伯特·密立根（1868-1953，图 1.11）于 1909 年通过一个有趣的油滴实验测量了电子的电荷。他把一个很小的带电两块金属板（一块带正电，另一块带负电）之间有一滴油滴，在两块金属板之间形成电场。他将微小的油滴滴入真空室，用 X 射线使一些油滴带负电。通过改变两块金属板之间的电场，他可以控制油滴的速度，使其减速、停止，甚至向上移动。通过了解油滴的密度、油滴的大小、体积和质量以及补偿重力影响的电场，他能够得出单个电子的电荷值：1.592 × 10 ⁻¹⁹库仑（他与现在确定的数字相差不到 1%——一点也不差）。

Robert Millikan (1868–1953, Figure 1.11) was able to measure the electrical charge of an electron with an interesting oil drop experiment in 1909. He suspended a very small charged oil drop between two metal plates – one positive and the other negative – creating an electric field between the plates. He dropped tiny oil droplets into a vacuum chamber, and with X‐rays, he negatively charged some of the oil drops. By changing the electric field between the two plates, he could control the speed of the oil drops, slowing them down, stopping them, or even moving them upward. By knowing the density of the oil drop, the size of the drop, its volume and mass, and the electric field that compensated for the effect of gravity, he was able to come up with the value of the charge of a single electron: 1.592 × 10⁻¹⁹ coulombs (he was off by less than 1% of the now‐established number – not bad at all).

1.8 玻尔原子

1.8 The Bohr Atom

现在我们来到了 1913 年（撰写本文时距今仅 105 年）。玻尔知道什么？他知道：

So here we are in 1913 (just a mere 105 years ago at the time of this writing). What did Bohr know? He knew:

1. 氢原子是最简单的原子，仅由一个质子（带正电）和一个电子（带负电）组成。
2. That a hydrogen atom is the simplest atom, consisting of just one proton (positively charged) and one electron (negatively charged).
3. 原子的全部质量都集中在核心，即质子。
4. That all of the atom's mass is concentrated at the core: that is, the proton.
5. 电子是带负电的粒子，以某种方式围绕原子核旋转。
6. That electrons are negative particles somehow orbiting the nucleus.
7. 原子内的绝大部分空间是空的。
8. That the great majority of space in an atom is empty.
9. 所有其他元素都可以按照重量整齐地排列在元素周期表中。
10. That all the other elements can be organized neatly by weight on a periodic table.
11. 所有元素都有不同的发射光谱，并有特定的发射或吸收色线。
12. That all elements have different emission spectra with specific emission or absorption color lines.

尼尔斯·玻尔（Niels Bohr，1885-1962，图 1.12）能够完美地解释所有这些观察结果以及光谱线的产生方式。他在 1912 年假设一个原子由一个核心原子核组成，该原子核具有所有质量，并被电子包围，像行星系统一样在明确的轨道上移动（图 1.13）。质子之间的静电力而电子（类似于太阳系中的引力）使电子保持循环而不会逃离其轨道。此外，玻尔假设轨道中的电子不会辐射任何能量，因此轨道是稳定的。辐射或吸收任何能量的唯一方法是电子从一个轨道跳到另一个轨道，这正是氢和其他元素光谱的解释。

Niels Bohr (1885–1962, Figure 1.12) was able to beautifully explain all of these observations and how the spectral lines are generated. He postulated in 1912 that an atom consists of a core nucleus that has all the mass and is surrounded by electrons, moving like a planetary system in well‐defined orbits (Figure 1.13). Electrostatic forces between the proton and the electron (analogous to the gravitational forces in the solar system) keep the electrons circulating without escaping their orbit. Additionally, Bohr postulated that the electrons in orbit do not radiate any energy, so the orbits are stable. The only way to radiate or absorb any energy is for an electron to jump from one orbit to another, and that is precisely what explains the spectra of hydrogen and other elements.

由于电子除了特定轨道的能量之外，不能拥有任何能量，因此它们必须从一个轨道跳到另一个轨道，就像上楼梯一样，一次一、二或三步（而不是一步半）。当从较高的轨道落到较低的轨道时，电子会以非常精确频率的光子形式释放出固定的能量包（请记住，爱因斯坦说过，光的行为就像一个粒子，其能量与光的波长有关：等式 1.5）。从轨道 3 到轨道 2 的过渡，正如我在图 1.13 的结果是发射一个频率非常精确的光子，该频率由能量变化 Δ E除以普朗克常数得出。同样，如果轨道 2 上的电子想要跃迁到轨道 3，氢原子必须通过吸收具有相同精确能量的光子、通过加热或通过其他方式来吸收所需的能量。所有其他与能级差不完全匹配的光子都会不受阻碍地穿过材料。因此，材料对于所有与两个能级差不完全匹配的光波都是透明的。

Since electrons are forbidden to have any energy except for the energy of a specific orbit, they have to jump from one orbit to another, like going up the stairs, one, two, or three steps at a time (not one and a half). When falling from a higher orbit to a lower one, the electron releases a fixed packet of energy in the form of a photon of a very precise frequency (remember that Einstein said light behaves like a particle with an energy related to the wavelength of the light: Eq. 1.5). The transition from orbit 3 to orbit 2, as I show in Figure 1.13, results in the emission of a photon of a very precise frequency, given by the change in energy, ΔE, divided by Planck's constant. Similarly, if an electron in orbit 2 wants to jump to orbit 3, the hydrogen atom has to absorb the energy it needs by absorbing a photon with the same precise energy, or by thermal heating, or by some other means. All other light photons not exactly matched to the difference between the energy levels go through the material unimpaired. The material is therefore transparent for all of the light waves that do not match the exact difference between two energy levels.

1924 年，奥地利人沃尔夫冈·泡利 (Wolfgang Pauli，1900–1958 年，位于图 1.12右侧) 提出了不相容原理，该原理指出系统中任何两个电子 (或费米子粒子) 不能具有相同的量子数。任何元素的第一个原子能级只能容纳 2 个电子，第二个原子能级容纳 8 个，第三个原子能级容纳 18 个，第四个原子能级容纳 32 个，等等。有一个简单的关系可以告诉您有多少个电子可以共享给定的能量轨道：2 n ²。您可能想知道为什么。如果根据泡利不相容原理，电子不能共享相同的量子态，那么为什么每个轨道上会有多个电子？答案是每个电子都由四个量子数描述 (就像描述您的名字、中间名、姓氏和出生日期的三个数字一样)，但只有第一个量子数n决定了电子的能量，从而解释了光谱的行为。我在附录 1.1中更详细地解释了电子的四个量子数。

In 1924, Austrian Wolfgang Pauli (1900–1958, on the right in Figure 1.12) proposed his exclusion principle, which states that no two electrons (or fermion particles) in a system can have the same quantum numbers. The first atomic level of any element can hold only 2 electrons, the second 8, the third 18, the fourth 32, etc. A simple relation tells you how many electrons can share a given energy orbit: 2n². You may wonder why. If, according to Pauli's exclusion principle, the electrons cannot share the same quantum state, why do we have more than one electron in each orbit? The answer is that each electron is described by four quantum numbers (like the three numbers that describe your first, middle, last names, and your date of birth), but only the first quantum number, n, specifies the energy of the electron and thus explains the behavior of the light spectra. I explain the electron's four quantum numbers in more detail in Appendix 1.1.

打个比方。假设我有一个剧院，第一排有 2 个座位，第二排有 8 个座位，第三排有 18 个座位，第四排有 32 个座位，等等。第一排的票价为 20 美元，第二排 50 美元，第三排 75 美元，第四排 125 美元，等等。（我知道，这是一个奇怪的剧院，但这只是一个比喻。）观众不得坐在别人的腿上或站在过道上。如果有 12 个人来看演出，他们首先占据第一排的 2 个座位，接下来的 8 位观众占据第二排，最后 2 位观众坐在第三排的某个位置。在剧院的更靠后的位置，排有更多座位，但它们是空的。如果顾客想换排——例如从第 3 排换到第 4 排——他必须多付 50 美元：不同排的票价差额。如果他换到另一排，从第 4 排到第 3 排，他将得到 50 美元的补偿。现在，如果第 1 排的富人想换到第 4 排，他需要支付 105 美元。也就是说，必须支付或收取费用才能从一排移到另一排。所有这些变化都假设某人想要的座位是空的。如果观众组缺钱（没有精力），只要有空位，他们就会占据前排的座位。如果这群人很富有（有很多精力），只要他们有足够的钱（精力）来支付更高的价格，他们就可以从一个座位跳到另一个座位。他们需要支付的金额仅取决于每排座位的价格差异。类比结束。

Here's an analogy. Suppose I have a theater with 2 seats in the first row, 8 in the second, 18 in the third, 32 in the fourth, etc. The tickets for the first row cost $20, the second row $50, the third row $75, the fourth $125, and so on. (I know, it is a weird theater, but this is just an analogy.) Spectators are forbidden to sit in someone else's lap or stand in the aisles. If 12 people show up for the performance, they first occupy the 2 seats of the first row, the next 8 patrons occupy the second row, and the last 2 spectators sit somewhere in the third row. Further back in the theater, the rows have more seats, but they are empty. If a patron wants to change rows – from row 3 to row 4, for example – he has to pay the extra $50: the difference in the price of the tickets in the different rows. If he moves the other way, from row 4 to row 3, he is reimbursed the $50. Now, if a wealthy person in row 1 wants to move to row 4, he will be required to pay $105. That is, money must be paid or received to move from one row to another. All these changes assume that the seat someone desires is unoccupied. If the group of spectators is short of money (no energy), they will occupy the seats of the first rows as long as there are seats available. If the group is wealthy (has lots of energy), they can jump from one seat to another as long as they have enough money (energy) to afford the higher prices. The amount they have to pay depends only on the difference in the price of the seats in each row. End of analogy.

在 0 K 绝对温度（−273 °C）下，没有任何能量，因此所有电子都占据允许的最低能级。在室温 300 °C 下，热能相当大，电子开始从一个能级移动到另一个能级，留下空位，其他电子可以占据这些空位，并在移动过程中吸收或发射光子。

At 0 K, absolute temperature (−273 °C), there is no energy whatsoever, so all the electrons occupy the lowest allowed energy levels. At room temperature, 300 °C, there is quite a large amount of thermal energy, and electrons start moving from one level to another, leaving empty seats that can be occupied by other electrons, absorbing or emitting photons as they move.

图 1.14显示了在氢原子中观察到的跃迁。这些线组后来由发现它们的人命名。

Figure 1.14 shows the transitions observed in the hydrogen atom. The groups of lines were named later by those who found them.

你有没有想过，为什么当我们走在二楼时，不会掉下去，落到一楼？想一想。原子的典型尺寸是 5 × 10 ⁻¹⁰ 米，原子核的尺寸大约小 30 000 倍，为 1.6 × 10 ⁻¹⁵ 米。所有质量都是集中在原子核中。实际上，原子是由空的空间组成的。那么，为什么我的鞋子的空隙不会穿过二楼瓷砖的空隙呢？这不是由于静电排斥。我的鞋底和瓷砖都是电中性的。我们没有从地板上掉下去的原因是泡利不相容原理。鞋底的电子在瓷砖的原子上找不到较低的能级。泡利不相容原理不仅保证了我们在二楼的安全，还解释了为什么物质物理对象有体积。它还解释了摩擦力。鞋底的原子与地板的原子处于优先位置，并且它们抵抗移动。摩擦力的强度取决于两个表面的晶体结构（Emily Conover，《让摩擦滑动》，《科学新闻》，2019 年 8 月 3 日）。

Have you ever wondered why, when we walk on the second floor, we do not fall through it and land on the first floor? Think about it. The typical size of an atom is 5 × 10⁻¹⁰ m, and the size of a nucleus is about 30 000 times smaller, 1.6 × 10⁻¹⁵ m. All the mass is concentrated in the nucleus. The atoms are, for all practical purposes, composed of empty space. So why does the empty space of my shoes do not go through the empty space of the tiles on the second floor? It is not due to electrostatic repulsion. Both the soles of my shoes and the tiles are electrically neutral. The reason we do not fall through the floor is the Pauli exclusion principle. The electrons in the sole cannot find a lower energy level on the atoms of the tile. The Pauli exclusion principle not only keeps us safe on the second floor but also explains why material physical objects have any volume at all. It also explains friction. The atoms of the sole locate themselves in a preferential position with the atoms of the floor, and they resist moving. How intense the friction is depends on the crystallographic structure of the two surfaces (Emily Conover, “Giving Friction the Slip”, Science News, 3 August 2019).

在下一章中，我将讨论玻尔假设的这些单一独特能级如何解释不同材料的电特性。

In the next chapter, I discuss how these single unique energy levels that Bohr postulated explain the electric properties of different materials.

1.9 总结与结论

1.9 Summary and Conclusions

总结本章所涵盖内容的最佳方式可能是看一下图 1.15。通过观察太阳光谱和具有不同谱线的不同气体的光谱，可以得出启发式关系，将缺失谱线的频率与仅由常数和整数组成的表达式联系起来。爱因斯坦利用光电效应，假设光具有波和粒子的双重性质，我们现在称之为光子。

Perhaps the best way to summarize what we have covered in this chapter is to take a look at Figure 1.15. Observations of the sun's light spectrum and the spectra of different gases with their distinct lines resulted in heuristic relationships that relate the frequency of the missing lines to an expression consisting of just a constant and integer numbers. Einstein, working with the photoelectric effect, postulated the dual nature of light acting as both a wave and a particle, which we now call the photon.

在原子方面，门捷列夫根据重量对已知元素进行分类，在此过程中，他留下了一些空白，以便添加未来的元素。汤姆森确定电子是带负电的微小粒子，而卢瑟福则通过他的阿尔法射线测量得出结论，原子核集中在原子中心的一个非常小的区域。密立根能够测量电子的电荷。

On the atomic side, Mendeleev classified the known elements by their weight, and, in the process, he left some empty spaces to add future elements. Thomson determined that electrons are tiny negatively charged particles and Rutherford, with his alpha ray measurements, concluded that the nucleus is concentrated in a very small region at the center of the atom. Millikan was able to measure the charge of electrons.

基于之前的理论和实验工作，玻尔提出了具有离散和稳定能级的原子行星模型。他的模型涵盖了迄今为止已知的所有原子理论发展，并通过考虑电子如何通过接受或释放能量包从一个能级移动到另一个能级，完美地解释了之前的光学观察和测量。

Based on previous theoretical and experimental work, Bohr proposed his planetary model of the atom with discrete and stable energy levels. His model included all the developments of atomic theory known to that date and explained the previous optical observations and measurements beautifully by considering how electrons move from one level to another by accepting or releasing packets of energy.

如果你对这些结论感到满意，那么你就可以进入下一章了。你可以仔细阅读以下三个附录以了解更多详细信息。

If you are comfortable with these conclusions, you are ready to go to the next chapter. You may peruse the three following appendices for a few more details.

附录 1.1 玻尔模型的一些细节

Appendix 1.1 Some Details of the Bohr Model

四个量子数唯一地定义了一个电子：

Four quantum numbers uniquely define an electron:

• 主量子数n定义了轨道，因此也定义了电子的能量。电子改变轨道时释放或吸收的能量完全由n的值决定。n的允许值为任意正整数：1、2、3、4 等。
• The principal quantum number, n, defines the orbits and, therefore, the energy of the electrons. The energy released or absorbed as the electrons change orbits is determined exclusively by the value of n. The allowed values of n are any positive integers: 1, 2, 3, 4, etc.
• 电子有两种自旋：向上和向下。
• Electrons have two spins: up and down.
• 电子也有角动量。角量子数 ℓ 与轨道形状有关。ℓ 的值也是 0 到n之间的整数。
• Electrons also have angular momentum. The angular quantum number, ℓ, is associated with the shape of the orbits. The value of ℓ is also an integer number between 0 and n.
• 磁量子数m _l与轨道方向有关，也是 –ℓ 和 +ℓ 之间的整数。
• The magnetic quantum number, m_l, is associated with the orientation of the orbits. It is also an integer number between –ℓ and +ℓ.

电子遵循以下规则：

Electrons follow these rules:

• 第一个轨道n = 1中的电子可以有两个自旋，但 ℓ 和m _l均为 0。因此，第一个轨道只能容纳两个电子。
• The electrons in the first orbit, n = 1, can have two spins, but both ℓ and m_l are 0. Thus the first orbit can hold only two electrons.
• 第二轨道上的电子（n = 2）可以具有两个自旋和两个角量子数（ℓ 等于 0 或 1）。当 ℓ = 0 时，只有一个m _l值是可能的，即m _{l = 0。但当 ℓ = 1 时，} m _l有三个可能的值：−1、0 和 +1。因此，第二轨道上的电子总数为 8：即四个m _l乘以每个两个自旋。
• The electrons in the second orbit, n = 2, can have two spins and two angular quantum numbers (ℓ equal to 0 or 1). Associated with ℓ = 0, only one m_l value is possible, m_l = 0. But for ℓ = 1, there are three possible values of m_l: −1, 0, and +1. So, the total number of electrons in the second orbit is eight: that is, four m_l times two spins each.
• 你可以进行计算并证明第三个轨道最多可以容纳 18 个电子，等等。
• You can do the calculations and prove that the third orbit can hold up to 18 electrons, and so on.

图 1.16显示了这些能级的一种可视化方法，包括波尔原子轨道的相对能量以及轨道填充的顺序。在 0 K 绝对温度下，电子首先填满 1s 能带（两个电子），接下来的两个电子位于 2s 能带，接下来的六个电子位于 2p 能带，依此类推，沿着能级阶梯向上移动。请注意，4s 能级在 3d 能级之前填满。（顺便说一下，字母 s 表示尖锐，p 表示原理，d 表示漫反射，f 表示基本。）

Figure 1.16 shows one way of visualizing these levels, including the relative energy of the orbits of the Bohr atom and the order in which the orbits are filled. At 0 K absolute temperature, the electrons first fill up the 1s band (two electrons), the next two electrons reside in the 2s band, and the next six are in the 2p band, etc., climbing up the energy level stairs. Note that level 4s fills up before 3d. (By the way, the letters mean s for sharp, p for principle, d for diffuse, and f for fundamental.)

您可能想知道的另一点是，为什么我们将 3d 能级写在比 4s 能级更高的能量上。关于这一点的解释存在很大争议。这与电子和质子的吸引和排斥有关，我就不多说了。

Another point you may wonder about is why we write the 3d level at higher energy than the 4s level. There is quite a debate about explaining this. It has to do with the attraction and repulsion of electrons and protons, and I will leave it at that.

附录 1.2 半导体材料

Appendix 1.2 Semiconductor Materials

图 1.17显示了元素周期表中半导体所用元素的部分，显示了上壳层中有多少电子。所有下壳层都是满的。例如，硅有 14 个电子，因此电子填满了 1s（2）、2s（2）、2p（6）、3s（2）和 2p（最后一个 2）能带。如果将这些数字叠加到图 1.16中，您会看到两个最低能级已满，但能级n = 3（s + p）有四个电子，并有可能接受另外四个电子（在 2p 级）以完成其轨道。

Figure 1.17 shows the portion of the periodic table that contains the elements used in semiconductors, showing how many electrons are in the upper shells. All the lower shells are full. Silicon, for example, has 14 electrons, so the electrons fill up bands 1s (2), 2s (2), 2p (6), 3s (2), and 2p (the last 2). If you superimpose these numbers into Figure 1.16, you see that the two lowest energy levels are full, but energy level n = 3 (s + p) has four electrons, with the possibility of accepting another four (in the 2p level) to complete its orbit.

考虑另一种在半导体中大量使用的元素：锑，Sb。它有 51 个电子。再次查看图 1.16，我们发现最后一个占据能级是 5p，有三个电子。所有较低能级都是满的。因此，最后一个占据能级，即 5 级，有五个电子（5s 级有两个电子，5p 级有三个电子），这使其化学价为 5。我们将在下一章中使用这些数字来解释绝缘体、导体和半导体之间的区别。

Consider another element that is used a great deal in semiconductors: antimony, Sb. It has 51 electrons. By looking again at Figure 1.16, we find the last occupied level is 5p, with three electrons. All the lower levels are full. Thus, the last occupied energy level, level 5, has five electrons – two in 5s and three in 5p levels – which gives it a chemical valence of 5. We will use these numbers in the next chapter to explain the difference between insulators, conductors, and semiconductors.

附录 1.3 计算里德伯常数

Appendix 1.3 Calculating the Rydberg Constant

为了完善本章的一些细节，里德伯常数可以用更基本的单位来计算。它是

To complete some of the details of this chapter, the Rydberg constant can be calculated from more basic units. It is

(1.6)

其中，m _e是电子的质量（m _e = 9.1 × 10 ⁻³¹ kg），e是电子电荷（e = 1.6 × 10 ⁻¹⁹ C），ε是材料的介电常数，即材料的相对介电常数（例如，对于氢，ε _r = 253.8）乘以自由空间的介电常数（ε ₀ = 8.85 × 10 ⁻¹² m ⁻³ kg ⁻¹ s ² C ²），h是普朗克常数（h = 1.06 × 10 ⁻³⁴  J s），c是光速（c = 3 × 10 ⁸  m s ⁻¹）。所有这些量都是基本物理常数。

where m_e is the mass of the electron (m_e = 9.1 × 10⁻³¹ kg), e is the electronic charge (e = 1.6 × 10⁻¹⁹ C), ε is the permittivity of the material, that is the product of the relative permittivity of the material (e.g. for hydrogen ε_r = 253.8) times the permittivity of free space (ε₀ = 8.85 × 10⁻¹² m⁻³ kg⁻¹ s² C²), h is Planck's constant (h = 1.06 × 10⁻³⁴ J s), and c is the speed of light (c = 3 × 10⁸ m s⁻¹). All of these quantities are fundamental physical constants.

我们经常忘记或不检查的一件事是，任何测量都是由数值和单位组成的。在公式 (1.6)中，我显示了几个量，每个量都有一个数字和单位。结果必须与数值计算和单位一致。很少有人在执行操作时检查单位，这可能会导致错误（还记得火星轨道器因公制和英制单位混淆而失败的惨败吗）。所以，让我用公式 (1.6)来做这件事。首先是单位：

One thing that we often forget or do not check is the fact that any measurement is composed of a numerical value and a unit. In Eq. (1.6) I show several quantities, each of which has a number and unit(s). The result has to agree with the numerical calculation and the units. Very few people check the units when they perform an operation, which can result in mistakes (remember the fiasco when the Mars orbiter failed because of the confusion between metric and English units). So, let me do this with Eq. (1.6). First the units:

看看分母中的三项。分母中有米（m）项，指数为 −6 + 6 + 1 = 1 m，因此分母中只剩下一个米单位。同样，千克的指数为 −2 + 3 = 1。分母中有四个 Q，分母中的秒数抵消了（4 – 3 – 1 = 0）。现在分子中的千克和库仑抵消了分母中的数，只剩下米的倒数作为剩余单位，与公式 (1.6)一致。

Look at the three terms in the denominator. There are meter (m) terms in the denominator with exponents −6 + 6 + 1 = 1 m, so only one meter unit remains in the denominator. Similarly, with the exponents of the kilograms, there are −2 + 3 = 1 in the denominator. There are four Qs in the denominator, and the seconds in the denominator cancel out (4 – 3 – 1 = 0). Now the kilograms and the coulombs in the numerator cancel those in the denominator, leaving only the reciprocal of a meter as the remaining unit, in agreement with Eq. (1.6).

现在我们来算一下。

Now let's do the numbers.

这与公布的结果一致。

This agrees with the published result.

2.1 将原子聚集在一起

2.1 Bringing Atoms Together

从上一章中，我们知道原子具有离散的能级，而电子（除非受到能量包的干扰）会保持在稳定的轨道上。我们将这些能级表示为线，如图2.1所示。

From the previous chapter, we know that an atom has discrete energy levels, and electrons – unless disturbed by a packet of energy – stay in a stable orbit. We show these energy levels as lines, as in Figure 2.1.

我们在上一章还看到，泡利不相容原理指出没有两个电子可以共享相同的量子数。如果我们将两个氢原子推到一起，使它们相互作用并形成一个单一系统，则一个原子中电子的能级必定与另一个原子中的电子有稍许不同的值。我在图 2.2中展示了这一情况。氢气中原本只有一个能级，所有原子之间相隔很远的距离，作为独立的系统，现在则变成了两个略有不同的能级 —— 是的，它们彼此非常非常接近，但仍然不同。这确保了系统（现在由两个原子组成）中的所有电子都具有不同的量子数。

We also saw in the previous chapter that the Pauli exclusion principle states that no two electrons can share the same quantum numbers. If we push together two hydrogen atoms so that they interact and form a single system, the energy levels of the electrons in one atom must have slightly different values than the electrons in the other atom. I show this in Figure 2.2. What was a single level in hydrogen gas, with all the atoms separated by very large distances and acting as independent systems, now becomes two slightly different levels – yes, they are very, very close to each other, but they are still different. This ensures that all the electrons in the system, which is now composed of two atoms, have different quantum numbers.

现在考虑固体的情况。每立方厘米大约有 5 × 10 ^22个硅原子，也就是说，在比方糖略小的空间里，有 5 后面跟着 22 个零。我们再也不能像讨论单个氢原子或氢气那样讨论离散能级了。现在我们需要讨论能带（图 2.3）。（试着在一张纸上画 10 ^{22条线！）}

Now consider the case of a solid. There are approximately 5 × 10²² silicon atoms per cm³, that is, a 5 followed by 22 zeros in a space a little smaller than a sugar cube. We can no longer talk about discrete energy levels, as we did with a single hydrogen atom or hydrogen gas. Now we need to talk about energy bands (Figure 2.3). (Try to draw 10²² lines on a piece of paper!)

能带解释了绝缘体、金属和半导体之间的区别。一切都取决于原子外层能级（即价带级）中有多少电子，原子在形成固体时如何共享电子，以及能带之间的间隔是多少。

Energy bands explain the difference between an insulator, a metal, and a semiconductor. Everything depends on how many electrons are in the atom's outer energy level, that is, the valence band level, how the atoms share electrons when they form a solid, and what the separation is between the bands.

想象一个充满气体的腔室。原子四处弹跳，互不干扰。现在我们开始缩小腔室，使原子之间的距离（原子间距离a）越来越小（图 2.4）。

Imagine a chamber filled with a gas. The atoms are bouncing around without interfering with each other. Now we start shrinking the chamber, making the distance between atoms – the interatomic distance, a – smaller and smaller (Figure 2.4).

在图 2.4的右侧，当原子间距离a非常大（无穷大）时，原子之间相距甚远，电子之间不会相互作用。当它们相距那么远时，所有单个原子都具有相同的能级。随着原子间距离变小，在某个点上，原子（从外层轨道中的原子开始）开始相互作用，能级开始变宽以满足泡利不相容原理。自然界决定了固体中实际的原子间距离a 。例如，在硅中，原子间距离（在晶体中称为晶格常数）为 5.431 埃（5.431 Å：一个 A 上面有一个微小的 o）。1 埃等于 1 × 10 ⁻¹⁰米。

When a, the interatomic distance, is very large (infinity) at the right of Figure 2.4, the atoms are so far separated that the electrons do not interact with each other. When they are that separated, all the individual atoms have the same energy levels. As the distance between atoms gets smaller, at some point the atoms (beginning with those in the outer orbits) start interacting, and the energy levels begin broadening to satisfy Pauli's exclusion principle. Nature determines the actual interatomic distance, a, in a solid. In silicon, for example, the interatomic distance (called the lattice constant in crystals) is 5.431 angstroms (5.431 Å: an A with a tiny o on top). An angstrom is equal to 1 × 10⁻¹⁰ m.

请注意，在图 2.4中，随着原子间距离变小，能级开始以不同的方式分离。在固体的平衡间距下，第一和第二能级 A 和 B 之间的分离非常大；第二和第三能级 B 和 C 之间有分离，但分离要小得多。最后，第三、第四和第五能级（C、D 和 E）之间没有分离。它们相互侵占。这是意料之中的，因为外带中的电子比内带中的电子先开始相互作用。

Note in Figure 2.4 that as the interatomic distance gets smaller, the levels start separating in different ways. At the solid's equilibrium spacing, the separation between the first and second bands, A and B, is very large; between the second and third levels, B and C, there is a separation, but it is much smaller. Finally, there is no separation between the third, fourth, and fifth bands (C, D, and E). They encroach on each other. This is expected, because the electrons in the outer bands start to interact before the inner ones do.

在绝对零度（0 K，-273°C，-460°F）下，系统中没有任何能量，所有电子都处于允许的最低轨道；在固体中，它们都处于可能的最低能带中。我们将在 0 K 时被一些电子占据的最高能带称为价带，我们将其上方的下一个能带称为价带，该能带完全没有电子。电子——导带。你马上就会明白为什么。我们将两个能带之间的能量间隔称为能隙（Eg），因为任何电子都不允许具有这些中间能量。以下是绝对零度下所有可能的情况：

At absolute zero (0 K, –273°C, –460°F), there is no energy whatsoever in the system, and all electrons are at the lowest allowed orbit; in a solid, they are all in the lowest possible energy band. We call the highest energy band occupied with some electrons at 0 K the valence band, and we call the next energy band above it – which is totally empty of electrons – the conduction band. You'll see why in a minute. We call the energy separation between the two bands the energy gap (Eg) because no electrons are allowed to have these in‐between energies. Here are all the possible cases at absolute zero:

1. 价带中充满了电子，没有空间再容纳更多电子。
2. The valence band is full of electrons; there is no space for any more.
3. 价带中没有充满电子。其中有空隙，可以接受额外的电子。
4. The valence band is not full of electrons. There are empty spaces that can accept additional electrons.
5. 导带与价带之间有一个很小的能隙，例如 B 级和 C 级的分离。
6. The conduction band is separated from the valence band with a small energy gap, such as the separation of levels B and C.
7. 导带与价带之间具有较大的能隙，例如 A 和 B 之间的能隙。
8. The conduction band is separated from the valence band with a large energy gap, such as that between A and B.
9. 两个带（例如 C 和 D 或 D 和 E）之间根本没有分离。导带接触或落在价带内。
10. There is no separation at all between two bands such as C and D or D and E. The conduction band touches or falls inside the valence band.

让我们逐一看一下这些案例。

Let's take a look at each of these cases.

2.2 绝缘体

2.2 The Insulator

我们首先考虑价带充满电子（情况 1）且价带和导带之间存在较大间隙（情况 4）的情况。我在图 2.5中对此进行了说明。想象一下，价带是一个充满汽车（电子）的停车场，其上方是导带，相当于一条空旷的高速公路。停车场中的汽车无法移动，因为没有空间可供它们行驶。高速公路上没有汽车，因此那里也没有移动。如果我给这种材料施加电压（图 2.5右侧），什么也不会移动。停车场和高速公路之间的间隙太大，汽车无法跳跃，因此无论我施加什么电压，电子都无法移动；这种材料中根本没有电流流动。绝缘体就是这种情况。在施加电压下，没有电子可以移动。

Let's consider first the situation in which the valence band is full of electrons (case 1) and there is a large gap separating the valence and conduction bands (case 4). I illustrate this in Figure 2.5. Imagine that the valence band is a parking lot full of cars (electrons), and above it is the conduction band, equivalent to an empty freeway. The cars in the parking lot cannot move because there is no space for them to go to. No cars are on the freeway, so there is no movement up there, either. If I apply a voltage to this material (right, in Figure 2.5), nothing moves. The gap between the parking lot and the freeway is too large for cars to jump, and thus no matter what voltage I apply, the electrons cannot move; there is no current flowing in this material at all. This is the case for insulators. No electrons can move under an applied voltage.

现在，我想澄清一下能带的概念，这个概念有时会令人困惑。能带不是电子所在的物理位置，就像地球轨道不是铁轨或地球在其上行进的圆形道路一样。炮弹会沿着抛物线路径行进，即使炮弹滚过的没有“路径”、管道、道路或轨道。能带的概念与此类似。电子位于材料中的任何地方，但它们的能量值限制在某些允许范围内 – 我们称之为能带的能量范围。在任何情况下，电子的能量都不允许介于价带最高能量和导带最低能量之间。

At this point, I would like to clarify the concept of bands, which can sometimes be confusing. The bands are not a physical location where electrons reside, just as earth's orbit is not a railroad track or a circular road on top of which the earth travels. A cannonball follows a parabolic path even though there is no “path,” pipe, road, or track that the ball rolls over. The concept of energy bands is similar. The electrons are anywhere in the material, but they have energies with values restricted to certain allowed ranges – energy ranges that we call bands. The electrons are not allowed, under any circumstances, to have energy between the highest energy of the valence band and the lowest energy of the conduction band.

2.3 指挥

2.3 The Conductor

现在考虑价带中未充满电子的情况（情况 2），如图2.6所示，或者价带扩展过多以致导带侵入价带的情况（情况 5），如图2.7所示。这两种情况非常相似。

Now consider the situation where the valence band is not full of electrons (case 2), as I show in Figure 2.6, or where the bands expand so much that the conduction band encroaches into the valence band (case 5), as I show in Figure 2.7. These two cases are very similar.

即使在绝对零度（如我在左侧所示），电子也有足够的空间移动。在室温下，能量比绝对零度高出很多，电子有足够的能量到处移动。这就像有一个半满的车库，两端各有两扇门，直接连接到高速公路，而且温度足够高，人们想动起来。如果我们在这种材料，电子可以毫无问题地到达它们想去的地方，即正极。还要注意的是，驶上高速公路的汽车在车库里留下了空位，所以车库里的一些汽车也可以在停车场内从一个地方移动到另一个地方。正如你所预料的，这是一个导体。只要施加电压，大量电子就可以自由移动。

Even at absolute zero (as I show on the left), there is lots of space for the electrons to move. At room temperature, which is quite an increase in energy from absolute zero, the electrons have more than enough energy to move all over the place. It is like having a half‐full garage with two doors at each end connected directly to a freeway, and it is warm enough that people want to get moving. If we apply a voltage (the motivating force) across this material, the electrons have no problem going where they want to go, i.e. to the positive terminal. Also note that the cars that moved up to the freeway left empty spaces in the garage, so some cars in the garage can also move from one location to another inside the parking structure. As you may expect, this is a conductor. Tons of electrons are free to move as soon as a voltage is applied.

2.4 半导体

2.4 The Semiconductor

现在考虑价带已满（情况 1），但导带和价带之间有小间隙（情况 3）的情况。在绝对零度时，所有电子都处于价带中，这是允许的最低能量，因此价带完全已满。但在室温下，系统中有足够的热能，从统计上讲，一些电子可以从价带跃迁到导带。我在图 2.8中显示了这种情况。

Now consider the situation where the valence band is full (case 1), but there is a small gap between the conduction and valence bands (case 3). At absolute zero, all the electrons are in the valence band, the lowest allowed energy, and thus the valence band is completely full. But at room temperature, there is enough thermal energy in the system that, statistically, a few electrons can make the jump from the valence band to the conduction band. I show this in Figure 2.8.

^{正如我之前所说，在纯硅中，每立方厘米}有 5 × 10 ^{22 个}硅原子；但从统计上讲，只有极少量（每立方厘米 1.45 × 10 10 个电子^）在室温下具有足够的能量从价带跃迁到导带。虽然每立方厘米 10 ^10个电子看起来很大，但这只是 3.4 × 10 ^{12 个硅原子（3400 000 000 000 个中的 1 个）中的一个孤立电子获得跃迁到导带所需的能量。}图 2.8说明了这种情况。请注意，当极少数电子跃迁到导带时，它们会留下一个空点，我们称之为空穴。空穴是称为p 粒子（p代表正粒子），因为它们看起来带正电荷。（请记住，每个硅原子都是中性的，也就是说，原子核中的质子（正电荷）数量与轨道中的电子数量相同。如果移除一个电子，原子就会带正电。）还要注意，在本征（即完全纯净的）半导体中，电子数n _i和空穴数p _i必须完全相同，因为每个跃迁到导带的电子都会在价带中留下一个空白空间（空穴）。我们使用下标 i 来指代这些本征电子和空穴。

In pure silicon, as I said earlier, there are 5 × 10²² silicon atoms per cm³; but only a tiny number (1.45 × 10¹⁰ electrons per cm³) have, statistically, sufficient energy at room temperature to jump from the valence band to the conduction band. Although 10¹⁰ electrons per cm³ looks very large, this is only a single solitary electron out of 3.4 × 10¹² silicon atoms (1 out of 3 400 000 000 000) that gain the energy needed to jump to the conduction band. This situation is exemplified in Figure 2.8. Note that as the very few electrons jump to the conduction band, they leave behind an empty spot, which we call a hole. The holes are called p‐particles (p for positive) because they appear to have a positive charge. (Remember, each silicon atom is neutral, that is, it has as many protons – positive charges – in the nucleus as it has electrons in the orbits. If you remove one electron, the atom becomes positively charged.) Notice also that in an intrinsic (i.e. perfectly pure) semiconductor, the number of electrons, n_i, and the number of holes, p_i, have to be exactly the same, since every electron that jumps to the conduction band leaves behind an empty space (a hole) in the valence band. We refer to these intrinsic electrons and holes using the subscript i.

考虑一下当我们施加电压时会发生什么，如图2.8右侧所示。电子向左移动到正极：导带中的电子和左侧有空隙的价带中的电子。我们喜欢说，空穴（空隙）向相反方向移动——向右，向负极移动——所以空穴就像一个向负极移动的正粒子。你稍后会明白为什么。

Consider what happens when we apply a voltage, as I show on the right in Figure 2.8. Electrons move left toward the positive side: both the electrons in the conduction band and those electrons in the valence band that have an empty space to their left. We like to say, and you will see why later, that the hole (the empty space) is moving in the opposite direction – to the right, toward the negative side – so the hole acts like a positive particle moving to the negative terminal.

由于热能决定了有多少电子可以跃迁到导带并自由移动，以及有多少空穴被留下，因此可以推测半导体中的电流高度依赖于温度，即热能。图 2.9显示了硅和砷化镓 (GaAs) 导带中自由电子的数量与温度的关系。

Since it is the thermal energy that determines how many electrons can jump to the conduction band and are free to move, and how many holes are left behind, you can expect that the current in a semiconductor is highly dependent on the temperature, that is, the thermal energy. Figure 2.9 shows the number of free electrons in silicon and gallium‐arsenide (GaAs) in the conduction band as a function of temperature.

请注意，图中固有电子和空穴的数量（垂直y轴）是对数的，而水平x轴上的温度（T）不是温度，而是绝对单位（开尔文）的 1000/温度。实际温度（摄氏度）位于图的右侧。以这种方式绘制的优势在于，自由电子数量随 1/ T的变化非常线性。为方便起见，我标记了室温（27 °C）、冰点（0 °C）和水沸点（100 °C）的值。

Note that the number of intrinsic electrons and holes in the plot (the vertical y axis) is logarithmic, and the temperature (T, on the horizontal x‐axis) is not the temperature but 1000/temperature in absolute units (Kelvin). The actual temperature in degrees Celsius is at the right side of the plot. The advantage of plotting it this way is that the change in the number of free electrons versus 1/T is very linear. For convenience, I mark the values at room temperature (27 °C), at freezing (0 °C) and at the boiling point of water (100 °C).

自由电荷的数量也取决于光。光子可以撞击硅晶体，将其能量传递给电子，电子可以利用该能量跃迁到导带。

The number of free charges is also dependent on the light. Photons can hit the silicon crystal and give their energy to an electron that can use this energy to jump to the conduction band.

从图 2.9可以看出，在室温（27°C，300 K）下，硅中电子和空穴的数量为 1.45 × 10 ¹⁰  cm ⁻³，正如我之前所说；但如果我们将其冷却到 0°C（冰水温度），数量会迅速减少到 2 × 10 ⁹  cm ⁻³，减少了 10 倍。如果我们反其道而行之，将半导体浸入沸水中（100°C），自由电荷的数量会增加到 3 × 10 ¹² cm ⁻³，比室温下多 300 倍。根据经验，硅中的自由电荷数量每升高 7°C 就会翻一番。

Looking at Figure 2.9, at room temperature (27 °C, 300 K), the number of electrons and holes in silicon is 1.45 × 10¹⁰ cm⁻³, as I said earlier; but if we cool it down to 0 °C (the temperature of ice water), the number decreases rapidly to 2 × 10⁹ cm⁻³, a factor of 10 lower. If we do the opposite and immerse a semiconductor in boiling water (100 °C), the number of free charges increases to 3 × 10¹² cm⁻³, 300 times larger than at room temperature. As a rule of thumb, the number of free charges in silicon doubles every 7°C.

在同一张图中，我列出了第二大最常用半导体 GaAs 中的自由电荷数。由于 GaAs 中价带和导带之间的间距 ( Eg ) 大于 Si (1.43 eV vs. 1.12 eV)，因此纯 GaAs 材料中的自由载流子数远低于硅，为 1.79 × 10 ⁶ cm ⁻³。

In the same graph, I have the number of free charges in GaAs, the next‐most‐used semiconductor. Because the separation between the valence and conduction bands (Eg) in GaAs is larger than that of Si (1.43 eV vs. 1.12 eV), the number of free carriers in pure GaAs material is much lower than that of silicon, 1.79 × 10⁶ cm⁻³.

当我们讨论半导体器件的操作和使用时，请记住这种温度依赖性。当我们打开电子设备时，温度会升高，其电子特性也会发生变化。在第 9 章中，我讨论了设计师用来稳定电路的一些技巧。

Remember this temperature dependence when we talk about the operation and use of semiconductor devices. When we turn on an electronic device, the temperature increases, and its electronic properties change. In Chapter 9, I discuss some of the tricks that designers use to stabilize circuits.

2.5 题外话：水的类比

2.5 Digression: Water Analogy

假设你有一锅水，放在柜台上，温度为室温（25°C）。水没有流动。现在你把锅放在炉子上，把温度升到 100°C，也就是沸水的温度。有三种可能性：

Suppose you have a large pot of water sitting on the counter at room temperature (25 °C). The water is not moving. Now you place the pot on the stove and increase the temperature to 100 °C, the temperature of boiling water. There are three possibilities:

1. 锅沿比水面高很多。沸水留在锅中。锅沿太高，水不会溢出。
2. The rim of the pot is much higher than the level of the water. The boiling water remains in the pot. The rim is too high for the water to boil over.
3. 水灌满了锅，水一烧开，水就洒得到处都是。
4. The water fills the pot all the way to the top. As soon as the water starts boiling, water spill all over the stove.
5. 现在考虑一种中间情况。水位很高，但未达到锅沿。溢出的水量在很大程度上取决于原始水位与锅沿之间的距离。水位与锅沿之间的距离越大，从锅中溢出的水就越多。
6. Now consider an intermediate case. The water level is high, but it does not reach the rim. How much water spills over depends very much on the distance between the original water level and the rim of the pot. The larger the distance between the water level and the rim of the pot, the more water will spill from the pot.

您可以立即识别出这种类比。首先，水位和锅沿之间的距离类似于能隙。第一种情况是绝缘体，其中电子和空导带之间有很大距离。第二种情况是导体，其中只要有任何能量，电子就会开始溢出到导带中。最后，第三种情况是半导体，其中导带中的电子数量取决于能带之间的间隔。室温下硅中的自由电子比砷化镓中的多，因为砷化镓中的能带间隔要大得多。

You can immediately recognize the analogy. First, the separation of the water level and the rim of the pot is analogous to the energy gap. Case 1 is the insulator, where there is a large distance between the electrons and the empty conduction band. Case 2 is the conductor, where the electrons start spilling into the conduction band as soon as there is any energy at all. Finally, case 3 is the semiconductor, where the number of electrons in the conduction band depends on the separation between bands. There are more free electrons in silicon at room temperature than in GaAs because the separation of bands is much larger in GaAs.

我希望这个类比能帮助你理解能带在定义不同材料导电过程中的作用。如果你在前面的章节中遇到困难，那么可能值得回头再读一遍。

I hope the analogy helps you understand the effect of the bands in defining the conductive processes of different materials. If you had difficulty in the previous sections, it might be worthwhile to go back and read them again.

2.6 电荷的流动性

2.6 The Mobility of Charges

我不想再详细阐述，我先介绍一下迁移率这个概念。迁移率用符号μ来表示，它基本上是衡量电子和空穴移动难易程度的标准：与阻力相反。请看图 2.10。导带中的电子（就像高速公路上的汽车一样）如果没有任何阻碍，可以相当轻松地移动。空穴的移动就比较困难了。价带中的电子必须从一个原子跳到另一个相邻的原子，该原子的左侧有空隙。排成一线的下一个电子可以跳到前一个电子留下的空隙，依此类推。对于外部观察者来说，正电荷正在向右移动。你可以直观地看到电子运动比空穴运动更容易。

Without going into detail, I would like to introduce the concept of mobility. Mobility, with the symbol μ, is basically a measure of how easy it is for electrons and holes to move: the opposite of resistance. Look at Figure 2.10. An electron in the conduction band without any impediments, like a car on the freeway, can move quite easily. The hole has more problems moving. Electrons in the valence band have to hop from one atom to an adjacent one that has empty space at the left. The next electron in line can jump to the empty space that the previous electron left behind, and so on. To an external viewer, a positive charge is moving to the right. You can intuitively see that electron motion is easier than hole motion.

硅中电子的迁移率为μ _n = 1400 cm ² /( V  ×  s )，而空穴的迁移率仅为μ _p = 450 cm ² /( V  ×  s )。对于相同的施加电压，硅中电子的迁移率比空穴快三倍以上。这很有道理，而且对于所有半导体都是如此。

The mobility of electrons in silicon is μ_n = 1400 cm²/(V × s), while the mobility of holes is only μ_p = 450 cm²/(V × s). For the same applied voltage, the electrons in silicon are more than three times faster than the holes. This makes a lot of sense, and it is true for all semiconductors.

2.7 总结与结论

2.7 Summary and Conclusions

在本章中，我们了解了随着原子间距离的缩小，由于泡利不相容原理，气体能级如何扩散并变成能带。我们将具有电子的最低能带称为价带，将其上方没有电子的能带称为导带。根据价带中的电子数量以及价带和导带之间的距离，我们可以将物质分为导体、绝缘体或半导体。

In this chapter, we have seen how as we shrink the interatomic distance between atoms, due to the Pauli exclusion principle the gaseous energy levels spread and become bands. We call the lowest energy band that has electrons the valance band and the one above it, empty of electrons, the conduction band. Depending on how many electrons are in the valence band and how far the valence and conduction bands are separated, we have conductors, insulators, or semiconductors.

在绝对零度时，半导体的价带完全充满，而导带是空的。能带之间的间隔很小。在室温下，有相当多的热能，极少数电子有足够的能量移动到导带——它们可以自由移动。在价带中，缺失的电子留下一个空穴，其作用就像一个正电荷。

At absolute zero, the valence band of a semiconductor is completely full, and the conductions band is empty. The separation between the bands is small. At room temperature, there is quite a bit of thermal energy, and a very small number of electrons have sufficient energy to move to the conduction band – and they are free to move. In the valence band, the missing electrons leave a hole that acts as if it were a positive charge.

您需要理解本章中的关键概念才能进入下一章：

The key concepts in this chapter that you need to understand to proceed to the next chapter are as follows:

• 价带和导带的概念。
• The concepts of a valence band and a conduction band.
• 电子移动到导带需要很小的能隙的概念。
• The concept that a small energy gap is required for an electron to move to the conduction band.
• 空穴的概念——一个缺少电子的原子，在施加电压下，从相邻原子接受电子，从而将空穴像正电荷一样移向负极。
• The concept of the hole – an atom missing an electron, which, under an applied voltage, accepts an electron from a neighboring atom, thus moving the hole toward the negative terminal as if it were a positive charge.

如果您对这些概念感到满意，那么您就可以进入下一章了。

If you are comfortable with these concepts, you are ready to go to the next chapter.

附录 2.1 半导体的能隙

Appendix 2.1 Energy Gap in Semiconductors

半导体具有不同的能隙，以电子伏特 (eV) 为单位，即施加 1 V 电压下电子的能量（图 2.11）。正如您所预料的，1 电子伏特是非常小的能量（e = 1.602 × 10 ⁻¹⁹ 库仑）。最常用的半导体（锗、硅和砷化镓）的能隙分别为 0.67、1.12 和 1.43 eV。硅是最常用的，因为它更容易生长为没有（或数量很少）杂质和缺陷的纯晶体，也更容易注入可控数量的杂质。在下一章中，我将讨论为什么纯度和添加可控数量杂质的能力如此重要。

Semiconductors have different energy gaps measured in electron‐volts (eV), the energy of an electron under an applied voltage of 1 V (Figure 2.11). As you may expect, an electron‐volt is a very small amount of energy (e = 1.602 × 10⁻¹⁹ coulombs). The energy gaps of the most commonly used semiconductors – germanium, silicon, and gallium arsenide – are 0.67, 1.12, and 1.43 eV, respectively. Silicon is the most commonly used because it is easier to grow as pure crystals with no (or an insignificant number of) impurities and imperfections, and it is also easier to inject a controlled number of impurities. In the next chapter, I discuss why purity and the ability to add a controlled number of impurities are so important.

有一个有趣的网站，上面有大量关于元素的信息：http://periodictable.com/Elements/050/data.html。单击元素周期表中的任何元素都会显示其属性。此外，如果单击任何属性，它还会显示元素周期表中所有元素的该属性值。有趣的是，通过这个网站可以看到绝大多数元素都是导体。根据这个网站，在元素周期表的所有元素中，76 种是导体，5 种是绝缘体，只有 3 种是半导体：Si、Ge 和 Te。Te 的能隙为 0.45 eV。其余元素要么是气体，要么具有未知值。

There is an interesting website with a huge amount of information on the elements: http://periodictable.com/Elements/050/data.html. Clicking any element in the periodic table will tell you its properties. Furthermore, if you click any property, it will tell you the value of that property for all the elements in the periodic table. It is interesting to see, using this website, that the great majority of elements are conductors. According to this site, of all the elements in the periodic table, 76 are conductors, 5 are insulators, and only 3 are semiconductors: Si, Ge, and Te. Te has an energy gap of 0.45 eV. The rest of the elements are either gases or have unknown values.

附录 2.2 电子数和费米函数

Appendix 2.2 Number of Electrons and the Fermi Function

为了帮助您更好地理解材料中自由电子和空穴的数量，让我先给出费米-狄拉克函数（无需证明）。恩里科·费米（Enrico Fermi，1901-1954 年）是一位意大利物理学家，他于 1938 年移民到美国以逃避犹太人的迫害（他的妻子是犹太人）。保罗·狄拉克（Paul Dirac，1902-1984 年）是一位英国科学家。这两位物理学家在量子理论方面做了大量工作（图 2.12）。

To help you better understand how many electrons and holes are free in a material, let me state, without a proof, the Fermi–Dirac function. Enrico Fermi (1901–1954) was an Italian physicist who emigrated to the United States in 1938 to escape the persecution of Jews (his wife was Jewish). Paul Dirac (1902–1984) was a British scientist. These two physicists did a huge amount of work on quantum theory (Figure 2.12).

为了我们的目的，我们将研究他们的量子统计结果：费米-狄拉克函数，简称 F-D 函数，这是两位科学家于 1926 年独立开发的。

For our purposes, we will look at the results of their quantum statistics: the Fermi–Dirac function, or F‐D function for short, which both scientists developed independently in 1926.

奥地利物理学家路德维希·玻尔兹曼（Ludwig Boltzmann，1844-1906 年）开发了玻尔兹曼分布函数，该函数将气体的行为及其压力与温度联系起来。这仅适用于经典粒子。F-D 方程将量子力学理论应用于遵循泡利不相容原理的粒子。顺便说一句，这些统计数据适用于所有遵循泡利不相容假设的粒子，而不仅仅是电子，这些粒子被称为费米子。

Ludwig Boltzmann (1844–1906), an Austrian physicist, developed his Boltzmann distribution function, which related the behavior of gases and their pressure to their temperature. This applied only to classical particles. The F‐D equation applies the quantum mechanical theory to particles that behave under the Pauli exclusion principle. By the way, these statistics apply to all particles that obey the Pauli exclusion postulate, not just electrons, and these particles are called fermions.

无论如何，F‐D 公式是

Anyway, the F‐D formula is

(2.1)

其中F (E) 是能级 E 被电子占据的概率，E是该特定能级的能量，E _f是费米能级，k是玻尔兹曼常数 ( k = 1.38 × 10 ⁻²³ m ² kg/s ² T)，T是温度，单位为开尔文。请注意，给定能量的唯一变量是温度。

where F(E) is the probability that an energy level E is occupied by an electron, E is the energy of that specific level, E_f is the Fermi level, k is the Boltzmann constant (k = 1.38 × 10⁻²³ m² kg/s² T), and T is the temperature in units Kelvin. Note that the only variable for a given energy is the temperature.

在绝对零度T = 0 时，如果E  <  E _f ，则项e ^{( E - E} _f ^{)/ kT}等于无穷大，如果E  >  E _f ，则项 e ( E - E f )/kT 等于零（请记住，e 的正无穷大等于无穷大，e 的负无穷大等于零）。因此，F-D 函数告诉我们，在绝对零度时，所有高于E _{f 的}能级都是空的，其占用概率为零，而所有低于E _{f 的}能级都是满的，被占用的概率为 100%，就像我之前说的。当温度升高到室温（300 K）时，存在这样的可能性：一些电子处于允许的较高能级（即导带中），而允许的能级（即价带）中会丢失电子。F-D 函数是对称的，这也是理所当然的。它从数学上证实了我们在图 2.8中直观和图形化看到的内容。您可以立即看到，允许能带高于费米能级 0.1 eV 以上的概率为300 K 只有 2%，如果我们将费米能级提高 0.3 eV，它就会下降到大约 10 ⁻⁷，或者说每 1000 万个点中只有一个电子（图 2.13）。

At absolute zero, T = 0, the term e^(E–E_f^)/kT is equal to infinity if E < E_f and zero if E > E_f (remember that e raised to plus infinity is infinity and e raised to minus infinity is zero). Therefore, the F‐D function tells us that at absolute zero all energy levels above E_f are empty, and its probability of occupancy is zero, and all energy levels below E_f are full, with a 100% probability of being occupied, as I said earlier. As the temperature increases to room temperature (300 K), a slight probability exists that there are some electrons in the higher allowed energy levels, i.e. in the conduction band, and a loss of electrons in the allowed energy levels, the valence band. The F‐D function is symmetrical, as it should be. It confirms mathematically what we saw intuitively and graphically in Figure 2.8. You can see right away that the probability of allowed energy bands greater than 0.1 eV above the Fermi level at 300 K is only 2%, and if we go 0.3 eV above the Fermi level, it goes down to about 10⁻⁷ or just one electron in 10 million sites (Figure 2.13).

现在，让我用图形向您展示 F‐D 统计数据如何在数学上精确表示我刚才解释的内容。图 2.14与图 2.13相同，只是我交换了坐标轴并只绘制了一条曲线：300 K（室温）曲线。图 2.14显示在费米能级，电子占据能级的概率为 50%，当然，假设在此范围内存在允许的能级。高于费米能级的允许能级被占据的概率越来越低（图 2.15）。随着能量的增加，电子占据有效能级的概率减小，很快变为零。如果能量降低，则相反正确：在某个时刻，所有允许能量的 100% 都会被电子占据。300 K 下的 F-D 曲线永远不会改变。要改变形状，我们需要改变温度，如图2.13所示。在图 2.15中，请注意每个能带右侧的 F-D 函数彼此相同，也与图 2.14中的相同，只是它们更小以适应图形。对于绝缘体 (A) 的情况，如果考虑到能隙为 3 eV，费米能级位于中间，最低能级和费米能级之间的差为 1.5 eV，则导带中存在任何电子的概率几乎为零。如果我将这个能量差代入公式 (2.1)中，我会得到导带中最低能量被占据的概率：

Let me now show you graphically how the F‐D statistics represent mathematically exactly what I have just explained. Figure 2.14 is the same as Figure 2.13, except that I have exchanged the axes and drawn only one curve: the 300 K (room temperature) curve. Figure 2.14 shows that at the Fermi level, the probability of electrons occupying an energy level is 50%, assuming, of course, that there are allowed energy levels in that range. Allowed energy levels higher than the Fermi level have a lower and lower probability of being occupied (Figure 2.15). As the energy increases, the probability of having an electron occupying a valid energy level decreases, quickly going to zero. If the energy decreases, the opposite is true: at some point, 100% of all the allowed energies will be occupied by electrons. This F‐D curve at 300 K never changes. To change the shape, we need to change the temperature, as shown in Figure 2.13. In Figure 2.15, notice that the F‐D functions on the right for each energy band are identical to each other and also identical to the one in Figure 2.14, except that they are smaller to fit the figure. In the case of the insulator (A), the probability that there are any electrons in the conduction band is as close to nothing as it can get, if you consider that the energy gap is 3 eV, the Fermi level is in the middle, and the difference between the lowest level and the Fermi level is 1.5 eV. If I insert this energy difference in Eq. (2.1), I get the probability that the lowest energy in the conduction band is occupied:

(2.2)

这实际上根本不算什么。

This is practically nothing at all.

导体（B）的情况则刚好相反，在室温下，导体导带的较低能量处充满电子，而价带则有大量空位，也就是空穴。

The case of the conductor (B) is exactly the opposite. At room temperature, the lower energies of a conductor's conduction band are full of electrons, and the valence band has lots of empty sites, that is, holes.

半导体 (C) 位于中间。很少有电子的能量大到足以进入导带。硅的能隙等于 1.11 eV。因此，由于费米能级位于中间，硅导带的最低能量比费米能级高 0.555 eV。如果我在公式 (2.1)中使用此数字，则允许能量最低位置中存在电子的概率为 5 × 10 ⁻¹⁰：非常低，但不是零，正如我在第 2.4 节中提到的那样。

The semiconductor (C) is in the middle. Very few electrons have energies large enough to be in the conduction band. Silicon has an energy gap equal to 1.11 eV. So, since the Fermi level is in the middle, the lowest energy of the silicon's conduction band is 0.555 eV above the Fermi level. If I use this number in Eq. (2.1), the probability that there is an electron in this lowest of the allowed energy location is 5 × 10⁻¹⁰: very low, but not zero, as I mentioned in Section 2.4.

同样的统计分析告诉我们，电子和空穴的乘积为

The same statistical analysis tells us that the product of electrons and holes is given by

(2.3)

其中C是常数，Eg是导带和价带之间的能量差（即能隙），k是玻尔兹曼常数，T是温度（单位为开尔文）。请注意，C、Eg和k都是常数。该等式中唯一的变量是温度T。在本征半导体（即不含任何杂质的半导体）中，电子数必须与空穴数相同：

where C is a constant, Eg is the energy difference between the conduction and valence bands (that is, the energy gap), k is the Boltzmann constant, and T is the temperature in degrees Kelvin. Notice that C, Eg, and k are all constants. The only variable in this equation is the temperature, T. In an intrinsic semiconductor – that is, one without any impurities whatsoever – the number of electrons must be identical to the number of holes:

(2.4)

所以，

Therefore,

(2.5)

也就是说，在给定的温度下，材料中自由电子数量与自由空穴数量的乘积始终相同。

that is, the product of the number of free electrons and free holes in a material is always the same at a given temperature.

半导体中的本征电荷数量会随着温度发生剧烈变化，因为温度出现在指数函数的分母中。图 2.9显示了纯本征半导体（如硅或 GaAs）中的自由电荷数量随温度的变化情况。请注意，y轴是对数的。

The number of intrinsic charges in a semiconductor changes drastically with the temperature because the temperature appears in the denominator of the exponential function. Figure 2.9 shows how much the number of free charges in a pure, intrinsic semiconductor like silicon or GaAs changes with temperature. Note that the y axis is logarithmic.

3.1 半导体材料

3.1 Semiconductor Materials

半导体材料有很多种，每种材料都有自己的优点和缺点。图 1.17我展示了门捷列夫元素周期表的一部分，其中包括我们用作半导体的所有元素。单元素半导体是第 IV 族元素。第 IV 族元素是那些具有四个价电子的材料，即最外层轨道或价带上有四个电子。这些也是我们使用的主要半导体材料，硅和锗。还有化合物半导体，其中价电子数平均为 4（例如第 III 族和第 V 族，因为 [3 + 5]/2 = 4）。此类化合物由第 III 族和第 V 族或第 II 族和第 VI 族元素形成。这些化合物半导体中最重要的是砷化镓，GaAs。

There are many semiconductor materials, each having its own advantages and disadvantages. Figure 1.17 I showed a portion of the Mendeleev's periodic table that includes all the elements that we use as semiconductors. The single element semiconductors are those in group IV. Group IV elements are those materials that have four valence electrons, that is, four electrons in the outermost orbit or on the valence band. These are also the main semiconductor materials we use, silicon and germanium. There are also compound semiconductors where the number of valence electrons averages four (e.g. groups III and V since [3 + 5]/2 = 4). Such compounds are formed with elements from groups III and V, or groups II and VI. The most important of these compound semiconductors is gallium arsenide, GaAs.

下面我仅列出最常用的半导体。

I list below only the most commonly used semiconductors.

1. 元素半导体是元素周期表第 IV 族的元素半导体。它们是：
   1. 1.1) 硅（Si），其能隙为1.12 eV。硅是迄今为止微电子领域最常用的材料。
   2. 1.2) 锗（Ge），其能隙比硅小，为 0.67 eV。在电子时代初期，锗被广泛使用。
2. Element semiconductors are those in group IV of the periodic table. They are:
   1. 1.1) Silicon (Si), which has an energy gap of 1.12 eV. Silicon is by far the most commonly used material in microelectronics.
   2. 1.2) Germanium (Ge), which has a smaller energy gap, 0.67 eV, than silicon. It was very much used at the beginning of the electronic era.
3. 复合半导体由两个原子组成，一个属于III族，另一个属于V族，或一个属于II族，另一个属于VI族，因此化合物材料在价带中平均有四个电子。
   1. 2.1) 砷化镓 (GaAs)是第二大常用的半导体材料。其能隙比硅大，为 1.43 eV，这对于微波、激光和某些类型的高效太阳能电池等应用非常有用。生长非常纯净的 GaAs 材料非常困难且成本高昂。
   2. 2.2） 锑化铟（InSb）的能隙很窄，仅为0.17eV，广泛应用于红外探测器。
   3. 2.3)不太常见的是砷化铟（InAs），其能隙为0.36eV​​，以及碲化镉（CaTe），其能隙为1.49eV，用于太阳能电池。
4. Compound semiconductors consists of two atoms, one in group III and the other in group V, or one in group II and the other in group VI, so that the compound material has an average of four electrons in the valence band.
   1. 2.1) Gallium arsenide (GaAs) is the second most used semiconductor material. The energy gap is larger than silicon, 1.43 eV, which is very useful for some applications such as microwave, lasers, and some types of very efficient solar cells. It is difficult and expensive to grow very pure GaAs material.
   2. 2.2) Indium antimonite (InSb) has a very narrow energy gap, only 0.17 eV. It is widely used in infrared detectors.
   3. 2.3) Less common are indium arsenide (InAs), with an energy gap of 0.36 eV, and cadmium telluride (CaTe), with energy gap of 1.49 eV, which is used in solar cells.
5. 还有一些三级化合物，如HgCaTe（汞镉碲酸盐）。它的优点在于，其能隙会根据成分而变化，从几乎 0 到 1.5 eV。它几乎专门用于红外探测器，并且应用广泛。我将在第 4.6 节讨论 HgCaTe 探测器。
6. There are also some tertiary compounds, like HgCaTe (mercury–cadmium–tellurite). It has the great advantage that its energy gap changes depending on the composition, from almost 0 to 1.5 eV. It is almost exclusively and widely used in infrared detectors. I discuss HgCaTe detectors in Section 4.6.

所有这些半导体的共同点是它们要么具有四个价电子，要么在复合半导体中，它们价带中的平均电子数为四个。

What is common for all these semiconductors is that they have either four valence electrons or, in compound semiconductors, their average number of electrons in the valence band is four.

3.2 半导体材料简介

3.2 Short Summary of Semiconductor Materials

3.2.1 硅

3.2.1 Silicon

目前最常用的半导体材料是硅。我将在本书中用硅来解释半导体技术。

By far the most commonly used semiconductor material is silicon. I will use silicon to explain semiconductor technology throughout this book.

硅具有许多优点：

Silicon has many advantages:

1. 硅是地球上第二常见的元素（28%），仅次于氧（46%）。
2. Silicon is the second most common element on earth (28%) after oxygen (46%).
3. 经过多年的使用，硅已经成为电子产品中最便宜、使用最广泛的材料。
4. The many years of use has made silicon the cheapest and the most used material in electronics.
5. 硅可以生长到非常纯净。
6. Silicon can be grown to be very pure.
7. 硅晶圆可以做得非常大，达到 300 毫米（近一英尺），目前的研究正在将其尺寸扩大到 450 毫米。
8. Silicon wafers can be very large, 300 mm (almost a foot), with research now being done to grow them to 450 mm.
9. 硅又硬又强，所以我们可以轻松处理晶圆（当然要非常小心）。
10. Silicon is hard and strong so we can handle the wafers easily (with lots of care, of course).
11. 硅具有易于生长的自然氧化物，与硅的结构相匹配，具有良好的绝缘性能和电性能。
12. Silicon has a natural oxide that is easy to grow, matches the structure of silicon, and has good insolating and electric properties.
13. 我们可以蚀刻氧化物，在其中形成明确的开口。这样我们就可以通过插入各种所需的杂质来局部改变硅的性质。
14. We can etch the oxide to make well‐defined openings in it. This allows us to change locally the properties of silicon by inserting a variety of desired impurities.

我在第 10 章讨论集成电路制造时介绍了许多这些特性。我所说的关于硅的大部分内容同样适用于其他半导体。图 3.1显示了硅的晶体结构。

I cover many of these properties in Chapter 10 when I discuss the fabrication of integrated circuits. Most of what I say about silicon is equally relevant for the other semiconductors. Figure 3.1 shows the crystallographic structure of silicon.

硅的钻石晶体结构是最坚固的结构之一。如果你看图3.1中虚线框内的黑色原子，你会看到中心的原子连接在一起到虚线框每个角上的四个最近邻原子。正如我们所见，每个原子都有四个价电子，因此它们相互吸引并形成所谓的共价键。通过共享电子，每个原子以非常坚固和稳定的结构完成外壳。

The diamond crystal structure of silicon is one of the strongest. If you look at the black atoms inside the dashed box in Figure 3.1, you will see that the atom at the center is joined to the four closest neighbor atoms at each corner of the dashed box. Each atom, as we have seen, has four valence electrons, so they grab each other and form what we call a covalent bond. By sharing electrons, each atom completes the outer shell in a very strong and stable configuration.

3.2.2 锗

3.2.2 Germanium

锗是1886年发现的，仅仅135年前，作者是德国化学家克莱门斯温克勒（Clemens Winkler，1838-1904；图3.2 ），他将他发现的元素命名为锗（他显然是德国人）。

Germanium was discovered in 1886, a mere 135 years ago, by Clemens Winkler (1838–1904; Figure 3.2) a German chemist, who called his discovered element germanium (he was obviously German).

有趣的是，虽然 Ge 元素现在已广为人知，但在温克勒发现 Ge 之前，人们就已经知道了 70 多种其他元素。1864 年，门捷列夫发表了元素周期表（图 1.5）。门捷列夫在元素周期表中为 Ge 留了一个位置，预言了它的存在以及质量和电子数等基本属性。锗共有 32 个电子，包括四个价电子。它的晶体结构也是金刚石结构（图 3.1），与硅相同。

It is interesting that although now the element Ge is very well known, there were more than 70 other elements known before Winkler discovered Ge, 18 years after Mendeleev published his periodic table in 1864, Figure 1.5. Mendeleev left a place‐holder in his periodic table for Ge, predicting its existence and basic properties like mass and number of electrons. Germanium has a total of 32 electrons, including the four valence electrons. Its crystallographic structure is also a diamond structure (Figure 3.1), the same as silicon.

有趣的是，贝尔实验室的 John Bardeen、William Shockley 和 Walter Brattain 领导的工程师团队发明的第一个晶体管（图 3.3）使用了 Ge。这三位美国科学家因在晶体管方面的研究获得了 1956 年的诺贝尔奖。他们取了两片金箔，并将其贴在三角形隔离器的两侧，使得三角形底部的两片金箔之间的距离很小。他们将其放在一块锗上，并证明了箔之间的电流可以通过锗中的电压进行调制，也就是说，他们证明了放大作用。

It is also interesting that the first transistor invented at Bell Labs by a team of engineers led by John Bardeen, William Shockley, and Walter Brattain (Figure 3.3) used Ge. These three American scientists won the Nobel prize for developing transistor action in 1956. They took two gold foils and attached them to two sides of a triangular isolator so that there was little distance between the two foils at the bottom of the triangle. They set that over a piece of germanium and demonstrated that the current between the foils could be modulated by the voltage in the germanium, that is, they demonstrated amplification.

硅材料储量丰富且价格低廉，具有更好的散热性能，因此其他材料仅用于次要和专门用途。现在材料生长技术已经大大改进，人们对锗的兴趣也越来越浓厚。锗中的电子移动速度比硅快 10 倍左右，而空穴速度提高了四倍。现在对计算机速度的要求越来越高，锗的这一特性使得锗器件更受欢迎。

The silicon material is so abundant and inexpensive, with better thermal properties to get rid of heat, that other materials are only used for minor and specialized applications. Now that material growing techniques have improved enormously, there is more interest in germanium. The electrons in Ge move about 10 times faster than in silicon and the holes move four times faster. Now that higher computer speed are being demanded, this germanium property makes germanium devices more desirable.

由于硅和锗具有相同的晶体结构，因此可以在硅晶片上生长锗。硅的晶格常数为 5.43 Å，锗的晶格常数为 5.66 Å。两者并不相同，但彼此接近。

Because both silicon and germanium have the same crystallographic structure it is possible to grow germanium on top of a silicon wafer. The lattice constant of silicon is 5.43 Å and that of germanium is 5.66 Å. Not the same but close to each other.

锗还用于红外探测器和光谱仪。

Germanium is also used in infrared detectors and spectroscopes.

3.2.3 砷化镓

3.2.3 Gallium Arsenide

GaAs 与 Si 相比，与 Ge 相反。GaAs 的能隙大于 Si，这使其适用于许多应用，包括微波和激光二极管。与 Si 相比，GaAs 可以更容易地吸收和发射光子。GaAs 的晶体结构（图 3.4）称为闪锌矿，与 Si 的金刚石结构非常相似。唯一的区别是，一排镓贯穿一排砷，但同样，每个原子都通过四个价电子与周围的原子相连。

GaAs compared to Si is the opposite of Ge. Its energy gap is larger than that of Si, which makes it suitable for many applications, including microwave and laser diodes. It can absorb light photons and emit them more easily than Si can. The crystallographic structure of GaAs (Figure 3.4) is called zincblende and it is very similar to the diamond structure of Si. The only difference is that a row of gallium interpenetrates a row of arsenic but again, each atom is attached to the surrounding ones with by four valence electrons.

这种键合是由于砷将一个电子让给镓，因此镓和砷共享所需的四个电子，从而形成类似于硅和锗的共价键。将一个或多个电子从一个原子转移到另一个原子以将它们结合在一起的过程称为离子键合。大多数 III-V 族半导体化合物（InSb、GaAs、GaSb、InP、GaP 等）都具有这种晶体结构。

The bonding is due to the fact that the arsenic gives up one electron to the gallium so that both gallium and arsenic share the required four electrons to form similar covalent bonding to that in silicon and germanium. The transfer of one or more electrons from one atom to another to bond them together is called ionic bonding. Most of the group III–V semiconductor compounds (InSb, GaAs, GaSb, InP, GaP, etc.) have this crystallographic structure.

图 3.5的平面图显示了 II-VI 族化合物中电子如何形成键。两个相邻的碲原子分别向镉原子借出一个电子，形成坚固的闪锌矿晶体结构。

The planar drawing of Figure 3.5 shows how the electrons form a bond in a II–VI compound. Two neighboring tellurium atoms lend one electron each to the cadmium atom to form the strong zincblende crystal structure.

3.3 本征半导体

3.3 Intrinsic Semiconductors

本征半导体是指仅由一组原子（例如 Si 原子或 GaAs 原子）组成的半导体晶体，不含任何杂质或晶体缺陷。

By an intrinsic semiconductor we mean a semiconductor crystal composed of just one set of atoms, Si atoms or GaAs atoms, for example, without any impurities or crystallographic defects whatsoever.

硅有 4 个价电子。这使得其晶体结构（图 3.1）成为原子间最强的键之一，与钻石的结构相同。4 个电子位于 3p 壳层，该壳层有容纳 8 个电子的空间。这 4 个电子是价电子。在生长纯晶体时，硅原子会自然地与周围的原子结合，因此每个原子与其 4 个邻居共享 8 个电子。这种共享会产生一个完整的壳层。图 3.1以图形方式显示了 Si 晶体中原子的三维排列。黑色线和球表示一个原子，其价电子与周围的 4 个原子牢固地结合。图 3.6是 Si 原子更抽象的二维表示，其中 4 个价电子表示为围绕原子核的线。

Silicon has four valence electrons. This makes the crystal structure (Figure 3.1) one of the strongest bonds between atoms, the same structure as diamond. The four electrons are in shell number 3p, a shell that has space for eight electrons. These four are the valence electrons. As we grow a pure crystal, silicon atoms naturally bond with the surrounding atoms so that each atom shares eight electrons with its four neighbors. This sharing results in a complete shell. Figure 3.1 shows graphically the three‐dimensional arrangement of atoms in an Si crystal. The blackened lines and balls show one atom, with the valence electrons bonding firmly with the surrounding four atoms. Figure 3.6 is a more abstract two‐dimensional representation of an Si atom with the four valence electrons represented as lines around the nucleus.

现在，我使用二维表示（图 3.7）来展示 Si 原子在晶体中的排列方式。

Now, using our two‐dimensional representation (Figure 3.7), I show how the Si atoms arrange themselves in a crystal.

每个硅原子都与周围原子共享四个价电子，从而形成一个完整的壳层。之前说过，这叫做共价键。强共价键意味着我们需要很大的能量来打破其中一个键并得到一个“自由”电子，即可以在材料内部自由移动的电子。这正是能隙 ( Eg ) 的概念。能隙是对价带中的电子在施加电压后打破键并自由移动所需能量的直观表示。附着在原子上的 Si 电子需要 1.12 eV 的能量来打破键。之前说过，在室温下，从统计上讲，每 cm ^{3只有 1.45 × 10 10 个}电子有足够的能量来打破这个键。

Each silicon atom shares its four valence electrons with those of the surrounding atoms to form a complete shell. As I said before, this is called covalent bonding. The strong covalent bonding implies that we need a lot of energy to break one of these bonds and get a “free” electron, an electron that can move freely inside the material. This is precisely the concept of the energy gap (Eg). The energy gap is a visual representation of the energy that an electron in the valence band needs to break a bond and be free to move if I apply a voltage. A Si electron attached to its atom needs 1.12 eV of energy to break the bond. As I said before, at room temperature, statistically, only 1.45 × 10¹⁰ electrons per cm³ have sufficient energy to break this bond.

通过向硅或其他半导体材料中添加可控量的杂质，我可以彻底改变半导体的电学特性，正如我在下一节中解释的那样。

By adding a controlled amount of impurities to the silicon, or other semiconductor materials, I can change drastically the electrical properties of the semiconductor, as I explain in the next section.

3.4 掺杂半导体：n 型

3.4 Doped Semiconductors: n‐Type

元素周期表中第 V 族元素（氮、磷、砷和锑）的价带中有 5 个电子。假设我生长一个在 Si 晶体中，我添加了少量但可控的锑 (Sb) 原子，我的意思是非常微小的量，例如每 cm ^{3 1 × 10 16 个}Sb 原子，仍然比本征电子数n _{i 多得多，}但比 Si 原子的总数少得多。Sb 在外层轨道有 5 个电子，随时准备与存在的任何其他原子结合。请注意，我指的是每 5 × 10 ⁸（5 亿个）Si 原子中有一个 Sb 原子。孤独的 Sb 原子完全被 Si 原子包围。它别无选择，只能取代一个 Si 原子并与周围的原子结合；如果你无法打败它们，就加入它们。它用它的五个价电子中的四个与 Si 的四个价电子结合，但第五个电子会发生什么呢？参见图 3.8。

The elements in group V in the periodic table (nitrogen, phosphorous, arsenic, and antimony) have five electrons in the valence band. Suppose that, as I grow a Si crystal, I add a small, but controlled, amount of antimony (Sb) atoms, and I mean a very tiny amount, for example 1 × 10¹⁶ Sb atoms per cm³, still much larger than the number of intrinsic electrons, n_i, but much smaller than the total number of Si atoms. Sb has five electrons in the outer orbit ready to bond with whatever other atoms are present. Note that I am talking about one Sb atom for every 5 × 10⁸ (500 million) Si atoms. The lonely Sb atom is completely surrounded by Si atoms. It has no other choice but to replace a Si atom and bond with the surrounding atoms; if you can't beat them, join them. It uses four of its five valence electrons to bond with the four valence electrons of the Si, but what happens to the fifth electron? See Figure 3.8.

在绝对零度下，孤独的第五个电子（在图 3.8中以从 Sb 原子伸出的一条粗线表示）附着在它自己的 Sb 原子上，但这个键与其他四个键相比非常弱，需要很少的能量即可断开。 这意味着在室温下所有这些第五个电子都具有足够的能量来断开键并移动到导带。 因此，在室温下导带中的自由电子数与晶体中的 Sb 原子数相同，即每个 Sb 原子一个自由电子。 如果我们称 Sb 原子的密度为N _D（D 是因为这些原子被称为供体，也就是说，它们向晶体捐献一个自由电子），那么导带中的自由电子数非常接近 Sb 原子数，或n ≈ N _D。 （波浪形等号表示两个数字几乎相同或几乎相等。）附录 3.2解释了为什么导带中的自由电子数量几乎等于杂质原子的数量。我在图 3.9中显示了这个小得多的电离能。

At absolute zero temperature, the lonely fifth electron, which I show as a bold line sticking out from the Sb atom in Figure 3.8, is attached to its own Sb atom, but this bond is very weak compared to the other four bonds and needs very little energy to break away. What that means is that at room temperature all these fifth electrons have sufficient energy to break the bond and move to the conduction band. Thus, at room temperature there are as many free electrons in the conduction band as there are Sb atoms in the crystal, one free electron for each of the Sb atoms. If we call the density of Sb atoms N_D (D because these atoms are called donors, that is, they donate a free electron to the crystal) then the number of free electrons in the conduction band is very close to the number of Sb atoms, or n ≈ N_D. (The wiggly equal sign means that the two numbers are almost the same, or almost equal to each other.) Appendix 3.2 explains why the number of free electrons in the conduction band is almost equal to the number of impurity atoms. I show this much smaller ionization energy in Figure 3.9.

在图 3.9的能量图中，我想强调几点。首先，请记住，能隙Eg的整个概念是价带中的电子打破共价键并从价带跃迁到导带所需能量的图形表示。现在我们必须表示将第五个电子从 Sb 原子中释放出来所需的能量。很明显，打破第五个键所需的能量比将电子踢出价带所需的能量要低得多。因此，我们通过添加更靠近导带的离散能级来表示这个小得多的能量。我们已经看到，将电子从硅中释放出来所需的能量是Eg = 1.12 eV。将第五个电子从 Sb 原子中释放出来所需的能量几乎小 30 倍，E _D = 0.039 eV。我们将这个能级称为E _D，因为它是从施主原子中释放电子所需的能量。其次，Sb 原子彼此相距甚远，以至于它们之间不会相互作用。它们就像是被困在硅结构内的气体。因此，我用能级而不是能带来表示这种情况。

There are several things I would like to emphasize in the energy diagram of Figure 3.9. First, remember that the whole idea of the energy gap, Eg, is a graphical representation of the energy that an electron in the valence band needs to break the covalent bond and jump from the valence to the conduction band. Now we have to represent the energy that it takes to free the fifth electron from the Sb atom. It is obvious that the energy needed to break the fifth bond is much lower than that needed to kick the electron from the valence band. So we represent this much smaller energy by adding discrete energy levels much closer to the conduction band. We have already seen that the energy needed to free an electron from the silicon is Eg = 1.12 eV. The energy needed to free the fifth electron from the Sb atom is almost 30 times smaller, E_D = 0.039 eV. We call this level E_D because it is the energy needed to free an electron from a donor atom. Second, the Sb atoms are so far separated from one another that they do not interact between themselves. They are like gasses trapped inside a silicon structure. Therefore, I represent that situation with an energy level, not an energy band.

在 0 K 时没有能量，因此所有电子都附着在各自的原子上，如图3.9左侧所示。导带中没有电子，但在室温下 300 K，有足够的能量进行电离，也就是说，将所有第五电子从 Sb 原子中释放出来。我在图 3.9右侧显示了这种情况。第五电子的所有能级都是空的。我忽略了来自价带的极少量电子。附录 3.2更准确地解释了为什么在室温下施主能级中的所有电子都会进入导带。

At 0 K there is no energy, so all the electrons are attached to their respective atoms, as I show on the left of Figure 3.9. There are no electrons in the conduction band, but at room temperature, 300 K, there is sufficient energy to ionize, that is, to free all the fifth electrons from the Sb atoms. I show this condition on the right of Figure 3.9. All the energy levels of the fifth electrons are empty. I ignore the tiny number of electrons that come from the valence band. Appendix 3.2 explains more precisely why all the electrons in the donor level go to the conduction band at room temperature.

因此，导带中的自由电子数量n为：

The number of free electrons, n, in the conduction band is therefore:

(3.1)

因为n _i与杂质原子的数量N _D相比微不足道。

since n_i is insignificant compared to N_D, the number of impurity atoms.

我在附录 2.2中指出，电子数n与空穴数p的乘积是常数。因此

I showed in Appendix 2.2 that the product of the number of electrons, n, times the number of holes, p, is constant. Thus

(3.2)

因为n _i =  p _i 。因此，如果n 型半导体中的电子数n为 10 ¹⁶（等式 3.1），则空穴数p将是

since n_i = p_i. Therefore, if the number of electrons, n, in an n‐type semiconductor is 10¹⁶ (Eq. 3.1) then the number of holes, p, is going to be

(3.3)

看看比率（仅使用 10 的幂）：

Look at the ratios (using only the powers of 10):

• 硅中的原子数 =^每立方厘米10 ²²
• number of atoms in silicon = 10²² per cm³
• 杂质供体数量，N _D = 10 ¹⁶ / cm ³
• number of impurity donors, N_D = 10¹⁶ per cm³
• 300 K 时导带中的自由电子数，n = 10 ¹⁶ /cm ³
• number of free electrons in the conduction band at 300 K, n = 10¹⁶ per cm³
• 本征电荷数，n _i = 10 ¹⁰每 cm ³
• number of intrinsic charges, n_i = 10¹⁰ per cm³
• 孔数，p = 10 ⁴ / cm ³。
• number of holes, p = 10⁴ per cm³.

真是个差距。还要注意，来自价带的电子数必须与价带中剩余的空穴数相同，这个数字是 10 ⁴。因此，我有充分的理由忽略方程 (3.1)中的n _i。这让您了解我能改变半导体属性的程度。

What a spread. Also note that the number of electrons coming from the valence band has to be the same as the number of holes left in the valence band, and this number is 10⁴. So, I am quite justified in ignoring n_i in Eq. (3.1). That gives you an idea of how much I can change the properties of semiconductors.

我刚刚描述了什么是 n 型半导体，之所以称为 n 型，是因为在室温下，我在导带中添加了大量自由电子，并且出于实际目的消除了价带中的空穴数量（​​继续我们第2 章中的高速公路/车库类比，街道上停着太多汽车，车库里很少有汽车需要移到高速公路上，车库中只留下很少的空位）。

I have just described what an n‐type semiconductor is, n‐type because, at room temperature, I have added lots of free electrons in the conduction band and for all practical purposes eliminated the number of holes in the valence band (continuing with our freeway/garage analogy from Chapter 2, there are so many cars parked on the streets that very few of the cars in the garage need to move to the freeway, leaving very few empty spaces in the garage).

你可能会问，为什么我添加了这么少的 Sb 原子。为什么不添加 10 ²⁰或 10 ²¹之类的原子来使自由电子的数量更大，更接近 Si 原子的数量呢？实际上，我们有时会这样做，我们称之为简并n 型半导体（我将使用这些简并半导体来创建接触，参见第 10.5 节）。问题是，随着我们添加越来越多的 Sb 原子，Sb 原子开始相互作用，不是全部，但可能是一组。当 Sb 原子很少时，Sb 原子会分离，以至于它们像气体一样，具有与玻尔原子相似的单一能级。但随着我们让越来越多的 Sb 原子聚集在一起，它们开始形成自己的能带，可以侵占硅的导带。这些杂质带非常靠近导带，甚至与之相触。如果确实如此，半导体就会开始充当导体，因为即使在接近 0 K 的温度下，大量电子仍可以在导带中自由移动。

One question you may ask is why I added so few Sb atoms. Why not add something like 10²⁰ or 10²¹ to make the number of free electrons much larger and closer to the number of Si atoms? Actually, we do this sometimes and we called it a degenerate n‐type semiconductor (I will use these degenerate semiconductors to create contacts, see Section 10.5). The problem is that as we add more and more Sb atoms, the Sb atoms start interacting with each other, not all of them, but maybe a group of them. When there are very few Sb atoms, the Sb atoms are so separated that they act like a gas and have a single energy level similar to the Bohr atom. But as we get more and more of them together, they start forming their own energy band that can encroach on the silicon's conduction band. These impurity bands are very close to the conduction band, even touching it. If this is the case, the semiconductor starts acting as a conductor because a very large number of electrons are free to move in the conduction band even at temperatures close to 0 K.

3.5 掺杂半导体：p 型

3.5 Doped Semiconductors: p‐Type

现在考虑一种不同的情况。我们用硼 (B) 代替 Sb 掺杂 Si。硼的价数为三，也就是说，外带只有三个电子，随时可以与周围的其他原子结合。因为，就像上面的 n 型半导体一样，我们添加了非常少的 B 原子，它们被迫取代 Si 原子并与周围的其他 Si 原子结合。我在图 3.10中以示意图的形式显示了这一点。

Now consider a different situation. Instead of Sb, we dope the Si with boron (B). Boron has a valence of three, that is, there are only three electrons in the outer band, ready to bond with whatever other atoms are around. Because, as in the n‐type semiconductor above, we add very few B atoms, they are forced to replace a Si atom and bond with the other surrounding Si atoms. I show this schematically in Figure 3.10.

注意发生了什么。图 3.10中的三角形原子 B 原子的三个电子与 Si 原子周围的四个电子中的三个成键，但有一个键不完整（我将其表示为问号）。您还可以想象，如果施加电压将电子吸引到正极，则周围的一个电子跳跃并填补这个空白点只需要很少的能量。一个慷慨的相邻 Si 原子给出它的一个电子，以便硼原子可以填补其不完整的键。但这意味着慷慨的相邻原子失去了一个电子，现在他拥有一个不完整的键，等待其他附近的原子将丢失的电子给它。在我们的能带结构中，我通过添加一个非常靠近价带的能级来表示这种情况（图 3.11）。

Notice what happens. The three electrons of the B atom, the triangular shape atom in Figure 3.10, bond with three of the four surrounding electrons of the Si atoms but there is one incomplete bond (I show it as a question mark). You can also imagine that it takes very little energy for one of the surrounding electrons to jump and fill this empty spot if there is an applied voltage attracting the electrons to the positive terminal. A generous neighboring Si atom gives one of its electrons so that the boron atom can fill its incomplete bonding. But that means that the generous neighboring atom has lost an electron and is now him who has an incomplete bond waiting for some other close‐by neighbor to give him the missing electron. In our energy band structure, I represent this situation by adding an energy level very close to the valence band (Figure 3.11).

这个小能量E _A（之所以叫 A 是因为这些杂质被称为受体杂质，即从周围的硅原子接受电子的杂质）是价带中的电子（附着在硅原子上的电子）从一个原子跃迁到 B 原子的空能级所需的能量。图 3.11左侧显示的是半导体温度为 0 K 的情况。电子全都在其可能最低的能量位置，即价带中。没有任何物质移动。但在室温下，如图 3.11右侧所示，价带中的许多电子具有足够的能量跃迁到由硼的空键形成的更高但非常接近的能量位置。移动到受体能级（即与硼原子结合）的电子无法移动，而是被捕获了。

This small energy, E_A (A because these impurities are called acceptor impurities, impurities that accept electrons from surrounding silicon atoms), is the energy that an electron in the valence band (an electron attached to a silicon atom) needs to jump from one atom to an empty level of a B atom. The left side of Figure 3.11 shows the case when the semiconductor is at 0 K. The electrons are all at their lowest possible energy sites, that is, in the valence band. Nothing moves. But at room temperature, shown on the right of Figure 3.11, many electrons in the valence band have enough energy to jump to the higher, but very close, energy sites created by the boron's empty bonds. The electrons that have moved to the acceptor levels, that is, bonded to the boron atom, cannot move, they are trapped.

假设我将几辆汽车从满载的车库移到另一层。现在车库里有了空位，汽车可以从一个空位移动到另一个空位，而不必跳到高速公路上。室温下的硼杂质在价带中留下了很多空位，价带中的电子现在可以在价带内移动。如果我在右侧施加正电压，电子就会向右移动。空的停车位向左移动，因此从外部看起来好像正电荷在向左移动，即向负极移动。正如我之前提到的（见第 2.4 节），我们将这些空位称为空穴，并用字母 p 表示。空穴的数量几乎与铟原子的数量相同。因此p ≈ N _A，其中N _{A是受体原子的密度。我在}图 3.11的右侧显示了这种室温条件。

Suppose I remove several cars from a full garage to another floor. Now there are empty spaces in the garage and cars can move from one empty space to another without the need to jump to the freeway. The boron impurities at room temperature leave a lot of empty spaces in the valence band and the electrons in the valence band can now move within the valence band. If I apply a positive voltage on the right, the electrons move to the right. The empty, parking, spaces move to the left and therefore it looks from the outside as if positive charges are moving to the left, i.e. to the negative terminal. As I mentioned before (see Section 2.4), we call these empty spaces holes and represent them by the letter p. The number of holes is almost identical to the number of indium atoms. Thus p ≈ N_A, where N_A is the density of acceptor atoms. I show this room temperature condition on the right of Figure 3.11.

还必须强调的是，即使我们谈论的是具有自由电子或自由空穴的材料，材料本身仍然是电中性的。锑有 51 个电子，其中 5 个在外层价带，但它的原子核中也有 51 个质子（正电荷），因此该材料是电中性的（它恰好还有 71 个不带电荷的中子）。同样，硼有五个电子，其中三个在价带，但它的原子核中也有五个质子和六个中子，使其成为中性元素。

It is also important to emphasize that even though we talk about materials that have free electrons or free holes, the material itself is still electrically neutral. Sb has 51 electrons, five of them in the outer, valence, band but it also has 51 protons (positive charges) in the nucleus, therefore the material is electrically neutral (it also happens to have 71 neutrons which have no charge). Similarly, boron has five electrons, three of them in the valence band but it also has five protons and six neutrons in the nucleus, making it a neutral element.

3.6 其他注意事项

3.6 Additional Considerations

在 n 型和 p 型半导体中，我都可以通过添加杂质来改变电特性。改变自由电子或自由空穴的数量也会改变半导体的电阻率。图 3.12显示了室温下 n 型和 p 型硅的电阻率，此时我添加到硅中的杂质数量从每 cm3 ^{10 14}增加到 10 ²¹。请注意，刻度是对数刻度。电阻率变化了 100 万倍，从 0.0004 变为 100 Ω-cm。我们无法对金属或绝缘体做到这一点。

In both the n‐ and p‐type semiconductors I can change the electrical properties by adding impurities. Changing the number of free electrons or free holes also changes the resistivity of the semiconductors. Figure 3.12 shows the resistivity of n‐ and p‐type silicon at room temperature as the number of impurities I add to the silicon increases from 10¹⁴ to 10²¹ per cm³. Notice that the scales are logarithmic scales. The resistivity changes by a factor of 1 million, from 0.0004 to 100 Ω‐cm. We cannot do that with metals or insulators.

我想指出的另一点是，除了我们故意添加到纯半导体中的杂质外，硅材料中还自然含有其他杂质，这些杂质很难完全去除。为了让您了解我们要处理的问题，请查看表 3.1。

Another point I would like to make is that, in addition to the impurities that we purposely add to the pure semiconductors, there are other impurities which we naturally find in the silicon material and they are quite difficult to get rid of completely. To give you an idea of what we have to deal with, look at Table 3.1.

首先请注意，冶金级硅的测量单位是 ppm，即百万分之一。电子级或半导体级硅的测量单位是 ppbs，即十亿分之一。相比之下，纯水中的砷含量可能高达 10 ppb，因此我们需要的电子纯度必须至少比水的纯度高 100 倍。

First note that the metallurgical grade is measured in ppms, parts per million. Electronic or semiconductor grade silicon is measured in ppbs, parts per billion. By comparison pure water may have arsenic up to 10 ppb, so the electronic purity we need has to be at least 100 times better than the purity of water.

在添加可控数量的杂质之前，我们需要去除那些我们不需要的杂质。我将在第 10 章讨论集成电路 (IC) 器件的制造时进一步讨论这一点。对于太阳能电池或发光二极管，我们使用升级的冶金级材料，介于冶金级和电子级之间，肯定比使用非常纯净的 Si 便宜得多。Si 的全部成本不是材料的提取，它无处不在，而是净化过程。

Before we can add a controlled number of impurities, we need to remove those that we do not want. I will talk more about this in Chapter 10 when I discuss the fabrication of integrated circuit (IC) devices. For solar cells or light‐emitting diodes, we use an upgraded metallurgical grade, something in between metallurgical and electronic grades, certainly considerably cheaper than using very pure Si. The whole cost of Si is not the extraction of the material, it is ubiquitous, but the purification process.

除了可能渗入或一直存在而我们无法完全去除的杂质之外，还有可能对半导体运行有害的晶体缺陷。

In addition to impurities that can crawl in or that were there all along and we were not able to completely remove, there are also crystal defects that can be detrimental to semiconductor operation.

一种缺陷是我在图 3.13中展示的点缺陷。点缺陷要么是空位，即由于某种原因缺少一个 Si 原子，要么相反，是间隙，即一个额外的原子挤在晶格内。正如您可能预料的那样，这两种点缺陷都会使组织良好的 Si 晶格变形。电子键合必须重新建立，这可能导致有效的额外空穴或额外电子，就像添加的杂质一样。我们称之为悬空键，因为这里有些电子不知道与谁键合。有时这两个点缺陷可能是相关的。硅原子从一个位置移动，留下空位，并移动到非常靠近另一个位置的位置，从而形成间隙。

One type of defect is the point defects I show in Figure 3.13. Point defects are either vacancies, somehow a Si atom is missing, or the opposite, an interstitial, that is, an extra atom has squeezed inside the lattice. As you might expect both types of point defect deform the nicely organized Si lattice. Electron bonding has to be re‐established and that may result, like with the added impurities, in effective extra holes or extra electrons. We call these dangling bonds because here we have some electrons that do not know who to bond with. Sometimes the two point defects can be related. A silicon atom moves from one location, leaving a vacancy, and moves very close to another location, creating an interstitial.

另一组缺陷是位错，称为堆垛层错，如图3.14所示。图 3.14左侧有一个额外的 Si 平面插入，右侧有一个完整的平面缺失。两者都是堆垛层错。靠近位错的地方晶格变形，但远离位错的地方晶格正常。

Another set of imperfections are dislocations, called staking falls, as I show in Figure 3.14. On the left of Figure 3.14 there is an additional Si plane that has been inserted and on the right there is an entire plane that is missing. Both are stacking faults. Close to the dislocation the lattice is deformed but further away the lattice is normal.

为了完成这个主题，让我提一下我们可以使用的其他杂质。图 3.15以图形和数字方式显示了 Si 中某些杂质的能级。

To complete this topic, let me mention additional impurities that we could use. Figure 3.15 shows graphically and numerically the energy levels of some of these impurities in Si.

由于与导带或价带的接近性，硼（用于 p 型半导体）以及锑和磷（用于 n 型半导体）是硅中最常用的掺杂剂，但我们将其他杂质用于不同的用途。

Because of its closeness to the conduction or to valence bands, boron, for p‐type semiconductors, and antimony and phosphorous, for n‐type semiconductors, are the most used dopants in silicon, but we use other impurities for different purposes.

3.7 总结与结论

3.7 Summary and Conclusions

在本章中，我们了解了如何添加可控数量的杂质来彻底改变半导体的特性。如果我在硅晶体中添加一个具有五个价电子的原子，其中四个电子会与硅结合，但第五个电子只需要很少的能量即可自由结合。我们还看到，通过添加几个仅具有三个价电子的可控数量的原子，我们可以创建一种具有大量空穴的材料。这种方法使我们能够获得具有非常大电阻率范围的半导体。此外，在半导体材料中，我们可以获得电子（负）或空穴（正）电流。

In this chapter we have seen how I can add a controlled number of impurities to change the semiconductor’s characteristics drastically. If I add an atom with five valence electrons in a Si crystal, four of the electrons bond with the Si but there is a fifth electron that needs very little energy to be free. We have also seen that by adding a few controlled numbers of atoms with only three valence electrons we can create a material with a large number of holes. This trick allows us to have semiconductors with a very large range of resistivities. Also, in semiconductor materials we can have electron (negative) or hole (positive) currents.

当我们讨论设备时，我们将看到如何使用这些属性：第 5 章中的二极管和第 8 章中的晶体管。

We will see how we use these properties when we discuss devices: diodes in Chapter 5 and transistors in Chapter 8.

现在让我们从半导体理论中放松一下。在下一章中，我将解释一些可以使用我们在前三章中讨论的概念来理解的实用设备。

Now let's relax from semiconductor theory. In the next chapter I explain some practical devices that can be understood using the concepts that we have discussed in the first three chapters.

附录 3.1 掺杂半导体中的费米能级

Appendix 3.1 The Fermi Levels in Doped Semiconductors

您应该还记得附录 2.2中说过，在绝对零度时，费米能级E _f必须位于电子占据的能级和没有电子的能级的中间，在纯硅中，它正好位于能隙的中间。在 n 型半导体中，费米能级必须正好位于导带和施主杂质能级的中间（图 3.16），因为在 0 K 时，费米能级以下的每个能级都必须被占据，而费米能级以上的每个能级都必须为空。

You should recall from Appendix 2.2 that at absolute zero the Fermi level, E_f, must be halfway between the energy levels occupied by electrons and the energy levels empty of electrons, in pure silicon that is exactly in the middle of the energy gap. In an n‐type semiconductor the Fermi level must reside exactly in the middle between the conduction band and the donor impurity energy levels (Figure 3.16) because at 0 K every energy level under the Fermi level must be occupied and every energy level above it must be empty.

图 3.16左边的图与图 3.9左边的图相同，右边的图与图 3.11左边的图相同。在这两种情况下，我只添加了电子位于其可能最低能量时的绝对零度时的费米能级的位置。左边我展示了 n 型半导体的情况，其费米能级E _f位于完全空的导带和完全满的施主带之间。在 p 型材料中，费米能级位于充满电子的价带和空的受主能级之间。如果将费米-狄拉克 (F-D) 函数（图 2.14）叠加到图 3.16上，您马上就会看到，在 n 型半导体中，室温下导带中占据的能级数非常大，空隙数非常少，而在 p 型半导体中则相反。

The figure on the left of Figure 3.16 is the same as the left of Figure 3.9 and that on the right is the same as the left of Figure 3.11. I have only added in both cases the position of the Fermi level at absolute zero when the electrons are located at their lowest possible energy. On the left I show the case of an n‐type semiconductor with the Fermi level, E_f, between the conduction band, completely empty, and the donor band, completely full. In a p‐type material, the Fermi level is between the valence band full of electrons and the empty acceptor levels. If you superimpose the Fermi–Dirac (F‐D) function (Figure 2.14) on Figure 3.16 you can see right away that in the n‐type semiconductor the number of occupied energy levels in the conduction band at room temperature is very large and the number of empty spaces is very low, and the opposite happens in the p‐type semiconductor.

使用我在附录 2.2中讨论过的相同 F-D 统计数据（公式 ( 2.1 )），我们可以证明导带中的电子浓度为

Using the same F‐D statistics I discussed in Appendix 2.2, Eq. (2.1), we can show that the concentration of electrons in the conduction band is

(3.4)

价带中空穴的浓度为

and the concentration of holes in the valence band is

(3.5)

在附录 2.2中，我向您展示了 F-D 统计数据如何计算绝缘体、导体和半导体中的电子和空穴数量。现在我们了解了掺杂半导体，让我向您展示 F-D 函数如何解释掺杂半导体中发生的情况。请看图 3.17 。图 C 与图 2.15中的 C 相同。在 0 K 时，费米能级必须位于有电子的能级和没有电子的能级之间。因此，在施主半导体 D 的情况下，费米能级位于空导带和满施主能级之间。例如，Sb 的施主能级距离导带仅 0.039 eV（见图3.16），因此费米能级和导带之间的能量差仅为 0.02 eV（图 3.17 D）。让我们考虑一下。如果我在等式中插入 0.02 eV。 （2.2）我得出的结果是，占据的概率约为 30%。因为施主原子的数量比硅原子的数量要少得多，所以 30% 意味着，从实际目的来看，施主能级的所有电子现在都在导带。对于空穴来说，情况有所不同。从费米能级到价带的距离为 1.09 eV，能隙减去施主能隙的一半（1.11 – 0.02），如果算一下，能隙非常大，而空穴出现的概率非常小（5 × 10 ⁻¹⁹）。而硼掺杂的硅的情况则相反（图 3.17 E）。

In Appendix 2.2, I showed you how the F‐D statistics calculate the number of electrons and holes in insulators, conductors, and semiconductors. Now that we know about doped semiconductors let me show you how the F‐D function explains also what is happening in doped semiconductors. Look at Figure 3.17. Figure C is the same as C in Figure 2.15. At 0 K the Fermi level must be between the energy level that has electrons, and the one that does not. Thus, in the case of a donor semiconductor, D, the Fermi level sits between the empty conduction band and the full donor level. The donor level for Sb, for example, is located just 0.039 eV from the conduction band (see Figure 3.16) so the energy difference between the Fermi level and the conduction band is just 0.02 eV (Figure 3.17D). Let's think about this. If I insert 0.02 eV in Eq. (2.2), I get the result that the probability of occupancy is about 30%. Because the number of donor atoms is much smaller than the number of silicon atoms, 30% means that, for practical purposes, all the electrons in the donor level are now in the conduction band. For holes the situation is different. The distance from the Fermi level to the valence band is 1.09 eV, the energy gap minus half the donor gap (1.11 – 0.02), a huge energy gap and the probability that there are any holes is minuscule (5 × 10⁻¹⁹) if you do the numbers. The opposite happens with a silicon doped with boron (Figure 3.17E).

附录 3.2 为什么所有施主电子都进入导带

Appendix 3.2 Why All Donor Electrons go to the Conduction Band

4.1 什么是红外辐射？

4.1 What is Infrared Radiation?

1800 年，弗雷德里克·威廉·赫歇尔 (Frederick William Herschel, 1738–1822) 进行了我在图 4.1中所示的实验。赫歇尔让光穿过一个棱镜，棱镜将白光分离成不同的颜色（在棱镜中，每种颜色光的弯曲角度略有不同，从而产生颜色分离，参见附录 4.1）。赫歇尔将一个温度计放在红色左侧可见辐射外，检测到温度升高。虽然他什么也没看到，但显然在红色下方（红外）有一种“看不见的”辐射。科学家很快意识到，辐射光谱比我们能够看到的光的窄带要宽得多。

In 1800 Frederick William Herschel (1738–1822) performed the experiment I show in Figure 4.1. Hershel passed light through a prism that separates the white light into different colors (in a prism, each color bends at slightly different angle, resulting in the color separation, see Appendix 4.1). Hershel placed a thermometer outside the visible radiation on the left of the color red and detected an increase in temperature. Although he did not see anything, it was obvious that there was an “invisible” radiation below (infra) the red color. Very soon scientists realized that the radiation spectrum was considerably wider than just the narrow band of what we call light and that we are able to see.

图 4.2显示了辐射光谱的全部范围，从高频伽马射线到极低频无线电波。整个辐射光谱的波长，即两个波峰之间的距离λ，范围从 10 ⁻¹¹  m 到 10 ⁵  m，高达 14 个数量级。可见光范围只是辐射光谱的一小部分。可见光的波长范围从紫色的 3.8 × 10 ⁻⁷  m 到红色的 7.5 × 10 ⁻⁷  m（或从 0.38 到 0.75 μm）。图 4.2扩展了可见光和红外辐射波段。如您所见，红外辐射的范围比可见光大得多，从 7.5 × 10 ⁻⁷  m 到 10 ⁻⁴  m（或从 0.75 到 100 μm）。

Figure 4.2 shows the full range of the radiation spectrum, from high frequency gamma rays to very low frequency radio waves. The wavelengths of the entire radiation spectrum, that is, the distance between two peaks of the waves, λ, range from 10⁻¹¹ m, to 10⁵ m, a whooping 14 orders of magnitude. The visible range is a tiny fraction of the radiation spectrum. The wavelength range of visible light goes from 3.8 × 10⁻⁷ m for violet to 7.5 × 10⁻⁷ m for red (or from 0.38 to 0.75 μm). Figure 4.2 expands both the visible and the infrared radiation bands. As you can see, infrared radiation has a considerable larger range than visible light, from 7.5 × 10⁻⁷ m to 10⁻⁴ m (or from 0.75 to 100 μm).

我们已经在第 1 章的公式 ( 1.1 ) 中看到，频率f和波长λ与波速有关，或者

We have already seen in Chapter 1, Eq. (1.1), that frequency, f, and wavelength, λ, are related by the velocity of the wave, or

(4.1)

频率f的单位是赫兹，赫兹（以德国物理学家海因里希·鲁道夫·赫兹 [1857-1894；图 4.3 ] 的名字命名，他因其在电磁波方面的贡献）是每秒产生的波的数量。

The frequency, f, is measured in Hertz and a Hertz (named after Heinrich Rudolf Hertz [1857–1894; Figure 4.3], a German physicist for his work on electromagnetic waves) is the number of waves per second.

爱因斯坦将光子的能量与其波长联系起来，即公式 ( 1.5 )，我现在用电子伏特 (eV) 重写该公式：

Einstein related the energy of a photon to its wavelength, Eq. (1.5), which I now rewrite using electron‐volts (eV):

(4.2)

其中E是光的能量，单位为电子伏特 (eV)，h是普朗克常数 (6.63 × 10 ⁻³⁴ m ² kg s ⁻¹ )，c是光速 (3 × 10 ⁸  m s ⁻¹ )，e是电子电荷 (1.6 × 10 ⁻¹⁹库仑)，λ是波长 (m)。请注意，除λ外，所有参数都是常数。

where E is the energy of the light in electron‐volts (eV), h is Plank's constant (6.63 × 10⁻³⁴ m² kg s⁻¹), c is the speed of light (3 × 10⁸ m s⁻¹), e is the electronic charge (1.6 × 10⁻¹⁹ coulombs), and λ is the wavelength (m). Notice that all the parameters are constants except for λ.

通过将公式 (4.2)中的常数替换为三个常数的值，我们得到了电磁波能量（单位为电子伏特）E与波长λ之间的一个非常简单的关系：

By replacing the constants in Eq. (4.2) by the value of the three constants we get a very simple relation between the energy of the electromagnetic waves in electron volts, E, and the wavelength, λ:

(4.3)

我想看看这些变量的单位，看看这种关系是否合理。所以，让我来帮你做这件事。

I’d like to take a look at the units of these variables to see if the relationship makes sense. So, let me do just that for you.

(4.4)

您可以看到，分子中的秒数抵消了，分子中的米数抵消了分母中的米数，剩下的就是焦耳（能量单位）每库仑（将能量转换为电子伏特），这正是我想要的。但请注意，公式 (4.3)中的λ以 μm 为单位。

You can see that the seconds in the numerator cancel out and the meters in the numerator cancel the meters in the denominator and I am left with Joules (unit of energy) per coulomb (to convert energy to electron‐volts), which is what I want. But be careful, the λ in Eq. (4.3) is in μm.

4.2 我们的眼睛能看到什么

4.2 What Our Eyes Can See

观察大气和太阳辐射的传输也非常有趣。太阳表面温度为 5788 K，约 10 000 °F，在此温度下，它会以黑体辐射公式给出的不同频率产生辐射（见附录 4.2 ）。图 4.4中的实线红线显示了太阳辐射与波长的关系。图 4.4的x轴从零到 2.5 μm。请注意，太阳在我们可见的波长范围内发射出最高的辐射。

It is very interesting to look also at the transmission of the atmosphere and the sun's radiation. The sun has a surface temperature of 5788 K, or about 10 000 °F, and at that temperature it generates radiation at different frequencies given by the black body radiation formula (see Appendix 4.2). The solid red line in Figure 4.4 shows the sun's radiation as a function of wavelength. The x axis of Figure 4.4 goes from zero to 2.5 μm. Notice that the sun emits the highest radiation precisely at the range of wavelengths we can see.

图 4.5显示了大气传输的反面，即大气的不透明度。此图的x轴现在是对数的。请注意，除了可见光、红外线以及微波和无线电区域的部分外，我们的大气是多么不透明。在红外区域，从 1 到 15 μm，传输效果不太好，但仍有大量辐射通过。这不是很有趣吗？进化创造了一个器官，我们的眼睛，精确地调节到太阳辐射最高的地方，地球的大气层几乎是透明的，这是一个很好的巧合。

Figure 4.5 shows the opposite of the transmission of the atmosphere, that is, the opacity of our atmosphere. The x axis of this plot is now logarithmic. Notice how opaque our atmosphere is, except in the visible, infrared, and portions of the microwave and radio regions. In the infrared region, from 1 to 15 μm, the transmission is not as good but still a lot of radiation goes through. Isn't this interesting? Evolution has created an organ, our eyes, precisely tuned to where the sun has the highest radiation and the earth's atmosphere is almost transparent, which is a nice coincidence.

4.3 红外应用

4.3 Infrared Applications

红外探测器有很多应用，主要是基于“看到”温差的能力。图 4.6左侧显示了一名男子抱着蝎子的照片。右侧是用红外相机拍摄的同一张照片。使用软件，我们为不同的温度分配“颜色”（参见红外照片右侧的刻度），以便我们能够“看到”不同的温度。通过查看右侧的照片，我们观察到蝎子是一种冷体动物。看看抱着蝎子的人的细节。T 恤与身体接触的部分比与身体分离的褶皱部分更温暖。

Infrared detectors have lots of applications, mostly based on the ability to “see” temperature differences. Figure 4.6 shows on the left a photograph of a man holding a scorpion. On the right is the same photograph taken with an infrared camera. Using software, we assign “colors” to different temperatures (see the scale on the right of the infrared photograph) so we can “see” the different temperatures. By looking at the photograph on the right we observe that the scorpion is a cold body creature. Take a look at the details of the person holding the scorpion. The parts of the t‐shirt that touch the body are warmer than the folds separated from the body.

这只是一个例子。通过“看到”金属壁的温度变化，红外线可以让人看到油箱中的水位或油位。人或动物可以将自己的形象隐藏在灌木丛后面，但无法隐藏自己身体的热量。在红外线下，它们清晰可见 (图 4.7 )。工程师可以用红外摄像机检查房屋，确定哪里有热泄漏，从而确定哪里需要安装或改进隔热层 (图 4.8 )。艺术品保管员可以发现可见画作下隐藏的画作，并帮助判断这幅画是否为真迹。你们所有人的电视机前的咖啡桌上都有几个红外线遥控器，可以控制频道和其他电子设备。

This is just an example. Infrared can make visible the level of water or oil in a tank by “seeing” the change in temperature in the metallic walls. People or animals can hide their images behind bushes, but they cannot hide the heat of their bodies. They are clearly visible in the infrared (Figure 4.7). Engineers can look at a house with an infrared camera and determine where there are heat leaks and therefore where insulation needs to be installed or improved (Figure 4.8). Art custodians can reveal a hidden painting under a visible one and help determine if the painting is or is not an original. All of you have several infrared clickers on the coffee table in front of the TV that control the channels and other electronic gadgets.

红外探测器的科学用途之一是天文学。（披露：我领导的工程团队为斯皮策和未来的杰克·韦伯太空望远镜的红外仪器开发了一些红外探测器。）使用不同的波长观察天空，天文学家可以学到很多关于宇宙的知识。看看图 4.9。左边是我展示的哈勃望远镜拍摄的第一张照片之一，鹰状星云。当我们在红外线下拍摄同一个星云的照片时，突然间无数的恒星出现了，这些恒星在可见光范围内被鹰状星云周围的尘埃和气体所遮蔽。

One of the scientific uses of infrared detectors is in astronomy. (Disclosure: I lead the engineering team that developed some of the infrared detectors for the infrared instruments in the Spitzer and the future Jack Webb space telescopes.) Looking at the sky using different wavelengths, the astronomer learns a lot about the universe. Take a look at Figure 4.9. On the left I show one of the first photographs of the Hubble telescope, the Eagle nebula. When we take a photograph of the same nebula in the infrared, all of a sudden myriad stars show up, stars that were obscured in the visible range by the dust and gas around the Eagle nebula.

4.4 红外辐射的类型

4.4 Types of Infrared Radiation

说完了红外设备的用途，让我们回到半导体的物理学原理，看看它们是如何实现红外检测的。

After this digression on the use of infrared devices, let's go back to the physics of semiconductors and see how they make infrared detection possible.

随着波长越来越长，或者频率越来越短，红外光子的能量也越来越小。回顾一下方程 (4.2)和(4.3)。我们所说的近红外辐射 (NIR) 的波长范围为 0.75 至 2.5 μm，中红外辐射 (MIR) 为 2.5 至 6 μm，远红外辐射 (FIR) 为 6 至 15 μm。在这些范围之上是极红外辐射 (XFIR)，其波长范围从 15 一直到 1000 μm。半导体红外探测器在这些非常长的波长下没有用处，您将会明白原因。

As the wavelength gets longer and longer, or the frequency shorter and shorter, the energy of the infrared photons gets smaller and smaller. Look back at Eqs. (4.2) and (4.3). The wavelength of what we call near‐infrared radiation (NIR) ranges from 0.75 to 2.5 μm, the mid‐infrared radiation (MIR) from 2.5 to 6 μm, and the far‐infrared radiation (FIR) from 6 to 15 μm. Above those ranges comes the extreme infrared radiation (XFIR) that goes from 15 all the way up to 1000 μm. The semiconductor infrared detectors are not useful at these very long wavelengths and you will see why.

利用本章开头的关系E = 1.24/ λ（等式 4.3）和f = c / λ（等式 4.1），我们可以列出红外光谱的频率、波长和能量，见表4.1。辐射的能量随着频率的降低而不断变小。

Using the relationships at the beginning of this chapter, E = 1.24/λ (Eq. 4.3) and f = c/λ (Eq. 4.1), we can list the frequencies, wavelengths, and energies of the infrared spectrum, see Table 4.1. The energy of the radiation keeps getting smaller as the frequency decreases.

4.5 非本征硅红外探测器

4.5 Extrinsic Silicon Infrared Detectors

红外辐射的能量太低，无法将电子从价带踢出到本征、纯净、无杂质的硅的导带（记住，我们需要 1.12 eV 来释放一个电子）。对于许多应用，特别是在天文学领域，我们希望在 MIR 中看到。唯一的方法是使用掺杂了杂质的半导体，这些杂质接近导带，这样红外范围内的光子就有足够的能量将其中一些电子踢入导带。我们不希望由于热能而产生任何自由电子（记住，在室温下，供体带中的几乎所有电子都会移动到导带，第 3.4和3.5节）。因此，我们首先将探测器冷却到尽可能接近液氦温度的极低温度，即 4 K（−270 °C 或 −452 °F）。这种低温可确保所有电子都占据尽可能低的能量，如图4.10所示。

The energy of infrared radiation is too low to kick an electron from the valence band to the conduction band of intrinsic, pure, no‐impurities, silicon (remember we needed 1.12 eV to free an electron). For many applications, especially in the astronomic field, we want to see in the MIR. The only way to do this is to use doped semiconductors with impurities close to the conduction band so that photons in the infrared range have enough energy to kick some of these electrons into the conduction band. We do not want any free electrons due to the thermal energy (remember practically all the electrons in the donor band move to the conduction band at room temperature, Sections 3.4 and 3.5). Therefore, we start by cooling the detectors to extremely low temperatures as close as possible to the temperature of liquid helium, 4 K (−270 °C or −452 °F). This low temperature ensures that all the electrons occupy the lowest possible energy, as I show in Figure 4.10.

我们喜欢使用砷（As）来检测光谱中红外区域的光子。我们在上一章中看到，从砷原子中释放（即电离）电子的能量为 0.054 eV，比在固有电子中释放电子所需的 1.12 eV 能量低得多硅。我们使用砷作为首选掺杂气体，因为在制造硅时更容易引入极少量的砷。图 4.10显示了当掺杂的 Si 非常接近绝对零度 (0 K) 时，As 原子的所有第五电子都占据靠近导带的施主能级的能隙。

We like to use arsenic, As, to detect photons in the MIR region of the spectrum. We saw in the previous chapter that the energy to free, that is, ionize, an electron from an As atom is 0.054 eV, a much lower energy than the 1.12 eV needed to do the same in the intrinsic silicon. We use arsenic as the preferred doping gas because it is easier to introduce in very small amounts while we fabricate the silicon. Figure 4.10 shows the energy gap with all the fifth electrons of the As atoms occupying the donor levels close to the conduction band when the doped Si is very close to absolute zero (0 K).

当能量大于 0.54 eV 的红外光子撞击掺杂 As 的半导体时，该光子具有足够的能量来释放位于非常靠近导带的施主能级的电子之一。因此，如果我们在导带中检测到自由电子，我们就知道，由于电子在低温下冻结，能量高于 0.054 eV 的光子撞击了晶体。我在导带中找到的电子越多，我知道被探测器吸收的光子就越多。图 4.11显示了能量大于 0.054 eV 的光子向电子的能量转移。

When an infrared photon with an energy greater that 0.54 eV strikes the As doped semiconductor, the photon has sufficient energy to free one of the electrons that are sitting in the donor levels very close to the conduction band. So, if we detect a free electron in the conduction band, we know that, since the electrons are frozen at the low temperature, a photon with an energy higher than 0.054 eV has hit the crystal. The more electrons I can find in the conduction band the more photons I know have been absorbed by the detector. Figure 4.11 shows the energy transfer of the photon with an energy larger than 0.054 eV to an electron.

如果您查看表 4.1，您会发现砷杂质能够检测到 NIR 和 MIR 范围内的任何光子。您可能会问，如果可见光照射到这种掺杂的硅上会发生什么。可见光会不会通过耗尽供体带中的所有电子，压倒导带，从而扰乱一切？答案是肯定的，因此这些红外系统在光路中具有滤光片，不会让高于一定能量的光子通过，从而防止它们干扰我们感兴趣的光子。

If you look at Table 4.1, you will realize that the arsenic impurities are able to detect any photon in the NIR and MIR ranges. You may ask what happens if visible light hits this doped silicon. Will the visible light mess up everything by depleting all the electrons from the donor band, overwhelming the conduction band? The answer is yes, so these infrared systems have filters in the optical path that do not let photons above a certain energy go through and thus prevent them from interfering with the photons we are interested in looking at.

现在让我解释一下制造这些设备所面临的挑战。我们称它们为外部探测器，因为它们使用掺杂水平而不是导带和价带之间的间隙。图 4.12显示了其中一个探测器的横截面。以下是制造这些设备所涉及的步骤列表。（在第 10 章中，我介绍了许多用于制造硅器件的方法。）在这里，我仅提到制造一个可工作的外部红外探测器所需的结构。

Let me now explain the challenges involved in fabricating these devices. We call them extrinsic detectors because they use the doping levels instead of the gaps between conduction and valence bands. Figure 4.12 shows a cross‐section of one of those detectors. Here is the list of the steps involved in fabricating these devices. (In Chapter 10 I go over many of the methods used to fabricate silicon devices.) Here I just mention the structure we need to fabricate a working extrinsic infrared detector.

1. 需要 500 微米厚的本征硅（白色）来支撑我们在其上生长的非常薄的外延层。光子从底部撞击探测器（探测器顶部有很多电子元件，我没有显示）。我们希望硅基板是透明的，这样光子就可以穿过而不被吸收。因此，我们希望硅基板非常纯净，没有杂质或瑕疵。我们希望基板中的杂质含量低于每立方厘米10 ^{13个原子。这并不容易。这意味着每五十亿}个硅原子中我们只能容忍一个杂质原子。
2. The 500‐μm thick intrinsic silicon (in white) is needed to support the very thin epitaxial layer that we grow on top of it. The photons hit the detectors from the bottom (there are lots of electronic elements on top of the detector that I do not show). We want the silicon substrate to be transparent so photons can go through without being absorbed. We want, therefore, the silicon substrate to be very pure, with no impurities or imperfections. We want the impurities in the substrate to be under 10¹³ atoms per cm³. This is not easy. It means that we can only tolerate one impurity atom for every five billion silicon atoms.
3. 在这个本征半导体的顶部，我们生长出一层非常薄的高掺杂硅层（连续的深黄色线）。这是内部导电层，用作探测器的背接触层。它必须非常薄，这样当光子穿过接触层时，就不会有很多光子被捕获，从而不会丢失。
4. On top of this intrinsic semiconductor we grow a very thin layer of highly doped silicon (the continuous dark yellow line). This is the internal conductive layer and serves as the detector's back contact. It has to be very thin so that not many photons are captured, and thus lost, as they cross the contact layer.
5. 现在到了关键区域。我们采用外延法（如第 10.3 节所述）在硅衬底（黄色）上一次生长一层硅层，同时使用砷化氢（AsH3）等气体添加严格控制量的砷原子，_使得每^cm3中约有 1016 个^气体原子取代相同数量的硅原子（记住图 3.9）。我们不希望砷原子相互作用。该外延层厚度在 25 到 40 μm 之间。层越厚，我们收集到的光子就越多，但制造更厚的没有任何缺陷的硅外延层要困难得多。
6. Now comes the critical area. We epitaxially (explained in Section 10.3) grow one silicon layer at a time over the silicon substrate (yellow), and as we do that we add a very controlled amount of arsenic atoms using a gas like arsine (AsH₃) such that just about 10¹⁶ atoms of gas per cm³ replace the same number of the silicon atoms (remember Figure 3.9). We do not want the As atoms to interact with each other. That epitaxial layer is between 25 and 40 μm thick. The thicker the layer the more photons we collect, but it is much more difficult to fabricate a thicker silicon epitaxial layer without any defects.
7. 在外延层的顶部，我们生长一层非常薄（1-2μm）的SiO绝缘带（红色）。
8. On top of the epiaxial layer we grow a very thin (1–2 μm) insulating band of SiO (in red).
9. 我们需要在层上打一个孔（图 4.12最右边的倒三角形），以便我们与衬底和外延层之间的导电层建立电接触。
10. We need to make a hole in the layers (the inverted triangle on the far right of Figure 4.12) so that we have an electrical contact to the conductive layer between the substrate and the epitaxial layer.
11. 最后，我们制作触点（黑色）。这些是小的（30 × 30 μm ²或更小）铝垫，我们在铝垫上沉积一个铟凸块。铝垫决定了像素的大小。我们制作了 1024 × 1024（或 2056 × 2056）个这样的像素，铟凸块用于与另一个芯片（读出芯片）接触（我将在解释晶体管和集成电路的工作原理后讨论这个另一个电子读出芯片，见附录 13.1）。这个读出芯片也有 1024 × 1024 个输入，包含捕获来自每个探测器像素的激发电子并处理信息所需的所有电子设备。图 4.13展示了触点和铟凸块的照片。
12. Finally, we fabricate the contacts (black). These are small (30 × 30 μm² or smaller) aluminum pads and on top we deposit an indium bump. The aluminum pads define the size of the pixels. We fabricate 1024 × 1024 (or 2056 × 2056) such pixels and the indium bump is used to make contact with another chip, the readout (I discuss this other electronic readout chip after I explain how the transistors and integrated circuits work, see Appendix 13.1). This readout chip, also with 1024 × 1024 inputs, contains all the electronics needed to capture the excited electrons from each detector pixel and process the information. Figure 4.13 shows a photograph of the contacts and indium bumps.

最终的探测器组件如图4.14所示。完成的组件由探测器材料和读出芯片组成。读出芯片具有与探测器相同数量的输入结构。每个探测器通过铟凸块连接到自己的输入电路。红外辐射从图 4.14的顶部撞击探测器阵列，每个探测器吸收的光子与该位置的辐射强度成比例。探测器将光子转换成电子，由读出阵列的输入结构读取。读出器具有水平和垂直多路复用器（第 12.1 节），用于选择每次检测一个细胞，并按顺序将信息发送到处理器，处理器负责解释数据并创建图像。

The final detector assembly is shown in Figure 4.14. The completed assembly consists of the detector material and the readout chip. The readout chip has the same number of input structures as detectors. Each detector is connected to its own input circuit by an indium bump. The infrared radiation hits the detector array, from the top in Figure 4.14, and each detector absorbs photons proportional to the intensity of the radiation at that location. The detector changes the photons into electrons that are read by the input structure of the readout array. The readout has a horizontal and a vertical multiplexer (Section 12.1) that select one cell at a time and send the information sequentially to a processor that interprets the data and creates an image.

我在这里描述的探测器是照相机或望远镜的视网膜。望远镜只不过是一只人造眼睛。它有一个支撑结构（角膜和睫状体）、一个快门（虹膜）、光学元件（晶状体）、环境需求（房水和玻璃体），在我们的例子中是氦冷却器、辐射探测器（视网膜）和铟凸块（视神经），将探测器的输出连接到电子设备和信号处理器（大脑）。

The detectors that I have described here are the retinas of cameras or telescopes. The telescope is nothing more than an artificial eye. It has a supportive structure (cornea and ciliary body), a shutter (iris), optics (lens), environmental needs (aqueous and vitreous body), which in our case is the helium cooler, a radiation detector (retina), and indium bumps (optic nerve) that connects the output of the detector to the electronics and signal processor (brain).

这些红外设备和系统目前正在斯皮策天文台运行（我在图 4.9中展示了斯皮策望远镜拍摄的一张照片），并且在不久的将来，目前计划在 2021 年，在杰克·韦伯红外天文台运行。

These infrared devices and systems are now flying in the Spitzer astronomic observatory (I show one of the photographs from the Spitzer telescope in Figure 4.9) and in the near future, currently intended to be 2021, in the Jack Webb infrared astronomical observatory.

4.6 本征红外探测器

4.6 Intrinsic Infrared Detectors

掺杂砷的硅只是一种特殊类型的半导体红外探测器。我之所以从它开始，是因为它是一个很好的例子，其工作原理可以通过使用能量来解释谱带和半导体中杂质的影响。更常用的是锑化铟 (InSb) 和碲化汞镉 (HgCdTe) 探测器。让我们来了解一下原因。

The silicon doped with As is just a special type of semiconductor infrared detector. I started with it because is a nice example whose operation can be explained by the use of energy bands and the effects of impurities in semiconductors. More commonly used are the indium‐antimonite (InSb) and the mercury‐cadmium‐tellurite (HgCdTe) detectors. Let us find out why.

HgCdTe 可以以多种组合方式生长。事实上，在红外文献中，您会发现公式写为 Hg _{1 −  x} Cd _x Te。这是因为，根据我们拥有的汞和镉的数量（请注意，Ca + Hg 的总和等于碲原子的数量），能隙会发生变化。例如，如果x = 0.2（即我们有 20% 的镉和 80% 的汞），能隙为Eg = 0.09 eV，但如果我们将其增加到x = 0.6，带隙将增加到 0.75 eV。这意味着能隙足够小，以至于 NIR 和一些 MIR 辐射具有足够的能量将电荷从价带释放到导带，而无需杂质。这些探测器就像具有非常窄且可调节能隙的本征半导体一样。

HgCdTe can be grown in many combinations. As a matter of fact, in the infrared literature you will find that the formula is written as Hg_1 − xCd_xTe. This is because, depending on how much mercury and cadmium we have (notice that the sum of Ca + Hg equals the number of tellurium atoms), the energy gap changes. For example, if x = 0.2 (i.e. we have 20% cadmium and 80% mercury), the energy gap is Eg = 0.09 eV but if we increase this to x = 0.6, the band gap increases to 0.75 eV. This means that the energy gap is small enough that NIR and some of the MIR radiation has enough energy to free charges from the valence band to the conduction band without the need for impurities. These detectors act like an intrinsic semiconductor with a very narrow and adjustable energy gap.

HgCdTe 探测器的优点在于它们可以在更高的温度下工作，包括用于近红外应用的室温，并且通过改变汞和镉的成分，我们可以调整它们的操作以适应我们所需的波长。主要缺点是它们很难制造出我们需要的纯度和少量缺陷。

The advantages of HgCdTe detectors are that they can work at higher temperatures, including at room temperature for NIR applications, and by changing the composition of mercury and cadmium we can tailor their operation to our desired wavelength. The main disadvantage is that they are much more difficult to fabricate with the level of purity and the few imperfections we need.

红外探测器使用的另一种常量材料是锑化铟 (InSb)。InSb 的能隙在室温 (300 K) 下为 0.18 eV，在 77 K 下为 0.23 eV。将探测器冷却至 77 K 并不困难，因为这是液氮的温度。这样做的好处是，77 K 时本征电子的数量n _i仅为 2.6 × 10 ⁹，而室温下为 2 × 10 ¹⁶，这意味着本征电荷非常少，因此光子在自由电荷的产生中占主导地位。这正是我们想要的。可以预料，制造 InSb 也比制造 HgCdTe 容易得多。事实上，新型红外杰克韦伯天文望远镜拥有巨大的 InSb 红外探测器面板。图 4.15显示了主镜的六边形面板，里面填充了 InSb 探测器阵列。 18个六边形段的每个直径为1.32米（4.3英尺），每段包含约1000个探测器阵列，每个阵列由2048×2048个探测器组成。

Another common material used for infrared detectors is indium antimonite, InSb. The energy gap of InSb is 0.18 eV at room temperature (300 K) and 0.23 eV at 77 K. Cooling a detector to 77 K is not difficult, as this is the temperature of liquid nitrogen. The advantage is that at 77 K the number of intrinsic electrons, n_i, is only 2.6 × 10⁹ compared to 2 × 10¹⁶ at room temperature, which means that there are very few intrinsic charges and thus the photons dominate the creation of free charges. That is what we want. As you can expect, it is also much easier to fabricate InSb than HgCdTe. As a matter of fact, the new infrared Jack Webb astronomical telescope has huge panels of InSb infrared detectors. Figure 4.15 shows the hexagonal panels of the primary mirror, filled with InSb detector arrays. Each of the 18 hexagonal segments is 1.32 m (4.3 ft) in diameter, each segment contains about 1000 detector arrays, and each array is composed of 2048 × 2048 detectors.

红外线可以探测物体的“热量”。天文学家在夜晚观察天空，因为白天的光线会干扰来自星星的微弱光线。红外线探测器可以探测物体的热量，而夜晚环境热量仍然存在。这就是为什么红外天文台在太空中的灵敏度比地球上的要高 100-1000 倍，而较低的温度也是关闭任何热源的一种方法。

Infrared looks at the “heat” of the objects. Astronomers look at the sky at night because the light of the day interferes with the faint light from the stars. Infrared detectors look at the heat of objects and at night the environmental heat is still there. That is why infrared astronomical observatories have 100–1000 times better sensitivity in space compared to those on earth and the lower temperature is also one way to turn off any heat sources.

4.7 总结与结论

4.7 Summary and Conclusions

在本章中，我们了解了能带和掺杂半导体的概念如何足以解释红外探测器的工作原理。在此过程中，我们了解了使用 HgCdTe 和 InSb 的本征半导体如何具有较低的能隙，从而允许低能光子从价带中电离电子，以及杂质水平非常接近导带的外在探测器如何允许检测频率更低、能量更低的红外辐射。

In this chapter we have seen how the concepts of energy bands and doped semiconductors are sufficient to explain how infrared detectors work. In the process we have seen how intrinsic semiconductors using HgCdTe and InSb have lower energy gaps that allow low energy photons to ionize electrons from the valence bands and extrinsic detectors with impurity levels very close to the conduction bands that permit the detection of infrared radiation with still lower frequencies and lower energies.

我们将在下一章继续学习半导体理论，并开始学习二极管、晶体管和其他可以使用半导体构建的设备。

We will continue with semiconductor theory in next chapter and start learning about diodes, transistors, and other devices that we can build using semiconductors.

附录 4.1 光衍射

Appendix 4.1 Light Diffraction

您可能已经多次看到，如果将一根棍子放入水中，棍子似乎会弯曲。这是因为光在空气（几乎是真空）中的速度与在水中的速度不同（图 4.16 ）。图 4.16的右侧显示了当光束照射到水等透明材料的表面时发生的情况。反射光线的反射角与入射波的角度相同，而折射光线的角度则不同，这取决于两种介质（例如空气和水）的不同光学特性和折射率。

You will have seen many times that if you put a stick into water, the stick seems to bend. The reason for this is that the velocity of light is different in air (almost vacuum) than in water (Figure 4.16). The right‐hand side of Figure 4.16 shows what happens when a beam of light hits the surface of a transparent material like water. There is a reflected ray with a reflected angle identical to the angle of the incident wave, and a refracted ray with a different angle depending on the different optical properties and index of refraction of the two media (e.g. air and water).

要直观地了解射线弯曲的原因，一种方式是看图 4.16的右侧。一束光由一束射线组成。当空气中的第一束射线碰到水时，它们的速度会减慢。光在水中的速度比在真空或空气中的光速慢 30%。当下一组射线碰到水时，第一束射线的移动速度已慢了约 33%，其他射线亦如此。这迫使光束弯曲。请注意，波峰之间的间隔（我将它们显示为垂直于射线的较细的线）在水中比在空气中小。波峰之间的距离定义为波长。我们现在可以说：

One way of visualizing why a ray bends is to look at the right‐hand side of Figure 4.16. A beam of light consists of a bundle of rays. When the first rays in the air hit the water, they slow down. The speed of light in water is 30% slower than the speed of light in a vacuum, or air. When the next array hits the water, the first ray has moved about 33% slower and so on with the other rays. This forces the beam to bend. Notice that the separation between the peaks (I show them as thinner lines perpendicular to the rays) is smaller in water than in air. The distance between peaks is by definition the wavelength. We can now say:

对于反射，光束的角度θ ₁和θ ₂相等，或者

For reflection, the angles of the beams, θ₁ and θ₂, are equal, or

(4.5)

但对于折射，两种介质中光线的角度由各自角度的正弦比给出，或者

But for refraction the angles of the rays in the two media are given by the ratio of the sines of the respective angles, or

(4.6)

其中n _w是水的折射率，恰好是 1.33。不同材料的折射率不同，并且在所有频率下都不相同。光与材料中的原子相互作用，原子吸收并重新发射光，具体取决于材料的光密度，这些相互作用因频率不同而不同。某些材料的原子可以比其他材料保存能量更长时间。对于冕玻璃，红光的折射率为 1.509，紫光的折射率为 1.521。结果是，当紫光穿过棱镜时，紫光比红光弯曲得更多，因此光色被分离（图 4.17）。

where n_w is the index of refraction of water, which happens to be 1.33. The index of refraction is different for different materials and it is not the same at all frequencies. The light interacts with the atoms in the materials and the atoms absorb and re‐emit the light depending on the optical density of the material and these interactions are different for different frequencies. The atoms of some materials can hold energy for a longer time than other materials. For crown glass, the index of refraction is 1.509 for red light and 1.521 for violet light. The result is that the violet light bends more than the red light as it crosses the prism and therefore the light colors are separated (Figure 4.17).

附录 4.2 黑体辐射

Appendix 4.2 Blackbody Radiation

科学家们已经研究了辐射的频率和波长函数。1860 年，古斯塔夫·基尔霍夫（Gustav Kirchhoff，1824-1887；图 4.18）创造了“黑体”一词来描述吸收或发射所有辐射的光源。我们之所以能看到颜色，是因为物体吸收了部分光谱。我们可以说，橙子吸收了除红色以外的所有颜色。红色从橙子皮上反射到我们的眼睛。所有其他颜色都被橙子皮吸收了。黑体可以吸收所有频率的所有辐射，当然也包括颜色。什么都没有出来；它是完全黑色的，是人造的“黑洞”。

Scientists have studied radiation as a function of frequency and wavelength. In 1860, Gustav Kirchhoff (1824–1887; Figure 4.18) coined the term “blackbody” to describe a source that absorbs or emits all the radiation. We see colors because part of the spectrum is being absorbed by objects. We can say that an orange absorbs all the colors except red. The red color is reflected from the peel of the orange and goes to our eyes. All the other colors are absorbed inside the orange peel. A blackbody is one that absorbs absolutely all radiation, of all frequencies, including, of course, colors. Nothing comes out; it is completely black, a humanly manufactured “black hole.”

人们曾多次尝试解释黑体产生的辐射量。问题是，所有使用经典热力学的经典解释都得出黑体会发出无限量的辐射的结论，这当然是不可能的。

There have been many attempts to explain the amount of radiation that a blackbody could generate. The problem is that all the classical explanations using classical thermodynamics concluded that a blackbody would emit an infinite amount of radiation, which, of course, is not possible.

马克斯·普朗克（1858-1947；图 4.19）认为，经典理论无法解释辐射与频率的关系。他利用量子力学假设能量是量子化的，就像我们在玻尔原子中看到的那样。他得出了方程

Max Planck (1858–1947; Figure 4.19) concluded that classical theories could not explain radiation as a function of frequency. Using quantum mechanics, he assumed that the energies were quantized, as we saw also in the Bohr atom. He came up with the equation

(4.7)

在哪里：

where:

• W是光谱辐射发射率，即物体发射的辐射量
• W is the spectral radiant emittance, that is, how much radiation a body emits
• h是普朗克常数（6.62 × 10 ⁻³⁴  J s ^–1）
• h is Planck’s constant (6.62 × 10⁻³⁴ J s^–1)
• c是光速（3 × 10 ⁸  m s ⁻¹）
• c is the speed of light (3 × 10⁸ m s⁻¹)
• λ为波长（单位：μm）
• λ is the wavelength (in μm)
• k是玻尔兹曼常数（1.38 × 10 ⁻²³ J K ^–1）
• k is the Boltzmann constant (1.38 × 10⁻²³ J K^–1)
• T是温度（以 K 为单位）。
• T is the temperature (in K).

我们之前见过这些常数。方程 (4.7)的有趣之处在于，它有很多常数，但只有两个变量，即波长和温度。因此，我们可以将方程 (4.7)重写为

We have seen these constants before. The interesting thing about Eq. (4.7) is that there are lots of constants but only two variables, the wavelength and the temperature. So we can rewrite Eq. (4.7) as

(4.8)

如果我们将辐射绘制为波长和温度的函数，即绘制公式 (4.8) ，我们会得到图 4.20中所示的曲线。

If we plot the radiation as a function of wavelength and temperature, that is, plot Eq. (4.8), we get the curves I show in Figure 4.20.

5.1 pn 结

5.1 The pn‐Junction

考虑两个盒子，一个装满沙子，另一个是空的，这种情况我在图 5.1的顶部显示。当我把两个盒子放在一起并移除它们之间的任何障碍物时会发生什么？左侧盒子中的沙子溢出到空盒子中，正如我在图的下半部分所示。由于密度梯度，沙子向右移动。

Consider two boxes, one full of sand and the other empty, the situation I show at the top of Figure 5.1. What happens when I bring the two boxes together and remove any barrier between them? The sand from the left‐hand box spills over to the empty box, as I show in the lower part of the figure. The sand moves to the right because of a density gradient.

其中有三点非常重要：

Three points are very important:

• 首先，左边的盒子失去了沙子，而右边的盒子则增加了一些沙子。
• First, the left‐hand box has lost sand and the right‐hand box has gained some.
• 其次，有一种力量限制并阻止更多的沙子滑向空盒子。如果我用水代替沙子，两个盒子就会达到相同的水平。沙子不会发生这种情况，因为存在摩擦力，也就是说，有一种力量阻止沙子进一步向右移动。
• Second, there is a force that limits and prevents more sand from sliding toward the empty box. If instead of sand I had used water, both boxes would reach the same level. This does not happen with sand because of friction, that is, there is a force that prevents the sand moving further to the right.
• 第三，盒子的一些属性发生了变化，例如，左边的盒子现在比以前轻，而右边的盒子比分开时重。
• Third, some of the properties of the boxes have changed, for example, the left‐hand box now weighs less than it did before and the right‐hand box is heavier than it was when the boxes were separated.

现在考虑一下，如果我制造两个独立的半导体，一个是 p 型，另一个是 n 型，如图3.9和3.11所示，会发生什么情况。图 5.2显示了 n 型半导体的导带和价带，左侧有自由电子，右侧是 p 型半导体的价带中有自由空间（此图是与图 3.11右侧相同，只是我在 n 型导带中添加了更多黑球（电子）并从 p 型半导体中移除了许多其他黑球，以帮助解释当这两种不同掺杂的材料并排生长或一个在另一个之上而没有任何分离时会发生什么。

Now consider what happens if I fabricate two separate semiconductors, one p‐type and the other n‐type, as I show in Figures 3.9 and 3.11. Figure 5.2 shows the conduction and valence bands of the n‐type semiconductor, with the free electrons, on the left, and the p‐type semiconductor with free spaces in the valence band on the right (This figure is the same as the right‐hand side of Figure 3.11, except that I have added many more black balls (electrons) in the conduction band of the n‐type and removed many others from the p‐type semiconductor to help explain what happens when these two different doped materials are grown side by side or one on top of the other without any separation).

在室温下，我们发现 n 型半导体中自由电子的数量与我们添加到硅中的 5 价施主杂质原子的数量大致相同，介于N _D = 10 ¹⁵和N _D = 10 ¹⁸杂质原子/cm ³之间。同样，p 型半导体价带中的空穴（空白空间）数量与我们添加到 3 价受主杂质原子的数量相同，介于N _A = 10 ¹⁵和N _A = 10 ¹⁸杂质原子/cm ³之间。

At room temperature we have seen that in an n‐type semiconductor there is approximately the same number of free electrons as the number of valence 5 donor impurity atoms we have added to the silicon, between N_D = 10¹⁵ and N_D = 10¹⁸ impurity atoms per cm³. Similarly, the p‐type semiconductor has as many holes, empty spaces, in the valence band as the number of valence 3 acceptor impurity atoms we have added, between N_A = 10¹⁵ and N_A = 10¹⁸ atoms per cm³.

值得注意的是，这两种材料在分离时都是电中性的，也就是说，n 型材料导带中每有 5 个自由电子，就有一个原子核中有 5 个质子，这使得材料呈电中性，或者换句话说，材料两端的电势为零。我在图 5.2 的底部显示了这种情况。电势是一条设置为零的平线。同样，对于 p 型材料，它有空穴，缺少电子，但它们得到了补偿，因为它们来自具有三个质子的元素，而不是四个质子。

It is also very important to note that both materials, when they are separated, are electrically neutral, that is, for every free fifth electron in the conduction band of the n‐type material there is one atom with five protons in the nucleus, which makes the material electrically neutral or, in other words, the electrostatic potential across the material is zero. I show this condition at the bottom of Figure 5.2. The electrostatic potential is a flat line set at zero. Similarly, with the p‐type material, yes, it has holes, missing electrons, but they are compensated by the fact that they come from an element that has three protons instead of four.

现在，考虑一下当 p 型半导体和 n 型半导体并排整体生长而没有任何分离时会发生什么，形成一个单晶，如图5.3所示。（我们将在第 10 章中制作结。）

Now, consider what happens when the p‐ and n‐type semiconductors are integrally grown side by side without any separation, forming a single crystal, as shown in Figure 5.3. (we'll fabricate the junctions in Chapter 10.)

就像上面沙箱的比喻（图 5.1）一样，由于电荷密度不同，n 型半导体中的自由电子会移动到结附近的空穴。我们称之为扩散电流。此外，n 型半导体价带中的部分电子也会移动到 p 侧，这与说一些空穴（空隙）从 p 侧移动到 n 型半导体是一样的。

As in the above analogy of the boxes with sand (Figure 5.1) due to the different density of charges, free electrons from the n‐type semiconductor move to the empty holes near the junction. We call this a diffusion current. Additionally, some of the electrons in the valence band of the n‐type semiconductor will also move to the p‐side, which is the same thing as saying that a few holes, the empty spaces, have moved from the p‐ to the n‐type semiconductor.

两种半导体材料原本都是中性的，但现在失去电子的n型材料带正电（原子核中的质子数没有变化），而得到电子的p型材料带正电。负电。我在图 5.3的底部显示了这种电势变化。左侧为正，右侧为负。在中间，电势从正平稳变为负。这是我们称之为内建电势的内部电势。n 型区域和 p 型区域之间的斜坡区域称为过渡区，这个名称非常恰当，因为它是从一种类型的半导体过渡到另一种类型的半导体。它也被称为耗尽区，因为这个中心区域已经将电子或空穴丢失到了另一侧，最后它也被称为空间带电区，因为这个区域有未补偿的电荷（记住原子不会移动）。同一个中心区域有很多名称，每个名称都强调了这个中间区域的某个方面。还要注意，当我们远离过渡区时，半导体的行为与分离时一样：电子和空穴的数量与杂质原子的数量完全匹配，电势是平坦的。

The two semiconductor materials were originally neutral, but now the n‐type material that has lost electrons becomes more positive (the number of protons in the nucleus of the atom has not changed) while the p‐type material that has gained electrons becomes more negative. I show this electrostatic potential change at the bottom of Figure 5.3. The left‐hand side is positive and the right‐hand side is negative. In the middle, the potential goes smoothly from positive to negative. This is an internal electric potential that we call the built‐in potential. The slope region between the n‐ and p‐type regions is called the transition region, which is very appropriate because it transitions from one type of semiconductor to another. It is also called the depletion region because this center region has lost electrons or holes to the other side, and finally it is also called the space charged region because there are uncompensated charges in this region (remember the atoms don't move). Lots of names for the same center region, each emphasizing a particular aspect of this middle region. Notice also that as we move away from the transition region, the semiconductors behave as when they were separated: the number of electrons and holes exactly matches the number of impurity atoms and the potential is flat.

有多少电子通过从 n 型材料到 p 型材料的扩散向右移动，又有多少空穴向相反方向移动？请注意以下几点：移动到 p 型材料的电子越多，n 型材料的正性就越强。电子总是想移动到正极。在某个时刻，我们达到一种平衡状态，其中扩散力（将电子从左向右移动）等于电子由于电势qV _i （漂移电流）而从右向左移动时感受到的电力。我使用qV _i（其中q是电子电荷），因为电势以电子伏特为单位。空穴也是如此。V i 是电子从一侧转移到另一侧产生的电压。这种内部的固有电压 V _i将电子_推向右侧，其强度与不同电子密度将它们推向左侧的强度相同。这形成了一种相等的力相互抵消的平衡状态。另一种说法是，由于密度差异而产生的扩散电流等于由于内部电场而产生的漂移电流。我在附录 5.2中更详细地解释了扩散和漂移电流。

How many electrons move to the right by diffusion from the n‐ to the p‐type material and how many holes move in the opposite direction? Well, notice the following: the more electrons move to the p‐type material, the more positive the n‐type material becomes. The electrons always want to move to the positive terminal. At some point, we reach an equilibrium condition where the diffusion force, moving the electrons from the left to the right, is equal the electric force that the electrons feel to move from the right to the left due to the electrical potential, qV_i, the drift current. I use qV_i (where q is the electronic charge) because the electrical potential is given in electron‐volts. Similarly, with holes. V_i is the voltage generated by the transfer of electrons from one side to the other. This internal, intrinsic voltage, V_i, is what pushes the electrons to the right with the same strength as the different electron densities push them to the left. This forms an equilibrium condition with equal forces opposing each other. Another way of saying the same thing is to say that the diffusion current due to the density difference is equal to the drift current due to the internal electrical field. I explain the diffusion and drift current in more detail in Appendix 5.2.

我想提出的另一点是，过渡区的厚度与掺杂半导体两侧的杂质浓度成反比，因为我们稍后会用到这个概念。这很直观。如果 n 型半导体中的电子很少，我将不得不将电子从更远的地方转移到 n 区，以产生阻止额外流动所需的电位。如果我的电子浓度很大，过渡区附近非常薄的电子部分就足以产生平衡漂移和扩散电流所需的电场（见附录 5.3）。

Another point I like to make, because we'll use the concept later on, is that the thickness of the transition region is inversely proportional to the impurity concentration on both sides of the doped semiconductors. This makes intuitive sense. If I have few electrons in the n‐type semiconductor, I will have to transfer electrons from further away into the n‐region in order to generate the potential needed to stop additional flow. If instead I have a large concentration, a very thin portion of the electrons near the transition region is sufficient to create the necessary electrical field to equilibrate the drift and diffusion currents (see Appendix 5.3).

5.2 半导体二极管

5.2 The Semiconductor Diode

现在让我们看看当我们施加外部电压qV _e（图 5.4）时会发生什么，其中正极连接到设备的左侧，即 n 型材料。

Now let us see what happens when we apply an external voltage, qV_e (Figure 5.4), with the positive terminal connected to the left of the device, that is, to the n‐type material.

首先发生的事情是，一些扩散到 p 侧的电子现在被推回到 n 型材料，因为我们使静电力大于扩散力。同样，无论 p 侧的空穴是什么，n 型区向左移动到负电位。但问题来了：实际上，p 型材料上没有自由电子，因此电路中不可能有电流。请记住，要产生电流，我们需要在整个回路中连续移动电荷。这种情况称为反向偏置电压。在少数电子和空穴瞬间穿过过渡区回到其原始位置后，电流消失。只有极少数电子（对应于微小的本征浓度）穿过过渡区。

The first thing that happens is that some of the electrons that have diffused toward the p‐side are now pushed back to the n‐type material because we have made the electrostatic force greater than the diffusion one. Similarly, whatever holes were in the n‐type region move left toward the negative potential. But here comes the problem: for all practical purposes there are no free electrons on the p‐type material so there cannot be a current moving through the circuit. Remember that to have current we need to have a continuity of charges moving in the entire loop. This condition is called the reverse bias voltage. After the instantaneous move of a few electrons and holes through the transition region back to their original positions, the current dies out. Only very few electrons, corresponding to the tiny intrinsic concentration, move through the transition region.

让我们看看当我改变电压时会发生什么，也就是说，我将正极连接到 p 型半导体，将负极连接到 n 型半导体（图 5.5）。

Let's see what happens when I turn the voltage around, that is, I connect the positive terminal to the p‐type semiconductor and the negative terminal to the n‐type (Figure 5.5).

现在我减小了两侧之间的静电屏障，但没有减少两侧的电子和空穴数量。因此，n 型半导体中有大量自由电子准备淹没 p 型材料。同样，现在大量空穴向负极移动，p 型半导体中有很多空穴。因此，pn 结中会有电流，该电流取决于外部电压的值：外部电压越高，电流越大。这是正向偏置结的条件。

Now I have decreased the electrostatic barrier between the two sides but not the number of electrons and holes on either side. Therefore, there is a large number of free electrons in the n‐type semiconductor ready to inundate the p‐type material. Similarly, a large number of holes now move toward the negative terminal and there are lots of holes in the p‐type semiconductor. As a consequence, there is a current through the pn‐junction, a current that depends upon the value of the external voltage: the higher the external voltage, the higher the current. This is the condition of a forward biased junction.

想象一下大坝。如果水库中水的隔离墙高于湖水的水位，无论墙有多高，都不会发生任何变化，但如果我降低墙的高度，水就会溢出。

Think of a dam. If the wall separating the water in the reservoir is higher than the level of the water in the lake, nothing changes, no matter how high the wall gets, but if I reduce the height of the wall, water will spill over.

如果我将 PN 结中的电流绘制为施加电压的函数，当我增加和减少电压从正到负时，电流会发生变化，如图5.6所示。

If I plot the current in the pn‐junction as a function of the applied voltage, as I increase and decrease the voltage from positive to negative the current changes, as I show in Figure 5.6.

当我们对结进行正向偏置时，即当我们对 p 型半导体施加正电压（外部电压为V _{e ）}时，电流会迅速增加，电压增加，但如果我们反向偏置，则只有微小的电流流动，该电流受到 p 型材料中极少量自由电子的限制，该数量不会因反向偏置电压增加而改变。在非常大的反向偏置电压下，pn 结会击穿。

When we forward bias the junction, that is, when we apply a positive voltage to the p‐type semiconductor, with an external voltage V_e, the current increases very rapidly with increasing voltage, but if we reverse the bias, just a tiny current moves, a current limited by the very small number of free electrons in the p‐type material, a number that does not change on increasing the reverse bias voltage. At very large reverse bias voltages, the pn‐junction breaks down.

我们可以回到我在图 5.1中使用的沙箱类比，但现在我将箱子倾斜到不同的方向，如图5.7所示。

We may go back to the sand box analogy I used in Figure 5.1 but now I tilt the boxes in different directions, as shown in Figure 5.7.

假设我们拿起盒子，首先将它们倾斜，使满的盒子低于空的盒子（图 5.7左侧）。沙子会回到装有沙子的盒子，但上面的盒子是空的，因此流动会停止。这类似于反向偏置条件。如果我们将盒子翻转过来，左侧盒子中的沙子会非常多，以至于沙子会一直流到空盒子的底部，从而提供我们创建完整电路所需的沙子连续性。这是正向偏置结的类似条件。

Suppose that we take the boxes and first we tilt them so that the full box is lower than the empty one (left‐hand side of Figure 5.7). The sand goes back to the box that contained the sand, but the upper box is empty so, the flow stops. This is analogous to the reversed biased condition. If we flip the boxes the other way, there is so much sand in the left‐hand box that sand goes over to the empty box all the way to the bottom, providing the continuity of sand that we need to create a complete circuit. This is the analogous condition of a forward biased junction.

我们制作了一个二极管。二极管是一种只允许电流朝一个方向流动的器件。它有一个特定的符号，如图5.8所示。它是一个三角形，表示正电流流动的方向。如果正极连接到阳极，如图5.8所示，电流就会流动。如果我们将电池的正极连接到右侧的阴极，则没有电流。

We have fabricated a diode. A diode is a device that lets the current flow in only one direction. It has a specific symbol, shown in Figure 5.8. It is a triangle indicating in which direction the positive current flows. If the positive terminal is connected to the anode, as I show in Figure 5.8, current flows. If we connect the positive side of the battery to the right, at the cathode, there is no current.

正电荷从阳极流向阴极。（有趣的是，当移动的电荷是电子时，为什么我们要谈论正电流？据说，本杰明·富兰克林不知道电子，就使用了这种惯例，我们被它困住了。）

The positive charges flow from the anode to the cathode. (As an interesting point, why do we talk about positive currents when the charges moving are electrons? Supposedly, Benjamin Franklin, not knowing about the electrons, used this convention and we got stuck with it.)

图 5.6中显示的非常大的击穿电流 I是由于雪崩效应而产生的。当反向偏压非常大时，p 型半导体中为数不多的电子之一会获得足够的能量来加速并猛烈撞击过渡区中的原子，从而破坏键并产生电子-空穴对。反过来，这两个电荷会以相反的方向加速，撞击其他原子，从而产生更多的电子和空穴。产生的电子和空穴越多，加速就越快，从而产生越来越多的电子-空穴对，导致非常大的失控电流。

The very large breakdown current I show in Figure 5.6 occurs due to the avalanche effect. When the reverse bias voltage is very large, one of the very few electrons in the p‐type semiconductor gains sufficient energy to accelerate and hit hard an atom in the transition region, breaking a bond and creating an electron–hole pair. In turn these two charges accelerate in opposite directions, hitting other atoms, which create more electrons and holes. And the more you create, the more you accelerate, and create more and more electron–hole pairs, resulting in a very large, runaway, current.

关于二极管特性的最后一点评论。图 5.9更详细地显示了二极管在极小电压下偏置时的特性。

One final comment on the diode characteristics. Figure 5.9 shows in more detail the characteristics of the diode when biased at very small voltages.

当电压为负时，会有少量漏电流。当我反转极性时，电流开始流动之前需要一定的电压。我们称之为拐点或开启电压。在典型的硅半导体 pn 结中，此开启电压介于 0.5 至 0.7 V 之间。

When the voltage is negative, there is a small leakage current. When I reverse the polarity, it takes some voltage before the current starts flowing. We call this the knee or the turn‐on voltage. In a typical silicon semiconductor pn‐junction this turn‐on voltage is between 0.5 and 0.7 V.

5.3 肖特基二极管

5.3 The Schottky Diode

我还想提一下另外两种二极管类型：肖特基二极管和齐纳二极管。图 5.10显示了它们的符号。

There are two other diodes types I like to mention, the Schottky and the Zener diodes. I show their symbols in Figure 5.10.

肖特基二极管是由n型半导体与金属而不是p型半导体组成的二极管，反之亦然，是由金属和p型半导体结组成的二极管。肖特基二极管的主要优点是其开启电压（见图5.9）比半导体二极管低得多，分别为 0.2 V 和 0.7 V。这使得二极管能够以更快的开关速度工作。由于肖特基二极管在较低电压下开启得更快，因此散热量较少，这使其在时间和热量是真正令人担忧的数字微电路中非常重要。

The Schottky diode is a diode composed of an n‐type semiconductor and a metal instead of a p‐type semiconductor, or vice versa, a junction of a metal to an p‐type semiconductor. The main advantage of the Schottky diode is that its turn‐on voltage (see Figure 5.9) is much lower than that of the semiconductor diode, 0.2 V versus 0.7 V. This allows the diode to function at much faster switching speeds. Because the Schottky diode turns on much sooner at a lower voltage, there is less heat dissipated, which makes it very important in digital microcircuits where time and heat are real concerns.

肖特基二极管的机制与 pn 结的机制略有不同。要将电子从金属转移到半导体或反之，电子必须离开一种材料才能进入另一种材料。电子逃离固体所需的能量称为功函数， W ，它是电子在固体中的位置与它们逃离所需能量之间的能量差（我将在附录 5.4中对此进行更详细的解释）。电子不关心一种材料或另一种材料中有多少电子。它们只会移动到能级较低的材料中。

The mechanism of the Schottky diode is slightly different to that of a pn‐junction. To transfer an electron from a metal to a semiconductor or vice versa, the electron has to leave one material to enter another. The energy needed by an electron to escape a solid is called the work function, W, which is the energy difference between where the electrons are in the solid and the energy they need to escape (I explain this in more detail in Appendix 5.4). The electrons don't care how many electrons are in one material or the other. They just move to whatever material has lower energy levels.

例如，假设您有两个并排的容器，如图5.11所示。

Suppose, for example, that you have two containers side by side, as shown in Figure 5.11.

左边的容器很大，里面装着很多水。右边的容器小得多，里面装的水也少得多。我把它们摆放得使容器的边缘处于同一水平。如果我对两个容器加热，水开始沸腾，水就会从小容器流向大容器，因为大容器中的水位相对于容器边缘比右边的低。这基本上就是肖特基二极管中发生的情况。电子从 n 型半导体移动到金属，因为 n 型半导体的功函数低于金属的功函数。

The container at the left is very large with lots of water. The one on the right is much smaller and contains much less water. I set them up so the rims of the containers are at the same level. If I apply heat to both containers and the water starts boiling, the water will move from the small to the large container because the level of the water in the large container relative to the rim of the container is lower than that on the right. This is basically what happens in the Schottky diode. The electrons move from the n‐type semiconductor to the metal because the work function of the n‐type semiconductor is lower than that of the metal.

肖特基二极管的另一个优点是它们可以更快地切换，几乎是瞬间完成，因为结非常薄，因此不需要像在较大的过渡区中那样移动电子和空穴，参见附录 5.3。

Another advantage of Schottky diodes is that they can switch much faster, almost instantaneously, because the junction is so thin that there is no need to move electrons and holes around as in the larger transition regions, see Appendix 5.3.

5.4 齐纳二极管或隧道二极管

5.4 The Zener or Tunnel Diode

齐纳二极管（我在图 5.10右侧显示了它的符号）是一种允许电流在反向偏置条件下流动的二极管。齐纳二极管是一种基于真正量子力学概念的器件。经典物理学无法解释其工作原理。

The Zener diode, whose symbol I show on the right in Figure 5.10, is a diode that allows current to flow under reverse bias conditions. The Zener diode is a device based on truly quantum mechanical concepts. Classical physics cannot explain its operation.

首先我要说的是，在量子力学中，电子既是粒子又是波，或者更确切地说，电子既可以表现为粒子，也可以表现为波。在经典系统中（图 5.12），如果我将球扔向障碍物，球在上升时会减速障碍物，并且只有当球的速度（即动能）大于球在障碍物顶部的势能时，球才会越过障碍物。如果不是，在经典物理学中，球会在到达顶部之前停下来并向后移动，以与上来时相同的速度向相反的方向移动（当然，假设表面无摩擦）。无论障碍物有多厚或多薄，这都是正确的。球能否越过障碍物完全取决于障碍物的高度，而不是其厚度。

Let me start by saying that in quantum mechanics the electrons are both particles and waves, or maybe better, an electron can behave as a particle or as a wave. In a classical system (Figure 5.12) if I throw a ball against a barrier, the ball slows down as it rise up the barrier and it will go over the barrier if and only if the speed of the ball, its kinetic energy, is larger than the potential energy that the ball would have at the top of the barrier. If not, in classical physics, the ball stops before it reaches the top and goes backwards, moving in the opposite direction with the same speed as it had coming up (assuming, of course, frictionless surfaces). This is true no matter how thick or thin the barrier is. The ball goes over the barrier only and exclusively depending on how high the barrier is, not its thickness.

对于量子波，情况则有所不同。如果壁足够薄，量子粒子（例如电子）就有可能穿过壁，即隧穿。图 5.13将电子表示为波，显示了粒子在任何地方（包括在屏障的另一侧）被发现的概率。

In the case of a quantum wave, the situation is different. There is a probability that the quantum particle, an electron for example, goes through the wall, that is, tunnels through, if the wall is thin enough. Figure 5.13 represents the electron as a wave that shows the probability that the particle is found anywhere, including at the other side of the barrier.

当波撞击厚势垒时，其振幅会迅速减小，如图5.13上图所示。势垒越高或越宽，波衰减为零的速度就越快。因此，在另一侧找到电子的概率为零。如果我把势垒做得很薄（下图），波的振幅会减小，但波会以衰减的振幅穿过势垒并出现在另一侧。在经典情况下，球永远不会穿过高势垒，但在量子力学中，波是否穿过势垒取决于势垒的高度和厚度。量子力学波告诉我们在哪里找到电子的概率。因此，图5.13下部所示的情况告诉我，即使势垒高于电子的能量，我也有可能在势垒的另一侧找到电子。我还应该提到，波不是电子；波只是告诉我们电子在哪里或将在哪里的概率。不要试图想象这一点；它毕竟是量子力学。

As the wave hits a thick potential barrier, its amplitude quickly decreases as I show in the upper sketch of Figure 5.13. The taller or the wider the potential barrier is, the faster the wave decays to nothing. Thus, the probability of finding the electron at the other side is zero. If I make the potential barrier very thin (lower drawing), the amplitude of the wave decreases but the wave, with decayed amplitude, crosses the barrier and appears at the other side. In the classical case the ball never crosses the high barrier, but in quantum mechanics, the wave crosses the barrier depending on both its height and its thickness. The quantum mechanical wave tells us the probability of where to find the electron. Thus, the situation shown in the lower part of Figure 5.13 tells me that there is a probability that I will find the electron at the other side of the barrier, even though the potential is higher than the energy of the electron. I should also mention that the wave is not the electron; the wave just tells us the probability of where the electron is or will be. Don't try to visualize that; it is quantum mechanics after all.

在对量子物理学进行如此简短的介绍之后，让我来解释一下齐纳二极管，也称为隧道二极管。如果我们有高度掺杂的 p 型和 n 型材料形成结（杂质浓度在 10 ¹⁸到 10 ^{19 个}/cm ³之间）时，过渡区变高而且非常窄（见附录 5.3）。没有任何外部电压的能带如图5.14中的 A 所示。过渡区非常窄，p 型半导体价带中的电子正对着 n 型半导体导带中的电子。什么也没有发生。但是假设我反向偏置二极管，如图5.14的 B 部分所示。现在来自 p 型半导体的大量电子被一道非常薄的屏障与 n 型半导体导带中的大部分自由允许能量空间隔开，它们能够隧穿，因此反向电流从 p 侧流向 n 侧。现在看一下图 5.15。没有任何偏置，在图 5.15中的点 A 处电流为零。当我们施加负电压时，会有一个很大的负电流穿过二极管，即图 5.15中的 B 点。现在回到图 5.14中的 C 点。我们施加一个非常小的正向偏置电压。n 型材料导带中的电子也隔着非常窄的间隙面对 p 型材料中的空能级。因此，电流从 n 型半导体流向 p 型半导体。在图 5.15的区域 C 中，我在 0 到 0.1 V 之间显示了该电流。随着我进一步增加正向偏置，图 5.14中的 D ，n 型材料中的电子与 p 型材料中的空穴之间的距离变得更大，隧穿变得更加困难，并且电流开始减小，如图5.15 的区域 D 所示，在 0.1 到 0.2 V 之间。最后，随着我们继续增加正向偏置，齐纳二极管开始表现得像普通正向偏置二极管，并且电流开始快速增加，就像在普通二极管中一样（图 5.6 ）。我在图 5.15的区域 E 中显示了这一情况。

After this extremely brief introduction to quantum physics, let me explain the Zener diode, also known as the tunnel diode. If we have very highly doped p‐ and n‐type materials forming the junction (between 10¹⁸ and 10¹⁹ impurities/cm³), the transition region becomes high and very narrow (see Appendix 5.3). The energy bands, without any outside voltage, look like those in A in Figure 5.14. The transition region is very narrow and electrons in the valence band of the p‐type semiconductor are facing the electrons in the conduction band of the n‐type semiconductors. Nothing happens. But suppose I reverse bias the diode, as shown in part B of Figure 5.14. Now a large number of electrons from the p‐type semiconductor are separated by a very thin barrier from a large portion of free allowed energy spaces in the conduction band of the n‐type semiconductor and they are able to tunnel through, therefore a reversed current flows from the p to the n side. Take a look now at Figure 5.15. Without any bias, at point A in Figure 5.15 the current is zero. When we apply a negative voltage there is a large negative current tunneling through the diode, point B in Figure 5.15. Now back to C in Figure 5.14. We apply a very small forward bias voltage. The electrons in the conduction band of the n‐type material are facing the empty energy levels in the p‐type material also across a very narrow gap. Therefore, a current flows from the n‐ to the p‐type semiconductors. I show this current in Figure 5.15 in area C, between 0 and 0.1 V. As I increase the forward bias further, D in Figure 5.14, the separation between the electrons in the n‐type material and the holes in the p‐type material gets larger, the tunneling gets harder, and the current starts decreasing as I show in Figure 5.15, region D, between 0.1 and 0.2 V. Finally, as we keep increasing the forward bias, the Zener diode starts behaving like a regular forward bias diode and the current starts increasing quickly, as it does in the regular diode (Figure 5.6). I show this in region E of Figure 5.15.

区域 D 很有趣。它表明，随着电压从 0.1 增加到 0.2，电流实际上会减小。这是一个负阻区域。由于隧穿是隧道二极管几乎瞬时放电，用于千兆赫区域的高速设备和超高速开关。负电阻对于设计电子振荡器也非常有用。反向偏置电流非常高，因此需要小心，以免烧坏设备。

Region D is interesting. It shows that as the voltage increases from 0.1 to 0.2, the current actually decreases. This is a region of negative resistance. Since the tunneling is almost instantaneous, tunnel diodes are used in high‐speed devices in the gigahertz region and for ultra‐fast switches. The negative resistance is also very useful for designing electronic oscillators. Reverse bias currents are very high so one needs to be careful not to burn the device.

5.5 总结与结论

5.5 Summary and Conclusions

我们已经看到，两种不同类型的半导体 p 和 n 的组合如何形成 pn 结并产生过渡区，从而产生内部电压。在平衡状态下，由于电子和空穴密度差异而产生的扩散电流抵消了由于该固有电场而产生的漂移电流，因此二极管外部的电流为零（图 5.3）。正向偏置二极管（p 半导体的正极）会产生大电流，而反向偏置（n 半导体的正极）则不会产生电流，只会产生非常小的漏电流（图 5.6）。

We have seen how a combination of two different types of semiconductors, p and n, create a pn‐junction and generate a transition region which creates an internal electrical voltage. In equilibrium, the diffusion current due to the difference of electrons and holes density cancels the drift current due to this intrinsic electric field so the current outside the diode is zero (Figure 5.3). Forward biasing the diode (positive terminal at the p‐semiconductor) results in large currents and reversing the bias (positive terminal at the n‐semiconductor) results in no current except for a very small leakage current (Figure 5.6).

我们还讨论了二极管的两种变体。肖特基二极管用金属代替半导体，使其成为速度更快、功率更低的二极管。隧道二极管只能用量子力学来解释，它具有较大的反向偏置电流，也会导致负电阻区域。

We have also discussed two variations of the diode. The Schottky diode replaces one of the semiconductors by a metal, making it a faster and lower power diode. The tunnel diode, which can be explained only in terms of quantum mechanics, has a large reverse bias current and also results in a region of negative resistance.

我强烈建议您阅读或至少看一下附录。其中一些细节将帮助您理解甚至阐明 pn 结和金属半导体结的行为。

I urge you to read or at least look at the appendices. Some of the details will help you to understand and hopefully even clarify the behavior of pn‐junctions and metal–semiconductor junctions.

在第 7 章中，我离题解释了第 6 章中所谓的“无源元件”电阻器、电容器和电感器，然后介绍了这些半导体二极管的许多应用。

In Chapter 7, after a digression explaining what we call “passive element” resistors, capacitors, and inductors in Chapter 6, I go over many of the applications of these semiconductor diodes.

附录 5.1 pn 结的费米能级

Appendix 5.1 Fermi Levels of a pn‐Junction

我在第 2 章和第3 章的附录中介绍了费米能级。让我们看看将相同的费米-狄拉克 (F-D) 统计数据应用于 pn 结时会发生什么。图 5.16显示了 pn 结处于 0 K 的情况。

I introduced you to the Fermi level in the appendices of Chapters 2 and 3. Let's see what happens when we apply the same Fermi–Dirac (F‐D) statistics to pn‐junctions. Figure 5.16 shows the situation where the pn‐junction is at 0 K.

在一个系统中，费米能级必须始终相同。费米能级可以形象化为大小和高度不同的相连容器中的水位。湖水的水位从岸边到最深处都不会发生变化。图 5.16与图 3.16相同，只是我对齐了显示 n 型和 p 型半导体中费米能级位置的虚线。在 0 K 时，p、n 和过渡区中所有允许的最低能量位置都被电子占据，而费米能级以上的所有位置都是空的。因此，在 n 型侧，电子都在价带中或施主带的能级中。在 p 型半导体中，所有电子都在价带中，而受主能级即使非常靠近价带也是空的。价带和导带必须以某种方式从 n 侧平稳过渡到 p 侧。

In a system, the Fermi level must be the same throughout. The Fermi level can be visualized as the water level in connected vessels of different sizes and heights. The level of the water in a lake does not change from the shore to the deepest location. Figure 5.16 is the same as Figure 3.16, except that I have aligned the dotted lines showing the location of the Fermi level in the n‐ and p‐type semiconductors. At 0 K, all the lowest allowed energy sites in the p, n, and transitions regions are occupied with electrons and all those above the Fermi level are empty. Therefore, on the n‐type side, the electrons are all in the valence band or in the energy levels of the donor band. In the p‐type semiconductor all the electrons are in the valence band, and the acceptor levels, even though they are very close to the valence band, are empty. The valence and conduction bands have to somehow transition smoothly from the n‐ to the p‐sides.

现在考虑一下当我们将 pn 结放在室温 300 K 的桌子上时会发生什么情况（图 5.17）。在室温下，图左侧以费米能级为中心的 F-D 函数（与我在附录 2.2和3.1中使用的 F-D 函数相同）预测施主带中的电子会移动到导带，而受主带的空能级会被电子占据，从而在 p 半导体的价带中留下大量空穴。这与我上面提到的以及我在图 5.3中展示的完全相同，但现在费米函数证实了这一点，并让我们能够用数字方式计算导带中的自由电子数和价带中的自由空穴数。它还让我们能够计算过渡中的电子和空穴数区域。（图 5.3显示的电子比图 5.16多得多。它们是相同的，但我使用不同的图形来更好地理解概念。我希望这不会造成混淆。）

Now consider what happens when we have the pn‐junction sitting on the table at room temperature, 300 K (Figure 5.17). At room temperature, the F‐D function, on the left of the figure (the same identical F‐D function I used in Appendices 2.2 and 3.1) centered at the Fermi level, predicts that the electrons in the donor band move to the conduction band, and the empty levels of the acceptor bands are occupied by electrons, leaving a large number of holes in the valence band of the p‐semiconductor. This is exactly the same as I mentioned above and I showed in Figure 5.3, but now the Fermi function confirms and lets us calculate numerically the number of free electrons in the conduction band and free holes in the valence band. It also lets us calculate the number of electrons and holes in the transition region. (Figure 5.3 show many more electrons than Figure 5.16. They are the same, but I use different graphics to better understand the concepts. I hope this is not confusing.)

附录 5.2 扩散和漂移电流

Appendix 5.2 Diffusion and Drift Currents

我在上面解释电子从 n 型半导体向 p 型半导体转移（空穴则相反）时提到，电子向一侧移动的趋势是由于它们的密度差异造成的，当相反方向的电力将其抵消时，这种移动就会停止。

I mentioned above while explaining the transfer of electrons from the n‐type to the p‐type semiconductors (and holes the other way around) that the tendency of electrons to move to one side is due to their difference in density and it will stop when an electrical force in the opposite direction cancels it.

由于电子和空穴密度差异而产生的电流，即扩散电流是

The current due to the difference in electron and hole densities, that is, the diffusion current, is

或者

or

(5.1)

其中i _nd是 n 型材料的扩散电流，q是电子的电荷，D _n是电子的扩散常数，Δn是电子数量随位置的变化。 （我使用符号 Δ 来表示变化的概念。 你们中一些懂微积分的人会认出这是电子数量随位置的导数，或 d n /d x。）电子数量从一个位置到另一个位置的变化越快，电流越大。 我可以为空穴写出类似的方程。 室温下硅中电子的扩散常数为 93 cm ² s ^–1，空穴的扩散常数为 31 cm ² s ^–1。 正如我之前提到的，空穴的速度总是比电子慢。

where i_nd is the diffusion current for the n‐type material, q is the charge of the electron, D_n is the diffusion constant for electrons, and Δn is the change in the number of electrons as a function of position. (I use the symbol Δ to indicate the concept of change. Some of you who know calculus will recognize this as the derivative of the number of electrons as a function of position or dn/dx.) The faster the number of electrons change from one position to the next, the larger the current. I can write a similar equation for holes. The diffusing constant for electrons in silicon at room temperature is 93 cm² s^–1 and for holes is 31 cm² s^–1. As I mentioned before, the holes are always slower that the electrons.

第二个电流是电场引起的漂移电流。电子是带负电的粒子，因此，如果我施加电压，电子就会移动到正极。

The second current is the drift current due to the electric fields. The electrons are negatively charged particles so, if I apply a voltage, the electrons move to the positive terminal.

从数学上来说我可以写

Mathematically I can write

(5.2)

其中i _nE是电子的漂移电流，μ _n是电子的迁移率，n是电子的数量，Δ E是电场的变化，电场是电压除以距离或E = V / d。按照惯例，负号是因为电子电流为负。我在第 2.6 节中提到了迁移率。对于电子，迁移率为 1200 cm ² /volt-s，对于空穴，迁移率为 250 cm ² /volt-s。

where i_nE is the drift current of electrons, μ_n is the mobility of the electrons, n is the number of electrons, and ΔE is the change in the electric field, the field being the voltage divided by the distance or E = V/d. The minus sign, again by convention, is because the electron current is negative. I mentioned the mobility in Section 2.6. For electrons the mobility is 1200 cm²/volt‐s and 250 cm²/volt‐s for holes.

半导体中的总电子和空穴电流为：

The total electron and hole currents in the semiconductor are:

(5.3)

(5.4)

在平衡状态下，即没有外部电压，总电流为零，因此扩散电流必须等于漂移电流。

In equilibrium, that is no external voltages, the total currents are zero, thus the diffusion current has to be equal to the drift current.

附录5.3 过渡区厚度

Appendix 5.3 The Thickness of the Transition Region

过渡区的厚度是 n 型半导体处的过渡厚度与 p 型半导体的厚度之和。无需证明，我先声明一下，过渡区的厚度由以下公式给出：

The thickness of the transition region is the sum of the transition thickness at the n‐type semiconductor and the thickness of the p‐type semiconductor. Without a proof, let me state that the thickness of the transition regions is given by:

(5.5)

(5.6)

其中x _n和x _p分别是 n 侧和 p 侧过渡区的厚度，C是基于 pn 结介电常数和内部电压的给定器件的常数。首先假设N _A = N _D，则

where x_n and x_p are the thicknesses of the transition region in the n and p sides, respectively, and C is a constant for a given device based on the permittivity and the internal voltage of the pn‐junction. First assume that N_A = N_D, then

(5.7)

然后你可以看到，随着掺杂浓度的增加，过渡区变得越来越小。例如，如果N _A比N _D大得多，那么，

You can then see that as the doping concentration increases, the transition region gets smaller. If N_A, for example, is much larger that N_D, then,

(5.8)

让我们输入一些数字来看看这意味着什么。对于我一直使用的典型供体浓度，C = 3.3 m。假设N _A = 10 ¹⁸和N _D = 10 ¹⁶，那么

Let's put in some numbers to see what that means. For a typical donor concentration such as I have been using, C = 3.3 m. Let's say N_A = 10¹⁸ and N_D = 10¹⁶, then

(5.9)

和

and

(5.10)

n 型区域的过渡区宽度比 p 型半导体中的过渡区宽度大 100 倍。这实际上非常有意义。请看图 5.18。如果 p 型半导体中的空穴密度是 n 型半导体中电子密度的一半，那么我们需要深入 p 型区域两倍才能获得创建 pn 结所需的所有电荷，因此x _{p 的}长度将是x _{n 的}两倍。这就是为什么我们希望隧道二极管中的浓度非常高，以便过渡区尽可能窄。

The transition region width is 100 times larger in the n‐type region than in the p‐type semiconductors. This actually makes a lot of sense. Look at Figure 5.18. If the density of holes in the p‐type semiconductor is half that of the density of electrons in the n‐type semiconductor we will need to go twice as far into the into the p‐type region to get all the charges we need to create the pn‐junction, so x_p will be twice as long as x_n. That is why we want the concentrations to be very high in tunnel diodes, so that the transition region is as narrow as possible.

附录 5.4 功函数和肖特基二极管

Appendix 5.4 Work Function and the Schottky Diode

要理解肖特基二极管的工作原理，我需要解释材料的另一个特性，即它们的功函数。如果我给材料足够的能量，我不仅会释放电子，使它们可以在材料内部自由移动，我实际上还可以将电子从材料中完全击出。这就是阴极射线管的作用。

To understand how the Schottky diode works, I need to explain another property of materials, their work function. If I give enough energy to a material, not only I would free electrons so they can move freely inside the material, I can actually knock an electron out of the material altogether. This is what a cathode‐ray tube does.

功函数是材料中电子到达材料表面并离开固体所需的能量，因此如果存在电场，电子可以被电场扫除。这就是旧电视机（还记得大盒子）的工作方式。

The work function is the amount of energy an electron in a material needs to get to the surface of the material and out of the solid so it can be swept away by an electric field, if there is any. This is the way old TV sets (remember the big boxes) used to work.

参见图 5.19中的 A 部分。金属中没有价带和导带之间的分离。在 0 K 时，所有电子都具有最低的能量，就像锅中的水只要不摇晃或煮沸就会形成完美的表面一样，也就是说，它没有能量。安静表面是金属中的费米能级。在 300 K 时（我在图 5.19中的 A 部分中显示了这种情况），存在能量，并且一些电子移动到费米能级之上，留下相等的空白空间。如果能量足够高，一些电子将跳到表面并一起逃离金属。这种能量就是我们所说的金属的功函数W _M。例如，铝的功函数为 4.2 eV。（该值实际上并不是一个常数。它会随着成分、晶体取向和表面特性而变化。）

Look at part A in Figure 5.19. In a metal there is no separation between the valence band and the conduction band. At 0 K, all the electrons take the lowest possible energy the same way as the water in a pot delineates a perfect surface as long as we do not shake it or boil it, that is, it has no energy. The quiet surface is the Fermi level in the metal. At 300 K, which is what I show in part A in Figure 5.19, there is energy and some of the electrons move above the Fermi level leaving behind equal empty spaces. If the energy is high enough, some electrons will jump to the surface and escape the metal all together. This energy is what we call the work function of the metal, W_M. Aluminum, for example, has a work function of 4.2 eV. (This value is not really a constant. It changes with composition, crystal orientation, and surface properties.)

现在看图5.19中的 B 部分。我们已经熟悉了 300 K 下的 n 型半导体（附录 3.1，图 3.17）。n 型半导体的费米能级位于导带和施主能级之间，因为在 0 K 时，费米能级以下的所有能级都被占据，而费米能级以上的所有能级都是空的。在 300 K 时，所有施主电子都具有足够的能量移动到导带。这就是我在图 5.19 B 部分中显示的情况。导带中的电子需要额外的能量才能完全逃离材料。我将此逃逸能量称为W _S，对于 n 型硅，该能量为 4.8 eV。

Now look at part B in Figure 5.19. We are already familiar with an n‐type semiconductor at 300 K (Appendix 3.1, Figure 3.17). The Fermi level for a n‐type semiconductor sits between the conduction band and the donor levels because at 0 K all the levels below the Fermi level are occupied and all the levels above are empty. At 300 K, all the donor electrons have sufficient energy to move to the conduction band. This is the situation I show in Figure 5.19, part B. It takes additional energy for the electrons in the conduction band to escape the material altogether. I call this escape energy W_S and for an n‐type silicon it is 4.8 eV.

当我们在 n 型半导体上生长金属时会发生什么？首先请注意图 5.19的 A 和 B 部分，与常用参考真空能级相比，半导体导带中的电子比金属中的电子具有更高的能量。因此，半导体中的电子会跳到金属上（我将其显示为 B 和 A 之间的虚线箭头）。当我将两种材料紧密接触时，两种不同的材料会形成一个单一系统，因此费米能级必须相同（图 5.19，C 部分）。半导体导带中的电子比金属中的电子具有更高的能量，因此电子会从半导体移动到金属。与常规 pn 结的情况一样，半导体在结附近失去电子并带正电，产生的电场最终阻止任何进一步的电子移动到金属。这会扰乱界面处的能带，但远离界面的半导体的性质保持不变。电子在两个方向上来回穿越势垒，但没有净电流。正如我在第 5.1 节中提到的，并在附录 5.3中更详细地提到，过渡区厚度与自由电子的数量成反比。这里也是如此：过渡区全部位于半导体侧，而不是金属侧，金属侧每单位面积的电子数比半导体多数千个。

What happens when we grow a metal on top of the n‐type semiconductor? Notice first in Figure 5.19 parts A and B that the electrons in the conduction band of the semiconductor have a higher energy than the electrons in the metal compared to the common reference, the vacuum level. So there is a desire for the electrons in the semiconductor to jump to the metal (I show this as a dashed arrow between B and A). When I bring the two materials into intimate contact, the two different materials form a single system, and therefore the Fermi levels have to be the same (Figure 5.19, part C). The electrons in the conduction band in the semiconductor have a higher energy than the electrons in the metal and therefore there is a movement of electrons from the semiconductor to the metal. As in the case of the regular pn‐junction, the semiconductor loses electrons near the junction and becomes positively charged and the electric field generated eventually stops any further electrons from moving to the metal. This disturbs the bands at the interphase but the properties of the semiconductor away from the interphase remain the same. There are electrons moving back and forth across the barrier in both directions but there is no net current. As I mentioned in Section 5.1 and in more detail in Appendix 5.3, the transition region thickness is inversely proportional to the number of free electrons. The same is true here: the transition region is all located on the semiconductor side and not on the metal side, which has thousands more electrons per unit area than the semiconductor.

当我们向肖特基二极管施加电压时，它的行为与常规 pn 结二极管相同，如图5.9所示。

When we apply a voltage to the Schottky diode, we have the same behavior as in the regular pn‐junction diode, as I show in Figure 5.9.

如果比较图 5.19和5.20中的 C、D 和 E 部分，您会注意到从金属侧看到的势垒没有变化，但从半导体侧看到的势垒在 D 部分中减小了，在 E 部分中增大了。在正向偏置的情况下，从半导体到金属的势垒减小了qV _{F ，对于正向偏置为 F，因此从半导体到金属的电流现在大于从金属到半导体的电流，如图}5.20的 D 部分所示。

If you compare parts C, D, and E in Figures 5.19 and 5.20, you will notice that the barrier as seen from the metal side has not changed but the barrier as seen from the semiconductor side has decreased in part D and increased in part E. In the forward biased case, the barrier from the semiconductor to the metal has decreased by an amount qV_F, F for forward bias, so the current going from the semiconductor to the metal is now larger than the one going from the metal to the semiconductor as I show in part D of Figure 5.20.

在图 5.20 的E 部分中，我展示了反向偏置的情况。现在来自半导体的电子会遇到一个非常高的屏障，它们必须克服这个屏障才能到达金属，因此唯一的电子运动是从金属到半导体的微小残余电流。

In Figure 5.20 part E, I show the reverse biased case. Now the electrons from the semiconductor see a very high barrier they have to overcome to go to the metal and therefore the only electron movement is the small residual current from the metal to the semiconductor.

有趣的是，如图5.20所示，从金属到半导体的电流很小且不会改变，但在正向和反向偏置下是相同的。二极管的性能仅取决于半导体所看到的屏障。顺便说一句，这是肖特基二极管的问题之一：尽管它比半导体二极管更快且耗电更少，但反向偏置电流更大。

The interesting thing, as you look at Figure 5.20, is that the current from the metal to the semiconductor is small and does not change, but is the same under forward and reverse bias. The diode performance is only due to the barrier the semiconductor sees. This, by the way, is one of the problems with the Schottky diode: even though it is faster and uses less power than the semiconductor diode, the reversed bias current is larger.

6.1 电压和电流

6.1 Voltage and Current

首先，我想简单谈谈电压和电流，它们有时会被混淆。让我用流体的模拟来解释一下两者的区别。事实上，有一种叫做流体学的领域可以模拟电子电路，但它使用的是液体，而不是电子。

First, just a comment about voltage and current, which sometimes are confused. Let me explain the difference using the analog of fluids. As a matter of fact, there is a field call fluidics that mimics electronic circuits, but it uses liquids, fluids, instead of electrons.

要使流体运动，显然需要流体。您还需要一条流体流动的路径，以及推动流体通过所选路径的力量（泵或重力）。电气系统也是如此。电池或发电机相当于泵。抽屉里的电池具有电势，我们称之为电压，单位为伏特，就像水可以储存在水箱中，只要我们提供一条路径，水就有足够的势能流下。对于电池，电压通常为 1.5 V。无论电池是否连接，化学成分提供的能量都在电池内部。如果我将电池连接到灯泡（如手电筒），电流就会流动，灯会一直亮着，直到电池中存储的能量完全耗尽（多次使用后，您需要更换电池）。水箱也是如此。水会一直留在那里，直到我们提供一条路径，水会继续流动，直到水箱空了。

To have motion of fluids you need, obviously, the fluid. You also need a path for the fluid to move through and a force, a pump or just gravity, to push the fluid through the chosen path. The same is true in an electrical system. The battery or the generator is the equivalent of the pump. The batteries sitting in your drawer have an electrical potential which we call voltage and the units are measured in volts, the same way that the water can be stored up in a water tank with sufficient potential energy to come down as soon as we provide a path. In the case of a battery, the voltage is typically 1.5 V. The energy provided by the chemical composition is inside the battery no matter if the battery is or is not connected. If I connect the battery to a light bulb, as in a flashlight, current flows and the light is on until the energy stored in the battery is completely spent (after many uses you need to replace the batteries). The same thing happens with a water tank. The water will stay up there until we provide a path and the water continues flowing until the tank is empty.

电流是电子的运动，就像水流是水的运动一样。水流的多少取决于泵的功率和路径的难易程度水必须遵循这个方向。同样，电流，即电子的流动，取决于电池或发电机的强度以及电子流动的路径是否容易。

The current is the motion of electrons the same way as the flow is the motion of water. How much water flows depends on how powerful the pump is and how easy is the path that the water has to follow. Similarly, the current, the flow of electrons, depends on how strong the battery or the generator is and how easy is the path through which the electrons have to flow.

水流量以加仑/秒（或升/秒或夸脱/秒）为单位进行测量。电流I的单位是安培A，是每秒的电荷量，以库仑Q为单位，其中库仑与加仑一样，是电子数量的度量单位（一库仑代表 6.242 × 10 ^{18 个}电子的电荷），您已经知道电池或发电机的功率以伏特为单位进行测量。

The flow of water is measured by gallons per second (or liters, or quarts per second). The current, I, has units of amperes, A, and is the electrical charge per second, measured in coulombs, Q, per second where the coulomb, like the gallon, is a measure of the quantity of electrons (one coulomb is the charge of 6.242 × 10¹⁸ electrons), and you already know that the power of the battery or generator is measured in volts.

6.2 抵抗力

6.2 Resistance

电阻R是衡量特定材料阻碍电流流动的难度的指标。

The resistance, R, is the measurement of the difficulty that a specific material presents to the flow of current.

在流体学中，有一个与阻力等效的东西。看一下图 6.1 。图 6.1左侧的简单流体回路由一个通过管道连接到沙箱的泵组成。如果沙箱里装满了大石头或非常粗的沙子，泵将水推过沙箱不会有太大困难，回路中的水流量也很高。但是，如果沙箱里装满了非常细的沙子，水流过的阻力就会更大，整个路径中的水流量就会更小。对于给定的泵功率，随着沙子越来越细（或水的阻力增加），水流量会减少。如果我想在沙箱里装满细沙时有相同的水流过回路，我必须增加泵的功率。因此，流量与泵的功率成正比，与沙箱对水流的阻力成反比。

There is an equivalent to the resistance in fluidics. Take a look a Figure 6.1. The simple fluidic circuit on the left of Figure 6.1 consists of a pump connected by a pipe to a sandbox. If the sandbox is full of large rocks or very coarse sand, the pump does not have much difficulty pushing the water though it and the water flowing in the circuit is high. But if the box is filled with very fine sand, the resistance to the water flowing through it is higher and the flow of water throughout the path is smaller. For a given pump power, the flow of the water decreases as the sand gets finer and finer (or the resistance to the water increases). If I want the same flow of water through the circuit when I have a box full of fine sand, I have to increase the power of the pump. How much water flows is therefore proportional to how high the power of the pump is, and inversely proportional to how resistive the sandbox is to the flow of water.

沙箱对水流的阻力取决于以下因素：

The resistance of the sandbox to the flow of water depends on the following:

1. 沙箱内沙子的性质。沙子越细，阻力越大，因此流体流动越少。
2. The properties of the sand inside the sandbox. The finer the sand, the higher the resistance, and thus less fluid flows.
3. 箱子的长度L。箱子越长，水流阻力越大。
4. The length, L, of the box. The longer the box, the more resistance to the flow of water.
5. 面积：箱子越宽，水流过的路线就越多，阻力就越小。
6. The area: the wider the box, the more ways the water finds to flow through it and the resistance is less.

我还要指出的是，泵所需的功率取决于水流​​量和水流速度。这两个量越大，泵所需的功率就越大。

I also would point out that the power the pump needs is a function of the amount of water flowing and the speed of the water. The more these two quantities increase, the higher the power of the pump needs to be.

这些流体概念与我在图 6.1右侧示意性显示的电路概念几乎相同。电流I与电池或发电机的功率成正比，与连接到电源的元件的电阻成反比。

These fluid concepts are almost identical to those for the electrical circuit that I show schematically on the right of Figure 6.1. The current, I, is proportional to the power of the battery or generator, and inversely proportional to the resistance of the element attached to the source.

我们用欧姆来测量电阻，欧姆的标准符号是大写希腊字母欧米茄，Ω。

We measure the resistance in ohms and the standard symbol for ohms is the capital Greek letter omega, Ω.

电压、电流和电阻之间存在一个非常简单的关系，即欧姆定律：

There is a very simple relationship between the voltage, the current, and the resistance, known as Ohms law:

(6.1)

与流体情况类似，电阻中耗散的功率为

The power dissipated in the resistance is, similarly to the fluid case,

(6.2)

通过结合这两个关系，即公式 (6.1)和公式 (6.2)，我得到

By combining the two relationships, Eqs. (6.1) and (6.2), I get

(6.3)

这是一个非常简单的问题（哎呀，我在介绍中说过这本书中我不会遇到任何问题。请将该问题称为“示例”）：连接到 120 V 家用电线的 150 W 灯的电阻是多少？

Here is a very simple problem (Oops, I said in the introduction I would have no problems in this book. Please call the problem an “example”): What is the resistance of a 150 W lamp connected to the electrical 120 V home line?

目前是

The current is

(6.4)

因此阻力是

and therefore the resistance is

(6.5)

材料的阻力与材料的长度成正比，与材料的面积成反比，就像沙箱对水流的阻力一样。这很有道理。给定一种具有一定阻力的材料，如果我将其长度加倍，阻力应该增加两倍，如果我将其厚度也增加两倍，阻力应该减少两倍。材料越薄，阻力越大。一个非常简单的关系描述了这种行为

The resistance of a material is proportional to the length and inversely proportional to the area of the material, the same as the resistance of the sandbox to the water flow. This makes a lot of sense. Given a material with certain resistance, if I double its length the resistance should increase by a factor of two and if I increase its thickness also by a factor of two, the resistance should decrease by a factor of two. The thinner the material, the higher the resistance. A very simple relation describes this behavior

(6.6)

其中L是电阻的长度，A是电阻的面积。这个新的希腊字母 rho，ρ，称为材料的电阻率，单位是欧姆米，或 Ω‐m。这个数字是这很实用，因为它对于每种材料来说都是一个常数，并且与材料的尺寸无关。不同材料的电阻率范围变化很​​大，从电阻率为 1.59 × 10 ⁻⁸ Ω-m 的银到电阻率为 1 × 10 ¹² Ω-m 的金刚石（碳），范围有 20 个零。半导体的固有电阻率处于中间范围，约为 1 Ω-m。但电阻率会随温度而变化。上述数字是在室温（20°C）下获得的，半导体的电阻率也会随温度（图 2.9）和添加的杂质数量（图 3.12）而变化。

where L is the length and A is the area of the resistor. This new Greek letter rho, ρ, is called the resistivity of the material and has the units of ohm meters, or Ω‐m. This number is practical because it is a constant for each material and does not depend on its dimensions. The range of resistivities changes drastically for different materials, from silver with a resistivity of 1.59 × 10⁻⁸ Ω‐m, to diamond (carbon) with a resistivity of 1 × 10¹² Ω‐m, a range of 20 zeros. The semiconductors are very much in the middle range with intrinsic resistivities around 1 Ω‐m. The resistivity, though, changes with temperature. The numbers above are at room temperature (20 °C) and the resistivity of a semiconductor also changes drastically, both with temperature (Figure 2.9) and with the number of added impurities (Figure 3.12).

电阻可以串联或并联组合（图 6.2）。

Resistances can be combined in series and in parallel (Figure 6.2).

图 6.2左侧的两个电阻是串联的。相同的电流流过两个电阻。总组合电阻只是两个电阻的总和，

The two resistances on the left of the Figure 6.2 are in series. The same current is flowing through both resistors. The total combined resistance is just the sum of both resistors,

(6.7)

电流I等于电压除以总电阻

The current, I, is the voltage divided by the total resistance

(6.8)

现在电压V _A就是电流乘以电阻R ₂：

Now the voltage V_A is just the current times the resistance R₂:

(6.9)

结合方程 (6.9)和(6.10)，我们得到

Combining Eqs. (6.9) and (6.10) we end up with

(6.10)

这就是分压器的概念。只要选择不同的电阻值，我就能得到我想要的任何电压V _A，只要它小于V。事实上，任何一个电阻都可以是可变电阻器、电位器，而V _A可以是 0 到V / R ₁之间的任何值。

This is the concept of a voltage divider. I can get any voltage V_A I want, as long as it is smaller than V, by just selecting different values of resistances. As a matter of fact, any one of the resistances could be a variable resistor, a potentiometer, and V_A could have any value between 0 and V/R₁.

图 6.2右侧的图是分流器。两个电阻的电压V相同，总电流为两个电流之和，因此

The drawing on the right of Figure 6.2 is a current divider. The voltage V is the same for both resistors and the total current is the sum of the two currents, so

(6.11)

因此，电池或电压源的总等效电阻R _T为

Therefore, the total equivalent resistance, R_T, that the battery, or the voltage source, sees is

(6.12)

因此，电压源的等效总电阻为

Therefore, the voltage source sees an equivalent total resistance of

(6.13)

如果R ₁或R ₂为零，则R _T也为零，因为电池至少在一条路径中短路。通过选择不同的电阻值，我可以划分总电流并确定哪个电流占主导地位。如果两个电阻相同，则每个电流都是总电流的一半，这正是我们仅通过查看图 6.2所期望的。

If either R₁ or R₂ are zero, R_T is also zero since the battery is shorted in at least one of the paths. By selecting different resistance values, I can divide the total current and decide which of the currents dominates. If both resistances are the same, each of the currents is one half of the total current, which is what we expect just by looking at Figure 6.2.

我将在本书后面使用这些概念。

I will use these concepts later on in the book.

6.3 电容器

6.3 The Capacitor

电子产品中第二常见的元件是电容器。继续使用流体学类比，我可以将电容器比作一个带有柔性但没有多孔膜的盒子（图 6.3）。

The next most common component in electronics is the capacitor. Continuing with the fluidics analogy, I can compare the capacitor to a box with a flexible but no porous membrane (Figure 6.3).

当泵关闭时，如图 6.3 A 所示，膜处于水平状态。水对膜顶部和底部施加的压力相同。但是当泵打开时，水会积聚在膜顶部，从而扭曲其形状，如图 6.3 B 所示。想一想。水会流动，直到 (i) 泵关闭或 (ii) 膜的弹力抵消了泵的力。当我关闭泵时，水不会流到任何地方，因此膜仍然变形，如图6.3 B所示。

When the pump is off, Figure 6.3A, the membrane is horizontal. The water applies the same pressure on top as at the bottom of the membrane. But when the pump is turned on, the water accumulates at the top of the membrane distorting its shape, Figure 6.3B. Think about it. The water flows until (i) the pump is turned off or (ii) the elastic force of the membrane counterbalances the force of the pump. When I turn the pump off, the water does not flow anywhere so the membrane remains distorted, as in Figure 6.3B.

让我向你展示一下这种膜在流体回路中的工作原理。请看图 6.4。让我们一步一步来。首先看一下图 6.4的顶部图。当我打开泵时，瞬间就会有水流过沙箱受泵的强度和沙箱的电阻率限制。开始时，水也会冲向膜，直到膜无法再拉伸。此时，流过电容器的流量降至零。不再有水流向膜。流过沙箱的流量继续不间断。（图顶部的箭头表示水的流动。我显示了一个进入电容器的三角形，以表示初始水流量很高，电容器充满后流量会逐渐减小。膜盒完全拉伸后，电流继续仅流过沙箱。）

Let me show you how this membrane works on a fluidic circuit. Look at Figure 6.4. Let's go one step at the time. Take a look first at the top drawing of Figure 6.4. As I turn the pump on, instantaneously there is a constant flow of water through the sandbox limited by the strength of the pump and the resistivity of the sandbox. At the start, there is also a rush of water to the membrane until the membrane cannot stretch anymore. At this point, the flow through the capacitor goes down to zero. No more water flows to the membrane. The flow through the sandbox continues uninterrupted. (The arrow at the top of the figure indicates the flow of the water. I show a triangular shape going into the capacitor to indicate the initial water flow is high and it dies down after the capacitor is full. After the membrane box is fully stretched, the current continues flowing only through the sand box.)

接下来，让我关掉水泵。水泵中不再流出水。膜将水推回，并将其储存的水送过电阻器，直到膜中储存的所有水都用完。在图 6.4的右侧，我仅显示了水流过沙箱的图。当我打开水泵时，水均匀地流过沙箱，但是当我关掉水泵时，流量不会立即降至零，而是储存在膜中的水会继续流过沙箱，直到膜中储存的所有水都用完。

Next, let me turn the pump off. No more water is flowing from the pump. The membrane pushes the water back and sends its stored water through the resistor until all the water stored in the membrane is gone. At the right of Figure 6.4 I show the plot of the flow of water through the sandbox only. As I turn the pump on, the water flows uniformly through the sandbox, but when I turn the pump off, instead of the flow going instantaneously to zero, the water stored in the membrane continues to flow through the sandbox until all the water stored at the membrane is gone.

这正是电容器的作用。

This is exactly what an electrical capacitor does.

电容器基本上是由两个导电板之间的绝缘材料构成的夹层（图 6.5）。

The electrical capacitor is basically a sandwich composed of an insulating material between two conductive plates (Figure 6.5).

如果我打开开关，就像流体的情况一样，电流瞬间流过电阻，电容充电至电压V。只要开关打开，电流V / R就会流过电阻，但是当我关闭开关时，电容中积累的电荷会通过电阻放电，电流持续流动，直到电容器中不再有电荷。我在图 6.5右侧显示了通过电阻器的电流，其形状与图 6.4中的流体情况相同。

If I turn on the switch, exactly as in the fluidic case, the current instantaneous flows through the resistor and the capacitor charges to the voltage V. The current, V/R, flows through the resistor as long as the switch is on, but when I turn the switch off, the charges accumulated in the capacitor discharge through the resistor and the current continues flowing until no more charges remain in the capacitor. I show the current through the resistor at the right of Figure 6.5 and its shape is identical to the fluidic case in Figure 6.4.

您是否曾经想过，为什么当您的电子设备出现问题时，技术人员会要求您拔下电源插头，等待几秒钟，然后再重新插入？这个神秘的解决方案可以解决多达 50% 的问题，因为我们想给系统时间放电电路中的所有电容器。

Have you ever wondered why, when you have a problem with an electronic appliance, the technician asks you to unplug the appliance, wait a few seconds, and plug it back in? This mysterious solution that resolves up to 50% of problems is because we want to give the system time to discharge all the capacitors in the circuit.

电容器可容纳的电荷量取决于其面积、绝缘材料的类型、绝缘材料的厚度以及施加的电压。我们可以用以下公式来表达这种关系：

How many charges the capacitor can hold depends upon its area, the type of insulating material, the thickness of the insulating material, and the applied voltage. We can express this relation by:

(6.14)

其中Q是以库仑为单位测量的电荷数，C是电容器的值。与电阻的情况一样，我们也可以讨论电容，它与电阻率类似，是绝缘材料的一种特性。如果我们知道电容器的尺寸和使用的绝缘材料，我们就可以计算出电容器的值。关系是

where Q is the number of charges measured in coulombs and C is the value capacitor. As in the case with the resistance, we can also talk about a capacitance which, similar to the resistivity, is a property of the insulating material. This capacitance allows us to calculate the value of the capacitor if we know its dimensions and the insulating material we use. The relationship is

(6.15)

其中A为导电板的面积，d为板之间的间距，ε _o为自由空间介电常数（ε _o = 8.85 × 10 ⁻¹² m ⁻³ kg ⁻¹ s ⁴ A ²），ε _r为相对介电常数，即特定材料的介电常数与自由空间介电常数之比。电容器的单位为法拉，介电常数的单位为法拉/米。集成电路制造中最常用的绝缘体SiO _{2的相对介电常数为}ε _rSiO2 = 3.9。

where A is the area of the conductive plates, d is the separation between the plates, ε_o is the permittivity of free space (ε_o = 8.85 × 10⁻¹² m⁻³ kg⁻¹ s⁴ A²), and ε_r is the relative permittivity, that is, the permittivity of the specific material compared to the permittivity of free space. The units of the capacitor are Farads and the units of the permittivity are Farads/meter. The relative permittivity of SiO₂, the most prevalent insulator used in integrated circuit fabrication, is ε_rSiO2 = 3.9.

电容器中的电压和电流之间的关系为

The relationship between voltage and current in the capacitor is given by

(6.16)

我在这里使用符号 Δ，因为只有当电压发生变化时，电路中才会有电流。想一想。即使电路被两个板之间的绝缘材料中断，当我将电池连接到电容器时，电子也会涌向一个板，使其变为负极，而另一个板中的电子会减少，使其变为正极。对于外部观察者来说，即使两个板之间没有电荷移动，看起来也像是有电流通过电容器。但是，只要板的电位等于电池的电压，电流就会停止，因为电压不会变化。因此，只有当电容器两端的电压发生变化时才会有电流。

I use the symbol Δ here because there is current in the circuit only when the voltage changes. Think about it. Even though the circuit is interrupted by an insulating material between the two plates, at the moment I connect the battery to the capacitor there is a rush of electrons to one plate, making it negative, and a reduction of electrons in the opposite plate, making it positive. For an external observer, it looks like there is current through the capacitor even though no charges move between the two plates. But as soon as the potential at the plates is equal to the voltage at the battery, the current stops because the voltage does not change. So there is current only when the voltage across the capacitor changes.

6.4 电感器

6.4 The Inductor

电感器基本上是由导电材料制成的线圈（图 6.6左）。流过线圈的电流会产生磁场，该磁场会储存电能。该磁场与线圈的匝数、线圈的横截面积以及线圈内部材料的磁性成正比。

An inductor is basically a coil made of a conductive material (Figure 6.6, left). A current flowing through the coil generates a magnetic field which stores the electrical energy. This magnetic field is proportional to the number of turns, the cross‐section of the coil, and the magnetic properties of the material inside the coil.

电感器相当于安装在飞轮上的水轮。当水开始流动时，水轮开始旋转，一开始非常缓慢，然后越来越快，直到其速度与水速相同。水轮达到稳定状态所需的时间取决于轮子的惯性，也就是说，如果我将一个非常重的飞轮连接到水轮的轴上，轮子需要很长时间才能开始快速移动。当轮子达到平衡状态并且转动速度与水流一样快时，轮子对水流没有任何阻力，非常类似于电路中的电感器（再次假设没有摩擦）。

The inductor is equivalent to the water wheel attached to a fly wheel. As the water start flowing, the water wheel starts rotating, first very slowly and then faster and faster until its speed is the same as the speed of the water. How much time it takes for the water wheel to reach its steady‐state speed depends upon the inertia of the wheel, that is, if I attach a very heavy fly wheel to the axis of the water wheel, it will take a long time for the wheel to start moving fast. When the wheel reaches equilibrium and it is turning as fast as the water flow, the wheel poses no resistance whatsoever to the flow of water, very similar to the inductor in an electric circuit (assuming again that there is no friction).

现在让我们看看当我们像添加电容器一样添加电阻时会发生什么。图 6.7显示了这种情况。请注意，我已用水轮替换了膜，沙箱现在与水轮串联。

Now let's see what happens when we add a resistor like we did with the capacitor. Figure 6.7 shows this case. Note that I have replaced the membrane by the water wheel and the sandbox is now in series with the water wheel.

现在，流经这些元件的电流相似但不同。当我们第一次打开水泵时，带有飞轮的水轮会阻碍水流，然后水轮会慢慢开始移动。因此，流经沙箱的流量从零开始，随着飞轮获得越来越多的旋转能量而增加。当达到稳定状态时，飞轮不会对水流产生任何阻力，流量仅取决于泵的功率和沙箱的阻力，正如我们在第6.2 节中看到的那样。

Now the current through the elements is similar but different. When we first turn the pump on the water wheel with a fly wheel resists the flow of water and it slowly starts moving. Therefore, the flow through the sandbox starts at zero and increases as the fly wheel gets more and more rotational energy. When it reaches the steady state, the fly wheel does not present any resistance to the flow of water and the flow depends only on the power of the pump and the resistance of the sandbox, as we saw in Section 6.2.

同样的情况也发生在连接到电池和电阻的电感器上。在我打开开关的瞬间，电路中没有电流。磁场开始形成，电流增加，直到磁场完全形成，电流仅受电阻限制（I = V / R ）。电流的形状与我在图 6.7右侧显示的形状完全相同。

The same thing is happening with an inductor connected to a battery and a resistor. At the instant of time I turn the switch on, there is no current in the circuit. A magnetic field starts forming and the current increases until the magnetic field is fully formed, and the current is limited only by the resistance (I = V/R). The shape of the current is exactly the same as the one I show at the right of Figure 6.7.

我故意没有告诉你的是，如果我瞬间关掉水或开关，会发生什么。飞轮的动能和电感器的磁场都必须瞬间消失。在流体系统中，飞轮的压力将非常大，可能会炸毁管道（想象一下如果我们瞬间停止火车，将会发生怎样的灾难）。磁场也是一样。如果我们关闭电路或拔掉电路，就会产生瞬间巨大的电流。当你从电源插座中拔出电源线时，你会看到插头中冒出火花。

What I failed to tell you, on purpose, is what happens if I turn the water, or the switch, instantaneously off. Both the kinetic energy of the fly wheel and the magnetic field of the inductor have to collapse instantaneously. In the fluid system, the pressure of the fly wheel is going to be immense and probably blow the pipe (imagine the catastrophe if we were to stop a train instantaneously). The same thing with the magnetic field. If we turn the circuit off or unplug the circuit, there is an instantaneous huge current. You have observed the spark in the plug when you pull the cord out an electrical socket.

电感值的计算与电阻器和电容器一样，通过以下关系进行：

The value of the inductance is calculated, like we have seen with resistors and capacitors, by the relation:

(6.17)

其中L为电感，μ _o为自由空间的磁化率或磁导率（μ _o = 1.26 × 10 ⁻⁶ H m ⁻¹或 kg m s ⁻² A ⁻²），μ _r为相对磁导率，N为线圈匝数，A为线圈截面积，l为线圈长度。电感的单位为亨利（H = kg m ² s ⁻² A ⁻²）。铁的相对磁导率在 5000 到 200 000 之间，具体取决于其纯度，与空气相比有很大提高，空气仅为 1.0006，仅比真空大一点点。

where L is the inductance, μ_o is the magnetic susceptibility or permeability of free space (μ_o = 1.26 × 10⁻⁶ H m⁻¹ or kg m s⁻² A⁻²), μ_r is the relative permeability, N is the number of turns of the coil, A is the cross‐section area of the coil, and l is the length of the coil. The unit of inductance is the Henry (H = kg m² s⁻² A⁻²). The relative permeability of iron is between 5000 and 200 000, depending on its purity, quite an increase over air, which is only 1.0006, just a tiny bit larger than vacuum.

电感器两端的电压与电流不成比例，而是与电流的变化成比例，我可以将其写成：

The voltage across the inductor is proportional not to the current, but to the change in the current, which I can write as:

(6.18)

因此，只有当电感线圈中的电流不断变化时，电感两端才会有电压。请注意，电压和电流之间的关系与电容器的关系完全相反。只有当电容器两端的电压发生变化时，才会有电流。

So there is a voltage across the inductor only if the current through its coils keep on changing. Note that this relation between voltage and current is exactly the opposite of the capacitor. The current exists only if the voltage across the capacitor changes.

还有另一个重要的区别。电容器的极板被绝缘体隔开，因此电子不会通过绝缘体从一个极板物理运动到另一个极板。在某些时候，电压太大，电介质会击穿。当你购买电容器时，它不仅会告诉你它的值（以法拉为单位），还会告诉你可以施加的最大电压。

There is also another important difference. The plates of the capacitor are separated by an insulator, so there is not physical motion of electrons from one plate to the other through the insulator. At some point the voltage is so large that the dielectric breaks down. When you buy a capacitor, it not only tells you its value (in Farads) but also the maximum voltage you can apply to it.

电感器的情况则相反。任何电感器中构成线圈的导线几乎没有电阻，因此即使是很小的恒定电压也会产生极大的电流（记住I = V / R），并会烧毁电感器或电源。切勿将线圈连接到电池。

The opposite is true for the inductor. The wire that forms the coils in any inductor has practically no resistance, so even a small constant voltage generates extremely large currents (remember I = V/R) and will burn either the inductor or the source. Don't ever connect a coil to a battery.

6.5 正弦电压

6.5 Sinusoidal Voltage

19 世纪 80 年代，托马斯·爱迪生 (1847-1931) 和乔治·威斯汀豪斯 (1846-1914) 之间展开了一场竞争，前者希望开发一种基于直流、恒定电压和电流的电气系统，后者则提出了一种交流电压和电流系统。我不必告诉你谁赢了。交流电比直流电有很大优势，我将在下面向您展示。

In the 1880s there was a competition between Thomas Edison (1847–1931), who wanted to develop an electrical system based on direct, constant, voltage, and current, and George Westinghouse (1846–1914), who proposed a system of alternating voltage and current. I do not have to tell you who won. Alternating current has great advantages over direct current, as I will show you below.

正弦电流就是图 6.8所示的电流。美国插座的额定电压为 120 V、60 Hz、AC（交流电为 AC），但实际电压随时间的变化从 0 到 170 V 再回到 0 并下降到 −170 V，即相同的电压，但极性相反，并且每秒上升和下降 60 次（欧洲大部分地区的电压为 220 V 和 50 Hz）。从 170 V 到 −170 V 的正弦电压额定为 120 V 的原因是因为电阻上耗散的功率与 120 V 的 DC（直流电）相同。峰值之间的时间为 0.01667 秒，即 1/60 秒。

A sinusoidal current is just that, Figure 6.8. The voltage we get at sockets in the USA is rated as 120 V, 60 Hz, AC (AC for alternating current) but the actual voltage as a function of time goes from 0 to 170 V back to 0 and down to −170 V, that is, the same voltage but with the polarity reversed and it goes up and down 60 times a second (in most of Europe the voltage is 220 V and 50 Hz). The reason that a sinusoidal voltage that goes from 170 V to −170 V is rated at 120 V is because the power dissipated across a resistor is the same as it would be for a DC (direct current) of 120 V. The time between peaks is 0.01667 s, that is 1/60 s.

电气系统和大型电器几乎只使用交流电压。微电子几乎只使用直流电压。这就是为什么大多数（如果不是全部）电子设备都需要带有整流器的电源线（无论是在线路中还是在设备中），将交流电转换为低压直流电。我将在下一章中讨论这些整流器。

Electrical systems and large appliances use almost uniquely AC voltages. Microelectronics use almost uniquely DC voltages. That is why most, if not all, electronic devices need a power cord with a rectifier, either in the line or in the device, that changes the AC to a low voltage DC. I will talk a about these rectifiers in the next chapter.

正弦电压和电流会改变电容器和电感器影响电流的方式。电容器两端的正弦电压会不断将电子发送到一个金属板并将其从另一个金属板上移除，反之亦然。如果您将电容器想象成一个有两扇门的房间，并且您会看到穿着类似的人从一扇门进来，从另一扇门出去，然后又回来，您不会知道在房间中间有一堵墙将房间一分为二。实际上，这两扇门是相连的。我将在附录 6.1中解释电容器对正弦电压的有效电阻。

Sinusoidal voltages and currents change the way that capacitors and inductors affect the currents. A sinusoidal voltage across the capacitor is constantly sending electrons to one metal plate and removing it from the other and vice versa. If you imagine the capacitor as a room with two doors and you see people similarly dressed coming in through one door and leaving through another and then back again you won't know that in the middle of the room, there is a wall dividing the room in half. For all practical purposes the two doors are connected. I will explain the effective resistance that the capacitor presents to a sinusoidal voltage in Appendix 6.1.

电感器也是一样。如果电流不断变化，上下变化，磁场就会增大，然后减小到零，并不断改变方向。此外，它还会阻碍电流的流动，我在附录 6.1中量化了这种阻力。

The same thing with the inductor. If the current keeps on changing, up and down, the magnetic field will increase, then decrease to zero and change directions constantly. Also, it will oppose the flow of the current and I quantify that resistance in Appendix 6.1.

6.6 电感器应用

6.6 Inductor Applications

由于我不会在本书的其余部分讨论电感器，因此我想在这里提及它的几个应用。

Since I will not discuss inductors in the rest of the book, I’d like to mention here a couple of its applications.

如果您开车，您就会经常经过电感器。它们由插入路面的四到六圈电线组成。该线圈位于路面下方约 5 厘米处，线圈环的直径约为 1.5 米。线圈上始终施加有较小的交流电压。电感会对电流产生阻力。当汽车、卡车、自行车或大块金属经过它时，线圈的电感会发生变化，因此电流也会发生变化。由于电流的变化取决于线圈顶部的特定金属物体，也取决于车辆的类型、大小和高度，因此不仅可以识别汽车的存在，还可以识别正在经过它的汽车类型。

If you drive a car, you go over inductors all the time. They consist of four to six turns of wire inserted in the pavement. This coil is placed about 5 cm under the pavement and the diameter of the coil's loop is roughly 1.5 m. There is always a small AC voltage applied to the coil. The inductance presents a resistance to the current. When a car, truck, bicycle or large piece of metal goes over it, the inductance of the coil changes and therefore the current also changes. Because the change in the current depends on the specific metallic object on top of the coil and it depends on the type, size, and height of the vehicle, it is possible to identify not only the presence of a car but what type of car is going over it.

电感器最常见的应用之一，也是西屋公司赢得爱迪生青睐的原因，是变压器，它只在正弦电压下工作（图 6.9）。

One of the most common applications of the inductor and the reason Westinghouse won over Edison, is the transformer, which works only with sinusoidal voltages Figure 6.9.

我们在初级线圈上施加正弦电压，这样就会产生磁场，正如我们所见，磁场与线圈的匝数成正比。由于交流电流不断从正变为负，然后再变回正，磁场的大小和方向也不断变化，当电流朝一个方向流动时，磁场指向上方，而当电流朝相反方向流动时，磁场指向下方。磁芯将这个磁场导向次级线圈。两个线圈中的磁场相同。次级线圈的电压与线圈的匝数成正比。因此，如果次级线圈的匝数是初级线圈的两倍，则次级线圈上的电压也是初级线圈的两倍。但由于功率必须是相同（不能凭空产生电力），电流是初级线圈中电流的一半。

We apply a sinusoidal voltage at the primary coil, and this generates a magnetic field which, as we have seen, is proportional to the number of turns of the coil. Since the AC current changes continuously from positive to negative and back again, the magnetic field also constantly changes in magnitude and in direction, pointing up when the current goes in one direction and pointing down when it goes in the opposite direction. A magnetic core directs this magnetic field to the secondary coil. The magnetic field is the same in both coils. The voltage of the secondary coil is proportional to the number of turns in its coil. So, if there are twice as many turns in the secondary coil as there are in the primary coil, the voltage across the secondary coil is twice as high. But because the power has to be the same (you cannot create power out of nothing), the current is half as much as the current in the primary coil.

我们可以利用这一特性来产生电力并将其从一点输​​送到另一点，并将正弦电压改变为适合我们使用的电压。图 6.10显示了典型配电系统的示意图。

We can use this property to generate and send electricity from one point to another and change the sinusoidal voltage to whatever is appropriate for our use. Figure 6.10 shows a sketch of a typical electrical distribution system.

一个非常大的水力发电机可以输出 1000 MW（兆瓦）的电力，电压为 20 kV（千伏）。变压器将电压从 20 kV 升至 200 kV。发电机和输电线之间的变压器的比率为 1 比 10。当我们进入变电站时，电压会通过另一个变压器回到 20 kV，此时的比率为 10 比 1。我们进入工厂时，可能需要 10 kV 的高电压。因此，另一个比率为 2 比 1 的变压器会执行该转换。当我们进入家庭时，我们需要将电压降至 120 V。因此，最后一个比率为 167 比 1 的变压器为我们的插座提供合适的电力。

A very large hydropower generator can output 1000 MW (megawatts) with a voltage of 20 kV (kilovolts). A transformer increases the voltage from 20 kV to 200 kV. The transformer between the generator and the transmission line has a ratio of 1 to 10. As we go to the substation, the voltage goes back to 20 kV with another transformer with a ratio now of 10 to 1. We proceed to a factory that may need a high voltage of 10 kV. So, another transformer with a ratio of 2 to 1 performs that change. As we go to the houses, we need to bring down the voltage to 120 V. So, a final transformer with a ratio of 167 to 1 provides the right electricity to our outlets.

为什么要这么麻烦呢？好吧，您已经知道答案了。我们已经看到，电阻器中耗散的功率等于电流平方乘以电阻，P = I ² R，等式 (6.3)。传输线的电阻很低，但不为零。对于给定的功率，如果我将电压提高 10 倍，电流就会减少相同的量 ( W = V  ×  I )，而传输线电阻中损失的功率虽然可能很小，但现在会降低 100 倍 ( P = I ²  ×  R )。如果我将电压提高 20 倍，传输线中耗散的功率将会减少 400 倍。（这是一种简化。还有其他电磁效应和趋肤效应限制了我们可以达到的高度，但您明白我的意思。）为了节省传输中的功率，我们希望电压尽可能高，以便电流尽可能小。但这是有限制的。我们不希望电压过高，导致火花从一条线路流到另一条线路，或流到走在线路下的人身上。没有什么事情像简单的理论告诉你的那样简单。

Why go to all this trouble? Well, you already know the answer. We have seen that the power dissipated in a resistor is equal to the square of the current times the resistance, P = I²R, Eq. (6.3). The resistance of a line is quite low, but not zero. For a given power, if I raise the voltage by a factor of 10, the current decreases by the same amount (W = V × I), and the power lost in the resistance of the transmission line, as small as it may be, it is now 100 times lower (P = I² × R). If I were to increase the voltage by a factor of 20, the power dissipated in the line would be 400 times less. (This is a simplification. There are other electromagnetic and skin effects that limit how high we can go, but you get the idea.) To save power in the transmission we want the voltage to be as high as possible, so that the current is as small as possible. There are limitations. We don't want the voltage so high that sparks flow from one line to another or to the person walking under the lines. Nothing is as simple as a simple theory would tell you.

现在我们已经了解了这些电气/电子元件的工作原理，我们可以看看半导体 pn 结（二极管）的许多用途。

Now that we have an idea of how these electrical/electronic components work, we are ready to take a look at many of the uses of semiconductor pn‐junctions, the diodes.

6.7 总结与结论

6.7 Summary and Conclusions

在稍微澄清了电压和电流之间的区别之后，我们研究了所谓的无源元件以及这些元件中电压、电流和功率之间的关系。在电阻器中，该关系由欧姆定律给出，V = IR，功率由P = V  ×  I = I ² R给出。我们已经看到，电容可以存储电荷，直到其极板上的电压等于施加的电压。流过电容器的电流与电压成正比，而不是与电压的变化成正比。电感器通过其产生的磁场存储能量。在电感器中，电压的变化不是与电流有关，而是与电流的变化有关。

After clarifying a little the difference between voltage and current we have studied what we call the passive elements and the relationship between voltage, current, and power in these components. In the resistor the relationship is given by Ohms law, V = IR and the power by P = V × I = I²R. We have seen that the capacitance can store charges until the voltage across its plate is equal to the applied voltage. The current through a capacitor is proportional not to the voltage but to the change of the voltage. The inductor stores energy by the magnetic field it generates. In the inductor the voltage changes as a function not of the current but of the change of the current.

通过了解我们用于制造它们的材料的特性，可以计算出所有这些元素的值：电阻器的电阻率、电容器的介电常数和电感器的磁导率。

The value of all of these elements can be calculated by knowing the property of the materials we use to make them: resistivity for the resistor, permittivity for the capacitor, and permeability for the inductor.

通过了解这些组件，我们现在可以解释可以用 pn 结器件（即二极管）设计的许多实际电路。

With the understanding of these components we are ready now to explain the many practical circuits we can design with pn‐junction devices, that is, diodes.

附录 6.1 阻抗和相位变化

Appendix 6.1 Impedance and Phase Changes

在前面的章节中，我定性地介绍了电容器和电感器。在这里，我将进一步解释这两种器件在正弦输入电压下的性能。参见图 6.11。

In the previous sections I covered the capacitor and inductor qualitatively. Here I will explain a little more the performance of these two devices under a sinusoidal input voltage. Look at Figure 6.11.

首先，比较上面的两个正弦波，注意两条垂直虚线。上面的波是源电压，下面的波是通过电阻的电流。两个波都是同相的，也就是说，当电压上升时，通过电阻的电流也会上升，而当电压降至零时，电流也为零。也就是说，除了单位和幅度之外，这两条曲线是相同的，并且它们一个叠在另一个上面。

First, compare the top two sinusoidal waves and pay attention to the two vertical dashed lines. The top wave is the source voltage and the one below is the current through the resistor. Both waves are in‐phase, that is, when the voltage goes up, the current through the resistor also goes up and when the voltage goes down to zero, the current is also zero. That is, except for the units and the magnitudes, the two curves are identical and they fit one on top of the other.

现在让我们将电压波与流过电容器的电流进行比较。只有当电压变化时，才会有电流流过电容器，如公式 (6.16) 所示。当电压处于最高点时，电压不会变化，或者更准确地说，电压达到最高点之前的瞬时电压和达到最高点之后的瞬时电压相同。因此，该时刻的电压不会变化，因此流过电容器的电流为零（沿着虚线比较第一到第三个正弦波形）。这就是左侧虚线所示的内容。一旦电压开始下降，电容器中存储的电荷就会开始向后移动，当瞬时电压达到零（右侧虚线）时，即电压变化最快时，流过电容器的电流在负方向上最大。正弦电流比电压提前 90°。

Now let's compare the voltage wave with the current through the capacitor. There is current through the capacitor only when the voltage changes, Eq. (6.16). When the voltage is at the top, the voltage does not change, or more precisely the instantaneous voltage just before it hits the top and the instantaneous voltage just after are the same. So, the voltage at that instance of time does not change and therefore the current through the capacitor is zero (follow the dashed line and compare the first to the third sinusoidal waveforms). That is what the dashed line on the left shows. As soon as the voltage starts decreasing, the charges stored in the capacitor start moving back and when the instantaneous voltage reaches zero (dashed line on the right), that is, when the voltage changes most rapidly, the current through the capacitor is largest in the negative direction. The sinusoidal current is shifted 90° ahead of the voltage.

电感的情况则相反。为了清楚起见，让我们将流过电感的电流波（最低波）与电压（最高波）进行比较，而不是反过来。现在只有电流变化时才有电压，即公式(6.18)。首先，看一下左侧垂直虚线，我们发现当电流为零并迅速从负变为正时，电压最高，而当电流为最高（右侧虚线），因此没有变化，电压为零。电流波比电压波领先 90°。

The opposite is the case for the inductor. For clarity, let's compare the wave of the current through the inductor (the lowest wave) to the voltage (the uppermost wave) instead of the other way around. Now there is voltage only when the current changes, Eq. (6.18). First, taking a look at the left vertical dashed line, we see that when the current is zero and changing rapidly from negative to positive the voltage is highest and when the current is highest (dashed line on the right) and therefore not changing, the voltage is zero. The current wave is ahead of the voltage wave by 90°.

正弦电压可以用数学公式写成：

A sinusoidal voltage can be written mathematically as:

(6.19)

其中φ是相移，ω是 2 πf的乘积。我现在使用小的v来表示电压不再是常数，而是时间的函数。当电压不断变化时，会有电流“流过”电容器和电感器。我在“流过”一词上加了引号，因为在电容器中，没有电子从一块板物理移动到另一块板，但电子和正电荷会定期从每块板添加和移除，因此从外部看，它看起来像是有电流通过它。

where ϕ is the phase shift and ω is just the product 2πf. I now use small v to indicate that the voltage is no longer a constant but a function of time. When the voltage is changing constantly, there is a current “through” the capacitor and inductor. I put quotation marks around the word “through” because in the capacitor no electrons physically move from one plate to the other, but electrons and positive charges are being added and removed periodically from each plate, thus from the outside it looks like a current is passing through it.

这两个器件与电阻器一样，也会阻碍电流的流动。我们称之为电抗，符号为大写X。电抗由下式给出

These two devices, like the resistor, also oppose the flow of current. We call this reactance and is has the symbol capital X. The reactance is given by

(6.20)

这是有道理的，因为当频率趋于零时，即我们有一个恒定的直流电压或电流，_{ω趋于零，容抗 XC}趋于无穷大，即如果我们将直流电压连接到电容器，结果会是怎样？在直流条件下，电感电抗X _L会趋于零，没有任何阻力。上述电抗值只是对电流的阻力大小。还有相移。

This makes sense, since, when the frequency goes to zero, that is, we have a constant DC, voltage or current, ω goes to zero and the capacitive reactance X_C goes to infinity, which is what you would expect if we have a DC voltage connected to the capacitor. The inductive reactance, X_L, goes to zero with no opposition whatsoever under a DC condition. The values of the reactance above are just the magnitude of the opposition to the current. There is also the phase shift.

当我们将这两个设备中的任意一个或两个与电阻器组合在一起时，对电流的总阻力，我们称之为阻抗，用符号Z表示，其为：

When we have a combination of any or both of these two devices with the resistor, the total opposition to the current, we call it impedance, with symbol Z, is:

(6.21)

相位不再是 90°，而是取决于电阻和电抗的不同值的组合。我们可以通过以下公式计算新的相移：

and the phase is no longer 90° but a combination depending on the different values of the resistance and reactance. We can calculate the new phase shift by

(6.22)

7.1 太阳能电池

7.1 Solar Cells

PN 结最重要和最有价值的应用之一是太阳能电池。太阳能电池是二极管的一个非常简单的应用。不需要复杂的电路就能理解它的工作原理，只需要了解 PN 结的基本特性（见图7.1）。

One of the most important and valuable applications of the pn‐junction is the solar cell. The solar cell is a very simple application of a diode. It does not need a complicated circuit to understand how it works, just the basic properties of the pn‐junction (see Figure 7.1).

上面的图显示了半导体二极管的标准结构，即 n 型材料与 p 型半导体相邻。中间是耗尽区或过渡区。在此区域，电子从 n 型材料扩散到 p 型材料，在此过程中，n 型材料的正电荷增多，直到内部电位抵消扩散力。下面的草图显示了二极管内部的静电电位。我们已经在第 5 章图5.3中看到过这种情况，其中 n 型材料的正电荷增多，而 p 型材料的负电荷增多。现在假设一个光子（即光量子）撞击耗尽区中的原子。光子将其能量转移给原子。能量释放出一个电子，形成电子-空穴对，如图7.1的下部所示。由于存在电位梯度，电子向左移动到正电位，而空穴向右移动到负电位。请注意，电子和空穴的这种运动不需要任何电池或任何外部源：pn 结本身的内部场将电子和空穴分离并向不同方向移动。事实上，现在二极管变成了一个电“发电机”。看看它有多简单？我们称之为光伏 (PV) 电池。这个简单的装置可能会拯救世界免于气候爆炸。

The top figure shows the standard structure of a semiconductor diode, an n‐type material adjoined to a p‐type semiconductor. In the middle we have the depletion or the transition region. This is the region where electrons from the n‐type material diffuse toward the p‐type material and in doing so the n‐type material becomes more positive until the internal potential cancels the diffusion forces. The lower sketch shows the electrostatic potential inside the diode. We have seen this already in Chapter 5, Figure 5.3, where the n‐type material gets more positive and the p‐type more negative. Now suppose that a photon, that is, a quantum of light, hits an atom in the depletion region. The photon transfers its energy to the atom. The energy frees an electron, creating an electron–hole pair as I show in the lower part of Figure 7.1. Since there is a potential gradient, the electron moves to the left, toward the positive potential, and the hole moves to the right, toward the negative potential. Note that this motion of electrons and holes happens without the need of any battery or any external source: it is the internal field of the pn‐junction itself that separates and moves the electrons and holes in different directions. As a matter of fact, now the diode becomes an electrical “generator.” See how simple it is? We call this a photovoltaic (PV) cell. This simple device may save the world from climate explosion.

^{太阳每小时每平方米}释放约 500-1000 瓦的能量。假设屋顶平均面积为 100 平方米，覆盖太阳能电池板，每天接受 6 小时的阳光照射，我们每天可获得 300 千瓦的电能。太阳能电池的效率（尤其是最常用、因此价格较低的太阳能电池）仅为 15% 左右，因此我们每天可获得约​​ 45 千瓦的电能。典型的房屋每天使用约 25 千瓦的电能。

The sun gives out about 500–1000 W of energy per meter square per hour. If you assume an average roof area of 100 m², covered with solar cell panels, and maybe six hours of sun, we get 300 kW a day. The efficiency of solar cells, especially those that are most commonly used, and thus less expensive, is only about 15%, so we collect about 45 kW a day. A typical house uses about 25 kW a day.

我们用于光伏电池的主要半导体是硅、砷化镓 (GaAs)、碲化镉 (CdTe) 和硫化镉 (CdS)。GaAs 最昂贵，但效率最高。

The main semiconductors we use for PV cells are silicon, gallium arsenide (GaAs), cadmium telluride (CdTe), and cadmium sulfide (CdS). GaAs is the most expensive, but it has the best efficiency.

7.2 整流器

7.2 Rectifiers

到目前为止，二极管在电子器件中的主要应用是整流器。正如我之前提到的，电子设备使用 DC（直流电）。我们需要一个整流器将正弦输入电压转换为恒定电压（图 7.2）。

By far the main application of diodes in electronics is as rectifiers. As I mentioned before, electronic devices use DC (direct current). We need a rectifier to change the sinusoidal input voltage to a constant voltage (Figure 7.2).

当正弦输入电压V _in为正时，电流会毫无困难地流过二极管，整个电压会落在电阻 R 上。在正输入周期内，该电路的输出电压V _out在所有实际用途上都等于V _{in 。当输入正弦电压}V _in变为负时，二极管会阻碍电流流动，因此电阻两端的电压为零。（实际上，由于反向偏置电流很小，电压非常小。在所有实际用途上，流过电阻的电流以及电阻两端的电压都是微不足道的。）

When the sinusoidal input voltage, V_in, is positive, the current goes through the diode with no difficulty and the entire voltage drops across the resistor R. The output voltage in this circuit, V_out, is for all practical purposes equal to V_in during the positive input cycle. When the input sinusoidal voltage, V_in, becomes negative, the diode opposes the flow of the current so the voltage across the resistance is zero. (Actually the voltage is very small because of the tiny reversed biased current. For all practical purposes the current through the resistor and therefore the voltage across the resistor is insignificant.)

这是整流的第一步。从正极到负极来回变化的电压现在只是正极。这还不是真正的直流、恒定的电压，就像电池，但这只是第一步。下一步是平滑电压，使其更加恒定。我们通过在电路中添加一个电容器来实现这一点（图 7.3）。

That is the first step of rectification. A voltage that goes back and forth from positive to negative, now is only positive. That is not yet a real direct, constant, voltage like that of a battery, but it is the first step. The next step is to smooth out the voltage to make it more constant. We do this by adding a capacitor in the circuit (Figure 7.3).

现在看看如果我们在电阻上并联一个电容会发生什么。当正弦输入电压为正时，电流流过二极管，除了流过电阻 R 之外，它还会将电容 C 两端的电压增加到最大正输入电压。随着正弦输入电压开始下降，存储在电容中的输出电压V _out现在高于输入电压V _in。此时不再有电流流过二极管，二极管现在处于反向偏置状态。瞬间给电容充电的电子开始通过电阻放电。根据电容值和电阻，下一个正输入电压峰值将在电容完全放电之前击中二极管。此时，二极管再次变为正向偏置，电流流动，电容电压回到最大正输入电压。输出电压尚未真正恒定，但正在接近恒定。输出电压的平滑程度取决于电容值与电阻值之比。附录 7.1更详细地说明了如何选择电阻器和电容器组合以获得所需的恒定输出电压。

Now look at what happens if we add a capacitor in parallel with the resistor. When the sinusoidal input voltage is positive, the current flows through the diode and in addition to flowing through the resistor R, it increases the voltage across the capacitor C to the maximum positive input voltage. As the sinusoidal input voltage starts decreasing, the output voltage, V_out, stored in the capacitor, is now higher than the input voltage, V_in. At this point no more current flows through the diode, which is now reversed biased. The electrons that have instantaneously charged the capacitor start discharging through the resistor. Depending on the value of the capacitance and the resistance, the next positive input voltage peak will hit the diode before the capacitor has had time to completely discharge. At that point, the diode becomes forward biased again, current flows and the capacitor voltage goes back to the maximum positive input voltage. The output voltage is not yet really constant but is getting there. How smooth the output voltage is depends on what the value of the capacitor is compared to the resistor. Appendix 7.1 explains in more detail how to select a resistor and capacitor combination to obtain the desired constant output voltage.

当然，我们可以做得更好。图 7.4显示了一个整流电路，它使用正弦输入电压的正向和负向摆动将电容器充电至最大正电压。

Of course, we can do better than that. Figure 7.4 shows a rectifying circuit which uses both the positive and negative swings of the sinusoidal input voltage to charge the capacitor to the maximum positive voltage.

我现在添加了一个变压器。大多数电子设备使用 2 到 15 V 之间的直流电压。例如，iPad 使用 5 V。变压器将正弦波幅度从 120 V 降至 5 V。现在我使用四个二极管而不是一个（图 7.4顶部）。当点 A 的输入电压为正，因此点 B 为负时，二极管 1 和 4 正向偏置，2 和 3 反向偏置。（请注意二极管 4 和端子 B 之间的线上画的小桥。这是标准电子符号，表示水平线未连接到二极管 3 和 1 之间的垂直线。）电流从端子 A 流向二极管 1，将电容器的上板正向充电至最大电压 A，流过电阻器，电流通过二极管 4 返回到点 B。请注意，在这个半周期中，二极管 2 和 3 反向偏置，因此它们不导通。这就是我在图 7.4左下方的草图中展示的情况。

I have added now a transformer. Most electronic devices work with DC voltages between 2 and 15 V. iPads, for example use 5 V. The transformer brings the sinusoidal wave amplitude down from 120 V to 5 V. Now instead of one diode, I use four (top of Figure 7.4). When the input voltage at point A is positive, and therefore point B is negative, diodes 1 and 4 are forward biased and 2 and 3 reversed biased. (Note the small bridge drawn on the line between diode 4 and terminal B. This is the standard electronic symbol indicating that the horizontal line is not connected to the vertical line between diodes 3 and 1.) The current flows from terminal A to diode 1, charges positively the upper plate of the capacitor to the maximum voltage A, flows down through the resistor and the current returns to point B through diode 4. Note that in this half cycle diodes 2 and 3 are reversed biased so they do not conduct. This is the situation I show in the sketch at the lower left of Figure 7.4.

在正弦周期的负半部分，即负周期，点 A 为负，点 B 为正。点 B 为正，使二极管 2 和 3 正向偏置，使 1 和 4 反向偏置，所以现在二极管 2 和 3 导通。正电流从 B 流出，流过二极管 2，然后也沿着电阻器流下，通过二极管 3 返回点 A。我在图 7.4的右下方显示了这种情况。在输入电压的两个周期（正周期和负周期）中，流过电阻器的电流都会下降。现在，电容器升压至最大输入电压的频率是图 7.2电路中的两倍，在美国电力系统中为每秒 120 次，而不是 60 次。

At the negative half of the sinusoidal cycle, the negative cycle, point A is negative and point B is positive. Point B, being positive, makes diodes 2 and 3 forward biased and 1 and 4 reversed biased so now diodes 2 and 3 are conductive. The positive current goes from B, through diode 2 and, voilà, also down the resistor, returning to point A through diode 3. I show this case at the bottom right of Figure 7.4. The current through the resistor goes down during both cycles of the input voltage, the positive and negative cycles. Now the capacitor is kicked up to the maximum input voltage twice as often as in the circuit of Figure 7.2, in the US electrical system 120 times a second instead of 60.

还有其他方法可以实现完全整流。图 7.5显示了另一种方法。在这种情况下，输出电压是 A 和 B 之间电压的一半。你能弄清楚它是如何工作的吗？

There are other ways you can get full rectification. Figure 7.5 shows a different way. In this case the output voltage is half the magnitude of the voltage between A and B. Can you figure out how it works?

7.3 电流保护电路

7.3 Current Protection Circuit

二极管的另一个常见用途是作为反向电流保护电路。如果将电池装反（我这样做了多少次！），许多精密电子设备都会被毁坏。一个非常简单的电路可以保护设备免受电池更换不当的影响。图 7.6显示了这样一个电路。如果电池装反，二极管会阻断电流，防止任何损坏。虚线框表示具有一定等效输入电阻的精密电路。

Another common use of a diode is as a reversed current protection circuit. Many delicate electronic devices would be destroyed if you were to install the batteries backwards (how many times have I done that!). A very simple circuit protects the device from careless battery changing. Figure 7.6 shows one such circuit. If the batteries are reversed, the diode blocks the current, preventing any damage. The dotted box represents a delicate circuit that has some equivalent input resistance.

7.4 钳位电路

7.4 Clamping Circuit

二极管的另一个应用是作为钳位器。钳位器会移动正弦波的零值，使整个正弦函数为正（如果我反转二极管，则为负）。正弦电压的正峰值是原来的两倍，而最小负值为零（或非常接近零），也就是说，正弦输出电压不再从 −10 到 +10 V，而是从 0 到 +20 V。图 7.7显示了该电路。

Another application of diodes is as clampers. A clamper shifts the zero value of a sinusoidal wave so that the entire sinusoidal function is positive (or negative if I reverse the diode). The positive peak of the sinusoidal voltage is twice as high, and the most negative value is zero (or very close to it), that is, the sinusoidal output voltage instead of going from −10 to +10 V, now goes from 0 to +20 V. Figure 7.7 shows the circuit.

当输入电压V _in处于负周期时，点 B 为正，二极管正向偏置，因此电流流过二极管并对电容器充电，使点 A 带正电，达到正弦电压负周期的最大值。让我们使用一些数字。假设输入电压V _in从 −10 变为 +10 V。当输入V _in处于负周期时，点 B 为正，即 +10 V，二极管充当短路，电流对电容器（点 A）充电至 +10 V。一旦输入电压开始下降，点 A 就会变得比点 B 更正，二极管就会反向偏置并且不导通，而是开路，因此现在，在V _{in的最大正值下，点 A 处的电压是}V _in的值加上电容器两端的电压之和，因此点 A 现在为 +20 V。当V _in再次变为负时，A 处的电压为 0（电容器的 10 V 减去负摆幅的 10 V）。电压输出V _{out已经发生偏移，如图}7.7右侧所示。

When the input voltage, V_in, is in the negative cycle, point B is positive, the diode is forward biased and therefore current flows through it and charges the capacitor so point A becomes positively charged to the maximum value of the negative cycle of the sinusoidal voltage. Let's use some numbers. Suppose that the input voltage, V_in, goes from −10 to +10 V. When the input V_in is in the negative cycle, point B is positive, +10 V, the diode acts as a short circuit and the current charges the capacitor, point A, to +10 V. As soon as the input voltage starts decreasing, point A becomes more positive than point B, and the diode becomes reversed biased and does not conduct, it is open, so now, at its maximum positive value of V_in, the voltage at point A is the sum of the value V_in plus the voltage across the capacitor, so point A is now +20 V. When V_in becomes negative again, the voltage at A is 0 (10 V from the capacitor minus 10 V from the negative swing). The voltage output V_out has shifted, as I show on the right of Figure 7.7.

我应该澄清一下我之前没有提到过的内容，以免让事情变得复杂。请记住，二极管的导通电压在 0.5 到 0.7 V 之间。因此，电压输出实际上不是在 0 到 20 V 之间，而是在 -0.5 到 +19.5 V 之间。这种效果适用于我在本章中描述的所有二极管电路。

I should make a clarification which I did not mentioned before so as not to complicate matters. Remember that the diode has a turn‐on voltage between 0.5 and 0.7 V. Therefore, the voltage output is not really between 0 and 20 V, but something between −0.5 and +19.5 V. This effect applies to all the diode circuits I describe in this chapter.

7.5 电压限幅器

7.5 Voltage Clipper

在许多情况下，我们希望确保电压不超过某个值。我们可能有一个输入电压，比如说 10 V，但电路的某些部分不应高于 5 V。这时，我们就需要使用电压限幅器（图 7.8），这是一个可以完成此任务的简单电路。

In many cases we want to be sure that the voltage does not exceed a certain value. We may have an input voltage, let us say 10 V, but parts of the circuit should not run higher than 5 V. That is when we use a voltage clipper (Figure 7.8), a simple circuit that accomplishes this task.

例如，假设正弦输入电压从 +10 变为 −10 V，并且我们希望输出限制为正极和负极 5 V。我将连接两节 4.5 V 的电池（请记住二极管的导通电压为 0.5 V），极性 I 如图7.8所示。当正弦输入电压V _in开始在正周期上升时，两个二极管都反向偏置，没有电流流过它们中的任何一个，因此电阻两端的电压输出V _out等于V _in。当V _{in超过 V 1}的电压（加上二极管的导通电压）时，D1 导通，短路电路，并使输出电压保持恒定在 5 V，即电池电压 V _{1 。同样，在负极周期，只要电压升至 −5 V 以上，D2 就会短路。当输入电压低于 V 1}和 V ₂的电压时，两个二极管都截止。请注意，两个方向的电流限制不必相同。我可以通过选择不同的电池以任何我想要的方式限制电流。

Suppose, for example, that the sinusoidal input voltage goes from +10 to −10 V and we want the output to be limited to 5 V positive and negative. I would connect both batteries of 4.5 V (remember that the diode has a turn‐on voltage of 0.5 V) with the polarity I show in Figure 7.8. When the sinusoidal input voltage, V_in, starts going up in its positive cycle, both diodes are reversed bias, no current goes through either one of them, thus the voltage output, V_out, across the resistor is equal to V_in. When V_in exceeds the voltage at V₁ (plus the turn‐on voltage of the diode), D1 turns on, it shorts the circuit, and keeps the output voltage constant at 5 V, the voltage of battery V₁. Similarly, in the negative cycle, D2 shorts as soon as the voltage increases above −5 V. Both diodes are off when the input voltage is less than the voltages of V₁ and V₂. Notice that the clipping does not have to be the same in both directions. It is up to me to limit the current any way I want to by choosing different batteries.

7.6 半波电压倍增器

7.6 Half‐wave Voltage Doubler

准备好最后一个电路了吗？电压倍增器（图 7.9）。

Ready for one final circuit? The voltage doubler (Figure 7.9).

首先注意，B 点连接到输入电压的下端和二极管 D1 和电容器 C2 的一个端子，以及下输出电压端子。因此，这条下线始终与下输入电压触点处于相同的电位。让我们再次假设输入电压是 10 V 正弦电压。

First notice that point B is connected to the lower terminal of the input voltage and one terminal of diode D1 and capacitor C2, and the lower output voltage terminal. Thus, this lower line is always at the same potential as the lower input voltage contact. Let us assume again that the input voltage is a 10 V sinusoidal voltage.

为了了解发生了什么，让我制作一个输入电压为正和为负时的电路简化模型（图 7.10）。

To understand what happens, let me make a simplified model of the circuit when the input voltage is positive and when it is negative (Figure 7.10).

首先看一下图 7.10中的上图。在负输入电压周期中，线 B 为正，因此二极管 D1 导通。二极管 D2 反向偏置，因此它处于开路状态，没有电流流过电容器 C2。电容器 C1 充电直到点 C 为 +10 V，与点 B 相同。由于二极管 D2 处于开路状态，电容器 C1 无法放电。

Take a look first at the upper drawing in Figure 7.10. In the negative input voltage cycle, line B is positive, therefore diode D1 is conducting. Diode D2 is reversed biased, thus it is open and no current flows through capacitor C2. Capacitor C1 charges until point C is at +10 V, the same as point B. Since diode D2 is open, capacitor C1 cannot discharge.

一旦正弦输入电压从其最小负值开始增加，点 C（固定在 +10 V）就比线 B 更正，因此二极管 D1 关断（图 7.10下图）。现在 D1 开路，D2 导通。点 A 现在为 +10 V，C1 两端的电压也为 +10 V，因此点 C 和 D（现在已连接）均为 +20 V。

As soon as the sinusoidal input voltage starts increasing from its most negative value, point C, stuck at +10 V, is more positive than line B and thus diode D1 turns off (lower diagram in Figure 7.10). Now D1 is open and D2 is conducting. Point A is now +10 V and the voltage across C1 is also +10 V so points C and D, which are now connected, are both at +20 V.

我们利用该电路实现了产生两倍于最大输入正弦电压的整流全电压。我上面解释的是稳态条件。

What we have accomplished with this circuit is to generate a rectified full voltage twice as high as the maximum input sinusoidal voltage. What I explain above is the steady‐state condition.

我还能将输出电压提高到两倍以上吗？是的，图 7.11显示了输出电压是输入电压四倍的电路。无需解释。您可以弄清楚。

Could I increase the output voltage still more than just doubling it? Yes, Figure 7.11 shows a circuit where the output voltage is four times that of the input voltage. No explanation is needed. You can figure it out.

7.7 太阳能电池旁路二极管

7.7 Solar Cells Bypass Diodes

太阳能电池板基本上是一个夹层，由一个充当触点的金属基板和另一侧的透明物质组成，金属条充当另一侧的触点。在夹层内部，我们在 n 型半导体顶部生长 n 型半导体。这形成了一个非常大的 pn 结阵列，其工作原理与我在第7.1 节中解释的相同。电池板的某些部分可能会被树叶、云层或路过的松鼠损坏或部分遮挡。我们可以使用二极管绕过损坏的太阳能电池（见图7.12）。

Solar panels are basically a sandwich consisting of a metallic substrate that acts like one contact and a transparent substance at the other side with metallic strips to act as the contact to the other side. Inside the sandwich we grow an n‐type semiconductor on top of a p‐type semiconductor. This forms a very large array of pn‐junctions that works the same way as I explained in Section 7.1. Parts of the panels can be damaged or partially obscured by leaves or clouds or a passing squirrel. We can use diodes to bypass damaged solar cells (see Figure 7.12).

太阳能电池板串联连接以增加总电压，并联连接以获得更多电力。假设图 7.12中第一行中的第二块电池板有缺陷，并且由于某种原因无法工作，因此其电阻很高。二极管 D12 变为正向偏置，也就是说，D12 左侧的触点比右侧的触点电压高，因此 D12 短路并绕过损坏的电池板。所有其他二极管都处于打开状态，因此上部线路中的电流通过第一块电池板，然后向上通过二极管 D12 并向下通过第三块电池板。下部线路上的所有二极管都处于打开状态，电流通过所有三块电池板。如果整行电池板不工作，线路末端的两个二极管可防止电流回流。这种方案以较低的电压提供电力，而不是完全不提供电力。

Solar panels are connected in series to increase their total voltage and in parallel to get more power. Suppose that the second panel in the first row in Figure 7.12 is defective and for some reason does not work so its resistance is high. Diode D12 becomes forward biased, that is, the contact to the left of D12 has a higher voltage than the contact at the right and therefore D12 shorts and bypasses the damaged panel. All the other diodes are open, thus the current in the upper line goes through the first panel, then up through diode D12 and back down through the third panel. All the diodes on the lower line are open and the current goes through all the three panels. The two diodes at the end of the lines prevent the current from going back if an entire line of panels does not work. This scheme provides power at a reduced voltage rather than no power at all.

7.8 肖特基二极管的应用

7.8 Applications of Schottky Diodes

正如我在上一章中提到的，肖特基二极管的优势在于导通电压非常低，开关速度非常快，为纳秒级，而标准半导体二极管为微秒级。这种从导通状态变为非导通状态的能力通常称为恢复时间。因此，当我们需要更高的速度时，肖特基二极管比普通二极管效率高得多。

As I mentioned in the previous chapter, Schottky diodes have the advantage of a very low turn‐on voltage and very fast switching speeds, nanoseconds instead of microseconds for standard semiconductor diodes. This ability to change from a conducting to a nonconducting state is usually called the recovery time. As a result, Schottky diodes are much more efficient than regular diodes when we need higher speeds.

就应用而言，它们与普通半导体二极管相同。我们将肖特基二极管用于箝位电路和电流保护电路。它们的导通电压较低，这意味着功耗较低。因此，您可以得出，由于速度快，肖特基二极管在所有类型的逻辑电路中都非常有用。我将在第11 章中讨论逻辑电路。

As far as applications are concerned, these are the same as for regular semiconductor diodes. We use Schottky diodes for clamping circuits and for current protection circuits. Their lower turn‐on voltage means that there is less power dissipation. You can gather then that, because of their fast speed, Schottky diodes are very useful in all types of logical circuits. I discuss logic circuits in Chapter 11.

7.9 齐纳二极管的应用

7.9 Applications of Zener Diodes

齐纳二极管相对于普通半导体二极管的主要优势在于，它们可以设计成具有非常特定的受控反向电压，并且可以在反向击穿模式下工作而不会烧毁（只要我们将电流限制在某个值）。您可以购买齐纳电压（即击穿电压）范围很广的齐纳二极管，电压范围从 1 到 300 V，并且可承受的电流从几纳安到几安培。（您可以仔细查看http://mauser.com等供应商提供的各种齐纳二极管。）

The main advantage of Zener diodes over regular semiconductor diodes is that they can be designed to have a very specific, controlled reversed voltage and can operate in reversed breakdown mode without burning up (as long as we keep the current limited to a certain value). You can buy Zener diodes with Zener voltages, that is, the breakdown voltage, in a large range of voltages, from 1 to 300 V, and tolerating currents from a few nanoamps to up to a couple of amperes. (You can peruse the variety of Zener diodes available at a supplier such as http://mauser.com.)

这种保持电压准确和恒定的能力使齐纳二极管成为我上面描述的某些应用的理想选择。例如，考虑一个电压限幅器（图 7.13 ）。该电路的功能与我在图 7.8中显示的限幅电路完全相同，但我不需要添加任何电池。我只需选择一个具有所需额定电压的齐纳二极管，正如我上面所说，选择几乎是无限的。相当简单。此外，我们不想在微芯片内添加电池。

This ability to keep the voltage accurate and constant makes Zener diodes ideal for some of the applications that I have described above. Consider, for example, a voltage clipper (Figure 7.13). This circuit does exactly the same thing as the clipping circuit I showed in Figure 7.8, but I do not need to add any batteries. I just choose a Zener diode with the voltage rating I need and, as I said above, the selection is almost limitless. Quite a simplification. Additionally, we do not want to add batteries inside a microchip.

到现在为止，您不需要过多解释电路的工作原理。假设我想将 10 V 的输入电压限制为正摆幅 5 V 和负摆幅 −2 V。我选择 D1 为额定电压为 5 V 的齐纳二极管，D2 为额定电压为 2 V 的齐纳二极管。当正输入电压周期小于 5 V 时，两个二极管都反向偏置，因此不导通。输出电压等于输入电压，因为电阻上没有电流，因此也没有压降。但是当输入电压达到或超过 5 V 时，二极管 D1 正向偏置，因此短路，将输出电压钳位到 5 V。当输入电压变为负值时也是如此，只是现在当电压达到负 2 V 时 D2 会短路。我显示的电阻限制了电流，使二极管不会烧毁。

By this time, you don't need much explanation on how the circuit works. Suppose I want to limit the input voltage of 10 V to a positive swing to 5 V and a negative swing to −2 V. I choose D1 to be a Zener diode rated at 5 V and D2 to be a Zener diode rated at 2 V. When the positive input voltage cycle is less than 5 V, both diodes are reversed biased and thus not conductive. The output voltage is equal to the input voltage since there is no current, and thus no voltage drop, across the resistor. But when the input voltage reaches or exceeds 5 V, diode D1 is forward biased, and therefore shorted, clamping the output voltage to 5 V. The same is true when the input voltage becomes negative except that now D2 is shorted when the voltage reaches negative 2 V. The resistance I show limits the current so that the diodes do not burn.

7.10 总结与结论

7.10 Summary and Conclusions

在本章中，我们并没有提高对半导体器件理论的了解，但是我们了解了二极管的一些非常重要的用途，从太阳能电池到整流器，以及修改或限制输出电压的不同方法。

In this chapter we have not advanced our knowledge of semiconductor device theory, but we have learned some of the very important uses of diodes, from solar cells to rectifiers, and different ways the output voltage can be modified or limited.

我们已经了解了简单的半导体二极管的多种用途。现在我们来介绍下一个也是最重要的半导体器件——晶体管。

So we have seen quite a variety of uses for the simple semiconductor diode. Time to go on to the next and most important semiconductor device, the transistor.

附录 7.1 RC 电路电流的计算

Appendix 7.1 Calculation of the Current Through an RC Circuit

对于那些有兴趣更仔细地观察电容器如何通过电阻器放电，从而使图 7.3中流过电阻器的电流更加均匀、更像直流，以及电阻器和电容器的值对输出电压“恒定”程度的影响的人来说，我会向你展示一些推理。

For those interested in looking a little more closely at how a capacitor discharges through a resistor and thus makes the current through the resistor in Figure 7.3 more uniform, more like DC, and the effect of the value of the resistor and capacitor on how well the output voltage will be “constant”, I will show you some of the reasoning.

图 7.14与图 7.3相同，但是我用一个断开开关替换了二极管，因此我考虑二极管反向偏置的情况。我们知道，当输入电压为正时，二极管正向偏置，导通，并几乎瞬间将电容器充电至与输入相同的电压。一旦输入电压开始下降，由于存储的电荷，电容器中的电压就会大于正弦输入电压，而正弦输入电压已经开始下降。这就是我在图 7.14中展示的情况。我用一个断开开关替换了二极管，并且我将电容器上的电压标识为vC ( t )，使用小写 v 来强调这不是_恒定电压，而是随时间变化的电压。

Figure 7.14 is the same as Figure 7.3 but I have replaced the diode by an open switch, so I consider the case when the diode is reversed biased. We know that when the input voltage was positive, the diode was forward biased, on, and charged the capacitor almost instantaneously to the same voltage as the input. As soon as the input voltage starts decreasing, the voltage in the capacitor, due to the charges stored, is larger than the sinusoidal input voltage, which has started going down. This is the situation I show in Figure 7.14. I replace the diode by an open switch, and I have identified the voltage at the capacitor as v_C(t), using a lower case v to emphasize the this is not a constant voltage, but a voltage that changes as a function of time.

在我关闭开关的瞬间，即t = 0，电阻和电容两端的电压（必须相同）是输入电压的峰值电压，我称之为V _iMax。因此，我可以这样写：

At the instant I turn the switch off, t = 0, the voltage across the resistor and the capacitor, which must be the same, is the peak voltage of the input voltage, let me call it V_iMax. So, I can write:

(7.1)

因为电容器两端的电压v _c ( t ) 等于电容器两端的电荷（现在是时间的函数）除以电容。为了求解电流i ( t )，因为电流现在也是时间的函数，我将等式的两边除以 d t，得到

since the voltage across the capacitor, v_c(t), is equal to the charge across the capacitor, which is now a function of time, divided by the capacitance. To solve for the current, i(t), as the current is also now a function of time, I divide both sides of the equation by dt, and get

(7.2)

你们中许多人会认识到方程 (7.2)是一个简单的微分方程，可以求解得到

Many of you will recognize Eq. (7.2) as being a simple differential equation, which can be solved to give

(7.3)

让我们看看公式 (7.3)是否合理。在t = 0 时，e 的零次方为 1，因此电流等于最大输入电压除以电阻。在t = ∞ 时，e 的负无穷大为零。因此，正如我们预期的那样，图 7.14中的电流（因此是输出电压）从等于输入电压的电压开始衰减到零。它衰减到零的速度取决于电阻与电容的乘积。乘积越高，电流下降越快。

Let’s see if Eq. (7.3) makes sense. At t = 0, e to the 0 power is 1, therefore the current is the maximum input voltage divided by the resistance. At t = ∞,e to the minus infinity is zero. So, as we expected, the current, and therefore the output voltage in Figure 7.14, starts with a voltage equal to the input voltage and decays to zero. How fast it goes to zero depends on the product of resistance times the capacitance. The higher the product, the faster the current goes down.

假设我们希望电阻两端的电压下降到不超过其最大值的 90%。如果我们查看指数函数 e 的表格，我们会看到

Suppose that we want the voltage across the resistor to decrease to no more than 90% of its maximum value. If we go to the table of exponential function e, we see that

(7.4)

周期为 60 Hz 或t = 0.0167 s。因此，我们希望 RC 的乘积大于 0.167，例如 0.2，因此如果电阻为 1 kΩ，则电容器需要为 0.2 mF，这是一个相当大的电容器，但如果电阻为 1 MΩ，则所需的电容器要小 1000 倍，为 0.2 μF。这些电阻和电容组合确保输出电压将小于输入电压的 90%。

The cycle time is 60 Hz or t = 0.0167 s. So we want the product of RC to be greater than 0.167, say 0.2, so if the resistance is 1 kΩ, the capacitor needs to be 0.2 mF, which is quite a large capacitor, but if the resistance is 1 MΩ, the capacitor needed is 1000 times smaller, 0.2 μF. These combinations of resistances and capacitances assure us that the output voltage will be less than 90% of the input voltage.

8.1 晶体管的概念

8.1 The Concept of the Transistor

晶体管是一种通过一个电流或电压来控制另一部分电流的器件。晶体管的名称“transistor”源于“transforming resistance”，即可以控制电阻值的电阻。

A transistor is a device where one current or voltage controls the flow of current in another part of the device. It get its name, “transistor”, from “transforming resistor,” that is, a resistor that I can control its value.

让我来玩个有趣的游戏，考虑一下图 8.1中的流体回路类比。首先看一下左边的图表。有一个通道，通道的闸门将充满水的左通道与空的右通道隔开。旁通管会接收一些水，但水龙头是关闭的，因此也不会有水流过这根管道。闸门连接到杠杆上，通常由弹簧将其向下推关闭。

Let me have some fun and consider the fluidic circuit analogy in Figure 8.1. First look at the diagram on the left. There is a channel with a gate separating the left channel, which is filled with water, from the right channel, which is empty. A bypass pipe takes some of the water, but the faucet is closed, so no water flows through this pipe either. The gate is attached to a lever, normally closed by a spring pushing it down.

在右图中，我将水龙头稍微（或大大）打开，少量（或大量）的水流过细的上管。我将此称为流量 WB。上管中的这种流量足以将杠杆向下推，打开闸门，让一些水流入主回路。我将此称为流量 WC。从左侧流向右侧的水量取决于将杠杆向下推的水量。这里的概念是，流体回路的一部分中的少量水流可以控制主通道中更大的流量。关闭或打开水龙头，即使只是一点点，也比以受控方式抬起闸门要容易得多。只要小管中有水流动，闸门就会保持打开状态，主通道中的水就会继续流动。我打开水龙头的次数越多，杠杆上的水滴就越多，闸门打开的越多，流向右侧通道的水就越多。上管中极少量的水控制着主通道中的大量水流。这就是晶体管的功能，只不过是用电子代替水。电路中某一部分的少量电子流控制同一设备另一部分的大量电流。还要注意，从左侧流入的水量必须等于流出的水量之和，因此 WE = WB + WC（阅读下一节后，您将明白为什么我使用这个术语来表示水流）。

In the diagram on the right, I open the faucet a little (or a lot) and a small (or large) amount of water runs through the thin upper pipe. I call this flow WB. This flow in the upper pipe is enough to push the lever down, opening the gate and letting some water flow onto the main circuit. I call this flow WC. The amount of water flowing from the left to the right depends on how much water pushes the lever down. The concept here is that a small flow of water in a part of the fluidic circuit can control a much larger flow in the main channel. It is much easier to turn a faucet off or on, even just a little, than to raise the gate in a controlled manner. As long as there is water flowing in the small pipe, the gate remains open and the water in the main channel continues flowing. The more I open the faucet, the more water drops on the lever, the more the gate opens, and the more water flows to the right channel. A very small amount of the water on the upper pipe controls a large flow of water in the main channel. This is what a transistor does, but with electrons instead of water. A small flow of electrons in one part of the circuit controls a large current in another section of the same device. Also notice that the water coming in from the left must be equal to the sum of the water coming out, so WE = WB + WC (after reading the next section you'll understand why I used this terminology for the water flow).

晶体管有两种类型：双极结型晶体管 (BJT) 和场效应晶体管 (FET)。场效应晶体管也有两种类型。一种是结型场效应晶体管 (JFET)，只使用 n 型和 p 型半导体材料。另一种是金属氧化物半导体场效应晶体管 (MOSFET)，它用金属代替一种半导体材料。我在本章中解释了这三种类型。

There are two types of transistors, the bipolar junction transistor (BJT) and the field‐effect transistor (FET). There are also two types of FETs. One, which we will call the junction field‐effect transistor (JFET), uses only n‐ and p‐type semiconductor materials. The other type is the metal‐oxide semiconductor FET (MOSFET), which replaces one type of semiconductor material for a metal. I explain all three types in this chapter.

8.2 双极结型晶体管

8.2 The Bipolar Junction Transistor

这种半导体晶体管由夹在两个 n 型半导体材料之间的非常薄的 p 型半导体组成。我们将这种结构称为 npn 晶体管。正如您所预料的，我们也可以将非常薄的 n 型材料夹在两个 p 型半导体之间，显然，我们称之为 pnp 晶体管。两者的工作原理相同。

This semiconductor transistor consists of a very thin p‐type semiconductor sandwiched between two n‐type semiconductor materials. We call this structure an npn‐transistor. As you would expect, we can also have a very thin n‐type material sandwiched between two p‐type semiconductors, which, obviously, we call it a pnp‐transistor. Both work the same way.

你应该意识到我们有两个 pn 结，背对背，中间有一个非常薄的 p 区。在室温下，没有任何外部偏压，电子来自基极两侧 n 型半导体的电子扩散到 p 区，而 p 区的空穴则移动到两种 n 型材料，从而产生两个过渡区，就像单个 pn 结一样。从 p 型基极失去电子的 n 型区变得更正，而从两侧获得电子的 p 区变得更负。我在图 8.2的底部显示了这个电势。与 pn 结一样，当由于电子和空穴密度差异而产生的扩散电流恰好抵消由于结处产生的静电势而产生的漂移电流时，就会发生平衡条件。我们将中心区域称为基极，将其中一种 n 型材料称为发射极，另一个称为集电极。原则上，集电极和发射极可以互换。您马上就会明白我们为什么使用这个术语。

You should recognize that we have two pn‐junctions, back to back, with a very thin p‐region in the middle. At room temperature and without any external bias, the electrons from the n‐type semiconductors on both sides of the base diffuse into the p‐region and holes from the p‐region move to both n‐type materials, generating two transition regions, exactly as happens with a single pn‐junction. The n‐type regions that have lost electrons to the p‐type base become more positive and the p‐region that has gained electrons from both sides becomes more negative. I show this electrical potential at the bottom of Figure 8.2. As in the pn‐junction, the equilibrium condition occurs when the diffusion currents due to the difference in electron and hole densities exactly cancels the drift currents due to the electrostatic potentials created at the junctions. We call the center region the base, one of the n‐type materials the emitter, and the other the collector. In principle the collector and emitter can be reversed. You will see why we use this terminology in a minute.

现在假设我们正向偏置发射极相对于基极，电压为V _E， E ，因为这是施加在发射极上的电压。同时，我们反向偏置基极相对于集电极，电压为V _C， C （图 8.3）。

Now suppose we forward bias the emitter with respect to the base with a voltage V_E, E because it is the voltage applied to the emitter. At the same time, we reverse bias the base with respect to the collector with a voltage V_C, C for collector (Figure 8.3).

如图8.3左侧所示，发射极和基极之间的电势降低了电压V _E，即正向偏置。因此，大量的电子扩散电流从发射极流向基极。如果没有另一种 n 型材料，即集电极，电流就会通过基极流向电池的正极 V _E，这与正向偏置二极管中发生的情况相同。但现在看看集电极侧发生了什么。pn 结是反向偏置的。电池 V _C提供了一个较大的附加正电压。因此，如果没有发射极，就不会有电子来自基极，因为它是 p 型半导体，也不会有电子流向基极，因为它们被电池 V _C的正极吸引，就像在反向偏置二极管中一样，不会有电流流动。

As I show on the left of Figure 8.3, the electrostatic potential between the emitter and the base decreases by voltage V_E, forward bias. Therefore, a large electron diffusion current flows from the emitter to the base. If the other n‐type material, the collector, was not there, the current would flow through the base to the positive side of the battery V_E, the same as happens in a forward biased diode. But now look what happens at the collector side. The pn‐junction is reversed biased. There is a large added positive voltage provided by battery V_C. So, if there was no emitter, no electrons would come from the base because it is a p‐type semiconductor and no electrons would go to the base because they are attracted to positive side of battery V_C, and as in the reversed biased diode no current would flow.

但是当基极非常薄时，通过扩散从发射极到基极的电子会进入一个区域，在这个区域，它们会遇到一个非常强的正电场，被吸引到右边，也就是集电极。大多数电子来不及从基极逃逸到 V _E的正极，就被基极正对面的大正电位吸引，直接移动到集电极和电池的正极 V _C。是的，少数电子会通过基极流到正极电池 V _E的电压，但是基极越薄，基极-集电极过渡区强正电位扫过的电子就越​​多。

But when the base is very thin, the electrons coming from the emitter to the base by diffusion enter a region where they encounter a very strong positive electric field attracting them to the right, that is, to the collector. Most of the electrons don't have time to escape down the base to the positive side of V_E before they are attracted by the large positive potential just across the base and move directly to the collector and to the positive terminal of the battery, V_C. Yes, a small number of electrons flow through the base to the positive terminal of battery V_E, but the thinner we make the base, the more electrons are swept by the strong positive potential at the base–collector transition region.

在图 8.4中，我用另一个类比来表示这种情况。假设左边有一个装满乒乓球的盒子，中间有一个薄的空盒子。我将左边的盒子称为发射盒，中间的盒子称为基座盒，右边的盒子称为收集盒。球开始下落，扩散到薄盒子里。一些乒乓球会从中间的洞里掉下来。但现在假设我打开一个大风扇，相当于图 8.3中基座右侧的集电极电压。从发射极移动到基座的乒乓球会冲向右侧，不会给很多球时间从基座的开口掉下来。

I show this situation in Figure 8.4 using another analogy. Suppose I have a box full of ping‐pong balls on the left and a thin empty box in the middle. I call the box on the left the emitter box, the one in the middle the base box, and the one on the right the collector box. The balls start falling, diffusing, into the thin box. Some of the ping‐pong balls will fall through the middle hole. But now suppose I turn on a big fan, equivalent to the collector voltage in Figure 8.3, on the right of the base. The ping‐pong balls that moved to the base from the emitter will rush to the right and will not give time to many balls to fall through the opening at the base.

这是一个粗略的类比，但它与晶体管中发生的情况非常相似。当我们偏置晶体管时，正向偏置发射极结，反向偏置集电极集电极与发射极间的相互作用，使电子由于扩散而从发射极冲向基极，但在它们有时间与空穴重新结合或通过基极接触逃逸之前，电子就被基极和集电极之间的高电场扫除。

This is a crude analogy, but it is very similar to what is happening in the transistor. When we bias the transistor, forward biased the emitter junction, and reversed bias the collector junction, the electrons rush from the emitter to the base due to diffusion, but before they have any time to recombine with holes or escape through the base contact, the electrons are swept by the high electrical field between the base and the collector.

正如我在流体学例子中所说的那样，发射极电流必须等于集电极电流与基极电流之和，因此

As I said with the fluidics example, the emitter current must be equal to the sum of the collector current plus the base current, so

(8.1)

现在我们来定义一个常数α，它表示发射极电流流向集电极的百分比。然后

Let's now define a constant, α, that tells me what percentage of the emitter current goes to the collector. Then

(8.2)

其中α总是小于 1。因此，结合方程 (8.1)和(8.2)，基极电流必须为

where α is always less than one. Therefore, combining Eqs. (8.1) and (8.2) the base current must be

(8.3)

例如，如果 95% 的发射极电流流向集电极，则常数α = 0.95，因此基极电流必然只有发射极电流的 5% (1 – 0.95)。这些是晶体管中电流的关键关系。顺便说一句，现在您可以明白为什么我将图 8.3左侧的 n 型半导体称为发射极，将右侧的称为集电极。我在图 8.5中以图形方式显示了这三个电流。

For example, if 95% of the emitter current crosses to the collector, then the constant α = 0.95, and by necessity the base current is only 5% (1 – 0.95) of the emitter current. These are the key relations of the currents in a transistor. By the way, now you can see why I call the n‐type semiconductor on the left of Figure 8.3 the emitter and the one on the right the collector. I show graphically these three currents in Figure 8.5.

现在，如果I _b = (1 – α ) I _e，那么

Now, if I_b = (1 – α)I_e, then

(8.4)

结合公式（8.2）和公式（8.4），集电极电流为

and combining Eqs. (8.2) and (8.4), the collector current is

(8.5)

现在我们定义了一个新的常数β，

where now we have defined a new constant, β,

(8.6)

如果α为 0.95，则意味着

In the case where α is 0.95, this means that

(8.7)

所有这些关系告诉我们一些只要看一下图 8.5就很明显的事情。集电极电流Ic比基极电流大得多，在我们的例子中是 19 倍。（您会看到我在介绍中告诉_您的内容。数学很简单。我们只是让它看起来很复杂以保住我们的工作！您不需要太多数学知识就知道 95 是 5 的 19 倍。）

All these relationships tell us something that is quite obvious just by looking at Figure 8.5. The collector current, I_c, is considerably larger than the base current, in our case it is 19 times larger. (You see what I told you in the introduction. Math is trivial. We just make it look complicated to keep our jobs! You do not need much math to know that 95 is 19 times larger than 5.)

现在，如果我们把基极做得更薄，这样只有 2% 的电子流过基极，那么β就是 49，也就是说，集电极电流是基极电流的 49 倍。我们称β为晶体管增益。

Now if we make the base thinner so that only 2% of the electrons flow through the base, then β would be 49, that is, the collector current is 49 times larger than the current in the base. We call β the transistor gain.

参见图 8.6。如果我向晶体管的基极添加一个小的正弦电流，会发生什么情况？请记住，在我们的例子中，集电极电流比基极电流大 19 倍，因此，如果基极电流正弦变化一个单位，集电极电流也必须变化 19 个单位。例如，如果正弦信号是非常微弱的音乐，那么来自集电极的正弦音乐波将大 19 倍。真是个绝招。

Look at Figure 8.6. What happens if I add a small sinusoidal current to the base of the transistor? Remember the collector current, in our case, is 19 times larger than the base current, so if the base current changes sinusoidally by one unit, the current in the collector has to change by 19 units. If the sinusoidal signal is very faint music, for example, the sinusoidal music wave coming from the collector will be 19 times louder. Quite a trick.

请注意，连接到基极的正弦信号与直流偏置V _E和V _C相比必须很小。我们不想过度改变发射极和基极之间以及基极和集电极之间的偏置，以免发射极结变为反向偏置或集电极结正向偏置或甚至接近正向偏置。那样会完全停止晶体管的动作。如果你把一块小鹅卵石扔进水池里，你会看到水波呈放射状移动，整齐地流到水池边缘，但如果你扔一块大石头，水就会混乱地移动，溅到整个水池里。为了观察水中的涟漪，扰动必须很小，这样水的基本条件，即水处于最低平衡状态的愿望，才不会受到破坏。

Note that the sinusoidal signal connected to the base must be small compared to the direct current biases, V_E and V_C. We do not want to change the biases between emitter and base, and base and collector so much that the emitter junction becomes reversed biased or the collector junction forward biased or even close to it. That would completely stop the transistor action. If you throw a small pebble into a pool, you'll see water waves moving radially, neatly traveling to the edge of the pool, but if you throw a large boulder, the water will move chaotically and splash all over the pool. To observe the ripples in the water, the disturbance has to be small so that the basic conditions of the water, that is, the desire of the water to be in its lowest possible equilibrium state, is not disrupted.

晶体管有一个电子符号（图 8.7）。我用箭头表示发射极，表示正电流是流入晶体管的 pnp 管，还是流出晶体管的 npn 管。发射极。基极是中间的触点，集电极只接受来自发射极的电荷。再次注意，发射极中显示的电流 I 的方向是正电荷的方向。

There is an electronic symbol for the transistor (Figure 8.7). I show the emitter with an arrow indicating if the positive current goes into, pnp, or out of, npn, the transistor's emitter. The base is the contact in the middle and the collector just accepts the charges that are coming from the emitter. Note again that the direction of the current I show in the emitter is the direction of the positive charges.

图 8.8显示了晶体管的特性曲线。特性曲线以图形方式向我们展示了晶体管中电压和电流之间的关系。图 8.8显示了在不同基极电流下集电极电流与发射极和集电极之间施加电压的关系。

Figure 8.8 shows the characteristic curves of a transistor. The characteristic curves graphically show us the relationship between voltages and currents in a transistor. Figure 8.8 shows the collector current as a function of the applied voltage between the emitter and the collector for different base currents.

我想让你注意的第一件事是，即使基极电流为零（图 8.8中最下方的曲线），I _ceo和I _b = 0，随着集电极到发射极电压的增加，集电极电流也会从零线性增加到更高的值。特性曲线显示集电极电流I _ceo从 0 V 时的 0 mA 增加到 6 V 时的约 0.5 mA。我们称之为漏电流I _CE0，它与晶体管效应无关。漏电流的产生是由于集电极到基极结反向偏置，并且基极区域很薄，因此电子可以在电压增加时穿过它。如果没有这个漏电流，I _b从 20 到 100 μA 的所有其他曲线都将是水平的，也就是说，对于给定的基极电流，集电极电流是恒定的，不会随着电压的增加而变化。所有曲线都有斜率的唯一原因是额外的漏电流I _CE0被添加到总集电极电流中。

The first thing I want you to notice is that even with zero base current (the lowest curve in Figure 8.8) I_ceo and I_b = 0, the collector increases linearly from zero to a higher value as the collector to emitter voltage increases. The characteristic curves show the collector current, I_ceo, going from 0 mA at 0 V to about 0.5 mA at 6 V. We call this the leakage current, I_CE0, and it has nothing to do with the transistor effect. The leakage current is due to the fact that the collector to base junction is reversed biased and the base region is thin so that electrons can cross it as the voltage increases. If we did not have this leakage current, all the other curves for I_b from 20 to 100 μA would be horizontal, that is, for a given base current, the collector current is constant and does not change with the increase in voltage. The only reason that all the curves have a slope is because the additional leakage current I_CE0 is added to the total collector current.

如果我继续增加V _CB（见图8.3），在某个时刻，基极和集电极之间的过渡区域的斜率将达到发射极，连接两种 n 型材料，电流将急剧增加。我们称之为击穿状态。

If I keep increasing V_CB (see Figure 8.3), at some point the slope of the transition region between the base and the collector will reach the emitter, connecting both n‐type materials, and the current will increase drastically. We call this the breakdown condition.

最后，一个重要的观点是，电流I _CE0和晶体管增益β都不稳定。它们会随着温度和电压的变化而变化。如果我们想要非常精确的增益，这种变化非常重要。当我在第 9 章中展示如何偏置晶体管时，请记住这一点。

One important and final point is that both the current I_CE0 and the transistor gain, β, are not stable. They change with temperature and voltage. This change is quite important if we want a very accurate gain. Have this in mind when I show how to bias a transistor in Chapter 9.

8.3 结型场效应晶体管

8.3 The Junction Field‐effect Transistor

另一种晶体管器件是 JFET，有时也称为肖特基晶体管。它的工作原理与标准晶体管截然不同，但其操作取决于两个 pn 结。我在图 8.9中展示了 JFET 的简单图形表示。

Another transistor device is the JFET, sometimes called the Schottky transistor. It works quite differently from the standard transistor, but its operation depends on two pn‐junctions. I show a graphical simplistic representation of a JFET in Figure 8.9.

JFET 就像奥利奥饼干，里面的甜奶油馅料（n 型半导体）夹在两块巧克力饼干（两个 p 型半导体）之间。就是这样。为了正确偏置，n 型半导体的左侧接地，右侧具有正电压V _D。两个 p 型半导体连接在一起，现在它们接地，即电压V _G = 0。这种结构会产生两个 pn 结，一个位于通道顶部，一个位于通道底部。不同之处在于，现在电流不会像 BJT 那样通过结。电流仅通过 n 型材料从右到左在结之间流动。这种晶体管称为单极晶体管，因为只有 n 型材料中的电子在移动（或只有 p 型通道中的空穴在移动）。普通晶体管 BJT 被称为双极晶体管，因为沿相反方向移动的电子和空穴都会对电流产生影响。中间的区域称为通道， n 型材料的左端称为源极，n 型材料的右端称为漏极。我们将两个 p 型半导体称为栅极。只要我对它们施加不同的偏置，漏极和源极就可以互换。

The JFET is like an Oreo cookie, where the sweet cream filling, the n‐type semiconductor, is sandwiched between two chocolate biscuits, the two p‐type semiconductors. That's it. To bias it properly, the left side of the n‐type semiconductor is grounded and the right side has a positive voltage, V_D. The two p‐type semiconductors are connected together and right now they are grounded, that is, voltage V_G = 0. This structure results in two pn‐junctions, one at the top and one at the bottom of the channel. The difference is that now the current does not go through the junctions, as in the BJT. The current goes only between the junctions through the n‐type material from right to left. This transistor is called a unipolar transistor because only electrons in the n‐type material are moving (or only holes in a p‐type channel). The regular transistor, BJT, is called a bipolar transistor because both electrons and holes, moving in opposite directions, contribute to the currents. The region in the middle is called the channel, the left end of the n‐type material is called the source, and the right end of the n‐type material is called the drain. We call the two p‐type semiconductors the gates. The drain and source could be reversed as long as I bias them differently.

让我们看看它是如何工作的。在图 8.9中，栅极接地，因此栅极与源极具有相同的电压。现在假设我在基极施加负电压，如图8.10所示。

Let's see how it works. In Figure 8.9, the gates are grounded so the gates have the same voltage as the source. Suppose now that I apply a negative voltage at the bases, as I show in Figure 8.10.

现在我有两个反向偏置的 pn 结，它们排斥电子，从而产生两个过渡区，一个在顶部，一个在底部。在过渡区，也称为耗尽区（第 5.1 节），没有自由电荷。通道现在更薄了，导致电阻比栅极接地时更高（图 5.9），如果我不改变漏极电压V _D，电流就会减小。所以，我有一个可以通过在栅极上施加电压来改变其电阻的设备。

Now I have two reversed biased pn‐junctions that repel electrons, thus creating two transition regions, one at the top and one at the bottom. At the transition region, also called the depletion region (Section 5.1), there are no free charges. The channel is now thinner, resulting in a higher resistance than it had when the gates were grounded (Figure 5.9), and if I do not change the drain voltage, V_D, the current decreases. So, I have a device where I can change its resistance by applying a voltage at the gates.

正如您所预料的，通道中间的耗尽区比我在图 8.10中显示的要复杂得多。问题在于通道内的电压并不均匀。如果我将栅极电压设置为零，则在一端（左侧的源极），源极和栅极之间的电压为零，而在另一端（右侧的漏极），栅极和漏极之间的电压为V _D。因此，在两端之间，通道和栅极之间的电压必须以某种连续且均匀的方式从 0 变为V _D。我们预计通道中间的电压约为V _D /2。这会如何影响耗尽区？

As you might expect, the depletion region in the middle of the channel is more complex than what I show in Figure 8.10. The problem is that the voltage inside the channel is not uniform. If I set the gate voltage to zero, at one end, the source at the left, the voltage between the source and the gates is zero, and at the other end, the drain at the right, the voltage between gates and drain is V_D. So in between the two ends the voltage across the channel and the gates has to change from 0 to V_D in some continuous and uniform way. We would expect the voltage in the middle of the channel to be about V_D/2. How does this affect the depletion region?

首先假设栅极处的电压为零（图 8.11中的上图），即两个栅极和漏极接地，并且我们在漏极处施加正电压，假设V _{D = 5 V。我在}图 8.11的顶部显示了这种情况。

Assume first that the voltage at the gate is zero (upper drawing in Figure 8.11), that is, the two gates and the drain are grounded, and we apply a positive voltage at the drain, let us say V_D = 5 V. I show this case at the top of Figure 8.11.

首先看一下上图。在通道的左端，即源极，p 栅极和 n 型通道之间没有电压差。它们都接地，并且它们之间的电压为零。因此，器件左侧的耗尽区非常小。当我们移到右侧，即漏极侧时，漏极和栅极之间有一个 5 V 的反向偏置电压（V _G = 0 V 和V _D = 5 V）。耗尽区增加，通道变窄。在通道中间，通道和栅极之间的电压约为 2.5 V，耗尽区比漏极侧薄，但比源极侧厚。因此，您可以直观地看到过渡区从源极的小值平稳过渡到右侧的较大值。

Take a look first at the upper figure. At the left end of the channel, the source, there is no voltage difference between the p‐gate and the n‐type channel. They are both grounded and the voltage between them is zero. Therefore, the depletion region on the left of the device, is very small. As we go to the right, the drain side, there is a 5 V reversed bias voltage between the drain and the gates (V_G = 0 V and V_D = 5 V). The depletion region increases and the channel gets narrower. In the middle of the channel where the voltage is approximately 2.5 V between the channel and the gates, the depletion region is thinner than at the drain side but thicker than at the source side. Therefore, you can intuitively see that the transition region goes smoothly from a small value at the source to a larger value on the right.

但现在这里有个巧妙的地方：如果我将基极电压增加 −2V（图 8.11中的下图），则整个栅极的耗尽区将均匀增加，电子的路径将进一步变窄。如果我给栅极添加一个正弦输入电压，该电压将调节沟道的有效厚度、沟道电阻，从而调节流过 JFET 的电流。栅极电压 V _{G 的}变化控制并改变电子流经路径的尺寸，或者更确切地说，沟道电阻发生变化，对于给定的漏极电压 V _D，电流也会变化。栅极电压控制流过沟道的电流。这就是晶体管的作用。

But now here is the clever bit: if I increase the voltage at the base by −2 V (lower drawing in Figure 8.11), the depletion region increases throughout the gate by a uniform amount, and the path for the electrons narrows still more. If I add a sinusoidal input voltage to the gates, that voltage modulates the active thickness of the channel, the resistance of the channel, and therefore also the current through the JFET. Voltage changes at the gate V_G control and change the dimensions of the path through where the electrons flow, or better, the resistance of the channel changes and the current, for a given drain voltage V_D, also changes. The gate voltage is controlling the current through channel. That is what transistor action does.

BJT和JFET的根本区别如下：

The fundamental differences between the BJT and the JFET are as follows:

• 在 BJT 中，基极电流控制集电极电流。在 JFET 中，栅极电压（而非电流）控制通过通道的电流。
• In the BJT, the current in the base controls the current in the collector. In the JFET the voltage (not the current) at the gates controls the current through the channel.
• 在 BJT 中，电流流经两个过渡区。在 JFET 中，电流流经两个过渡区之间。
• In the BJT, the current goes through the two transition regions. In the JFET, the current goes between the two transition regions.
• 在 BJT 中，电流由电子和空穴组成，这就是它被称为双极的原因。JFET 是单极的，因为只有一种电荷（电子或空穴）会通过通道。
• In the BJT, the current is composed of electrons and holes, which is why it is called bipolar. The JFET is unipolar because only one type of charge, electrons or holes, moves through the channel.
• 在 BJT 中，电流通过基极。在 JFET 中，没有电流通过栅极（只有漏电流）。
• In the BJT there is current though the base. In the JFET there is no current through the gates (just the leakage current).

我刚刚描述了 JFET 操作的线性区域，之所以说是线性，是因为随着栅极电压的增加，沟道的电阻也会增加，从而电流会减小。现在，如果我保持栅极电压不变并增加漏极电压，会发生什么情况？在某个时刻，漏极侧的耗尽区会试图相互接触。我们称之为夹断电压。请注意，我用的是“试图接触”而不是“相互接触”。我将这个漏极电压称为饱和电压V _Dsat。看起来，在夹断时不应该有电流流动；沟道是封闭的。但别急着说。如果夹断会完全关闭电流，那么沟道上就不会有电压，反向偏置电压会消失，过渡区会崩溃，因此沟道会打开。您可以看到，在夹断电压下，必须有一条非常窄的路径，这样过渡区才不会崩溃。但现在，无论我将漏极电压增加多少，源极和夹断区之间的电压都不会改变，因此流过 JFET 的电流保持恒定。图 8.12显示了这些特性。

I have just described what is called the linear region of the JFET operation, linear because as I increase the gate voltage, I increase the resistance of the channel and thus decrease the current. Now what happens if I keep a constant gate voltage and increase the drain voltage? At some point the depletions at the drain side will try to touch each other. We call this the pinch‐off voltage. Notice that I use “try to touch” not “touch each other.” Let me call this drain voltage the saturation voltage, V_Dsat. It looks like at pinch‐off no current should flow; the channel is closed. Not so fast. If the pinch‐off would shut the current completely, there would be no voltage along the channel, the reversed bias voltage would disappear, the transition region would collapse, and thus the channel will open up. You can see that at pinch‐off voltage there has to be a very narrow path so that the transition region does not collapse. But now, no matter how much farther I increase the drain voltage, the voltage between the source and the pinch‐off region cannot change, thus the current through the JFET remains constant. Figure 8.12 shows these characteristics.

对于给定的栅极电压，随着漏极电压的增加（相对于源极，我假设源极接地，为零），电流也会增加。这是线性或欧姆区域（图 8.12中的左侧区域），也就是说，随着电压的增加，电流也几乎线性增加，遵循欧姆定律。当我们达到夹断电压时，电流随着漏极电压的增加而保持恒定（中间部分），但在某个点，电压足够高，结会击穿（图 8.12中的右侧区域）。

For a given gate voltage, as we increase the drain voltage (with respect to the source, which I have assumed it is grounded, zero) the current increases. This is the linear or ohmic region (the left‐hand region in Figure 8.12), that is, as the voltage increases, the current also increases almost linearly, following Ohm’s law. When we reach the pinch‐off voltage the current is constant as the drain voltage increases (the middle section) but at some point the voltage is high enough that the junction breaks down (the right‐hand region in Figure 8.12).

让我展示另一张简化的图，它可以帮助您直观地看到当漏极电压增加时夹断时发生的情况，如图 8.13 所示。

Let me show another simplified drawing that may help you visualize what is happening with the pinch‐off as the drain voltage increases, Figure 8.13.

举个例子，我在联系人上标注了数字，希望这样更清楚。我请你在图 8.12和8.13之间来回查看。在所有图表中，从 A 到 D，在图 8.13，V _S = 0 V 和V _{G = −3 V。（我在}图 8.12中突出显示了与V _G = –3 V对应的曲线）。我唯一改变的电压是漏极电压V _D。

As an example, I am putting numbers on the contacts to make it, hopefully, clearer. I ask you to go back and forth between Figures 8.12 and 8.13. In all the diagrams, A to D, in Figure 8.13, V_S = 0 V and V_G = −3 V. (I have highlighted in Figure 8.12 the curve corresponding to V_G = –3 V). The only voltage I change is the drain voltage, V_D.

当漏极电压为 0.5 V（图 8.13 A）时，刚好足以在漏极处产生夹断。当我将漏极电压增加到 5 V（图 8.13 B）时，夹断向图的左侧增长，直到通道处的电压低于 0.5 V。电流与图 8.13 A中完全相同（请记住，我们无法关闭通道）。当我们将漏极电压进一步增加到 10 V（图 8.13 C）和 14 V（图 8.13 D）时，通道中的夹断区域继续向左移动，使电流保持恒定。如果我们进一步将漏极电压推高到 16 V 以上，整个系统就会崩溃，并且会出现击穿情况。我在 JFET 特性曲线中显示了这四种情况，A 到 D，在 V _D = 0.5、5、10 和 14 V处有点。

When the drain voltage is 0.5 V (Figure 8.13A), it is just sufficient to generate a pinch‐off at the drain. As I increase the drain voltage to 5 V (Figure 8.13B), the pinch‐off grows toward the left of the figure until the voltage at the channel is less than 0.5 V. The current is exactly the same as it was in Figure 8.13A (remember we cannot shut off the channel). As we increase the drain voltage still more to 10 V (Figure 8.13C) and 14 V (Figure 8.13D), the pinch off region in the channel keeps on moving to the left, keeping the current constant. If we push the drain voltage further, above 16 V, the whole thing collapses and we have a breakdown condition. I show these four cases, A to D, in the JFET characteristic curves, with dots at V_D = 0.5, 5, 10 and 14 V.

只要我们在饱和区工作，电流就由栅极电压控制。如果我在栅极添加一个正弦信号，电流就会遵循与正弦电压相同的形状。我将在下一章中描述正弦操作。

As long as we work in the saturation region, the current is controlled by the voltage at the gate. If I add a sinusoidal signal at the gate, the current follows the same shape as the sinusoidal voltage. I describe the sinusoidal operation in the next chapter.

8.4 金属氧化物半导体场效应晶体管

8.4 The Metal Oxide Semiconductor FET

另一种晶体管，也是集成电路 (IC) 中最常用的晶体管，是 MOSFET。图 8.14中显示了 MOSFET 的结构和基本偏置。

Another type of transistor, and the most commonly used transistors in integrated circuits (ICs), are MOSFETs. I show the structure and the basic bias of a MOSFET in Figure 8.14.

首先让我们看一下物理结构。尽管有各种方框和颜色，但结构与 JFET 非常相似，只是我用金属（黑色）代替了上部的 p 型半导体，并用氧化物（红色）与 p 型半导体（浅蓝色）隔开，因此得名金属氧化物半导体场效应晶体管或 MOSFET简短。我还在两端添加了两个高度掺杂的 n 型区域 n+（深黄色），以便与外部电路接触。与 JFET 一样，MOSFET 是一种单极器件，因为移动电荷只有电子（或者只有 n 型衬底中的空穴）。我在这里解释的是 n 型 MOSFET，但同样的解释也适用于 p 型 MOSFET，只是标签从 p 变为 n，反之亦然，并且所有偏置都反转。现在请注意，栅极与半导体通道电隔离。绝缘材料通常是二氧化硅 SiO ₂。它是一种电压驱动设备，也就是说，从金属栅极通过氧化物到通道根本没有电流。

First let's take a look at the physical construction. In spite of all the boxes and colors, the structure is very similar to the JFET, except that I replaced the upper p‐type semiconductor by a metal (in black) separated from the p‐type semiconductor (in light blue) by an oxide (in red) thus the name metal‐oxide semiconductor field‐effect transistor or MOSFET for short. I have also added two highly doped n‐type regions, n+ (in dark yellow), at the two ends to make contact to the outside circuit. The MOSFET is, like the JFET, a unipolar device since the moving charges are only electrons (or only holes in an n‐type substrate). I explain here the n‐type MOSFET, but the same explanation applies to a p‐type MOSFET with the labels changing from p to n and vice versa and reversing all the biases. Notice now that the gate is electrically isolated from the semiconducting channel. The insulating material is usually silicon dioxide, SiO₂. It is a voltage‐driven device, that is, there is no current at all from the metallic gate through the oxide to the channel.

在 JFET 中，栅极是 p 型半导体，因此要工作，栅极必须反向偏置，并且反向偏置结中始终存在残余电流，即漏电流。在 MOSFET 中，栅极是一种金属，通过绝缘体与半导体隔开。因此，金属上的电压可以是正的也可以是负的，并且绝对没有电流流过绝缘氧化物。

In the JFET, the gates are a p‐type semiconductor and thus to work they have to be reversed biased and there is always a residual current in a reversed biased junction, the leakage current. In the MOSFET, the gate is a metal separated from the semiconductor by an insulator. Thus, the voltage at the metal can be either positive or negative and absolutely no current flows through the insulating oxide.

MOSFET 比 BJT 和 JFET 有许多优势。它更容易制造，体积可以非常小，并且输入电阻非常高，也就是说，当栅极电压为零或接地时，如图8.14所示，源极和漏极之间的电阻非常高。我还要强调的是，我们想要做的是通过改变栅极电压来控制源极和漏极之间的电流。在图 8.14中，我有一个电池V _DS，表示我感兴趣的是获得源极和漏极之间的电流。

The MOSFET has many advantages over BJTs and JFETs. It is much easier to fabricate, it can be very small, and it has very high input resistance, that is, when the gate voltage is zero or grounded, as I show in Figure 8.14, there is a very high resistance between the source and the drain. Let me also emphasize that what we want to do is to control the current between the source and the drain by changing the voltage at the gate. In Figure 8.14 I have a battery V_DS indicating that I am interested in getting current between the source and the drain.

现在考虑一下当我在栅极处相对于源极施加正电压时会发生什么（图 8.15）。

Now consider what happens when I apply a positive voltage at the gate with respect to the source (Figure 8.15).

当我在栅极和源极之间施加正电压时，金属栅极上的正电荷开始吸引负电荷，不仅来自 p 型材料中少数可用电子，还来自两端（漏极和源极）高度 n+ 掺杂的半导体。随着栅极电压的增加，越来越多的电子被吸引到表面，使通道越来越导电。通道的电阻减小，对于给定的源漏电压V _SD，源漏之间的电流增加。

When I apply a positive voltage between the gate and the source, the positive charges at the metallic gate start attracting negative charges not only from the few available electrons in the p‐type material but also from the highly n+‐doped semiconductors at the two ends, the drain and the source. As the gate voltage increases, there are more and more electrons attracted to the surface, making the channel more and more conductive. The resistance of the channel decreases and the current between source and drain for a given source to drain voltage, V_SD, increases.

让我更详细地讲一下，类似于我在上一节中对 JFET 所做的。请注意，左侧源极和栅极之间的电压等于电压V _GS。但在右侧，栅极和漏极之间的电压等于栅极电压V _GS减去漏极电压V _SD。因此，正如我们在 JFET 中看到的那样，我们创建的导电通道并不均匀。

Let me go into a little more detail, similar to what I did for the JFET in the previous section. Notice that the voltage between the source and the gate at the left is equal to whatever the voltage V_GS is. But at the right, the voltage between the gate and the drain is the gate voltage, V_GS, minus the drain voltage, V_SD. Therefore, as we saw in the JFET, the conductive channel we create is not uniform.

让我看看我是否可以展示当漏极电压V _SD增加而栅极电压保持不变时电子通道的样子。我将使用一些数字来帮助您理解这个过程。假设栅极电压V _GS为 2V。当V _SD从零增加到 2V（即低于栅极电压）时，电流会线性增加，因为图 8.15所示的通道就像一个电阻器，其值根据电压V _GS而变化。当漏极至源极电压V _SD等于栅极电压V _SG（即 2V）时，漏极附近的区域会被“夹断”，也就是说，漏极端氧化物下方有足够的电荷来允许电流继续流动。为什么？因为我们在 JFET（图 8.11）中看到了相同的平衡条件。从漏极到源极的长三角形（图 8.15中的浅绿色）显示存在自由电子的区域，漏极侧几乎没有自由电子，而源极侧则相当多。如果我将漏极电压V _SD增加到 3V，则夹断会更快发生，如中间的三角形所示（深绿色）。进一步增加漏极电压会将夹断电压向左移动（最深的绿色）。夹断效应非常重要，因为它表明电流会增加，直到漏极电压等于栅极电压，但随后会保持不变，直到漏极电压大到足以产生击穿。在图 8.17的左侧，我展示了这种效应的理想化电压/电流图。

Let me see if I can show what the electron channel looks like as the drain voltage, V_SD, increases and the gate voltage remains the same. I'll use some numbers to help understand the process. Let us say that the gate voltage, V_GS, is 2 V. As the V_SD increases from zero to 2 V, that is, less than the gate voltage, the current increases linearly because the channel shown in Figure 8.15 acts like a resistor, its value changing depending on the voltage V_GS. When the drain to sourced voltage, V_SD, equals the gate voltage, V_SG, i.e. 2 V, the region near the drain is “pinched‐off,” that is, there are just enough charges under the oxide at the drain end to permit the current to continue. Why? Because there is the same equilibrium condition that we saw in the JFET (Figure 8.11). The long triangle from drain to source (light green in Figure 8.15) shows the area where there are free electrons, practically none at the drain side and quite a few at the source side. If I increase the drain voltage V_SD to 3 V, the pinch‐off occurs sooner as shown as a triangle in the middle (darker green). Further increases of the drain voltage move the pinch‐off voltage to the left (darkest green). The pinch‐off effect is very important because it says that the current increases until the drain voltage is equal to the gate voltage but then remains constant until the drain voltage is large enough to create a breakdown. On the left of Figure 8.17 I show an idealized voltage/current plot of this effect.

随着栅极至源极电压的增加，越来越多的电子被吸引到通道，通道的电阻减小，从而在源极和漏极之间的电阻（准线性）区域。当栅极和漏极电压相等时，通道被夹断，当漏极电压进一步增加时，电流保持恒定（饱和区）。随着漏极电压进一步增加，在某个时刻，衬底和两个 n 型触点之间的结将击穿，电流急剧增加，可能会烧毁 MOSFET。我在图 8.17右侧显示了实际 MOSFET 的电压/电流特性。

As the gate to source voltage increases, more and more electrons are attracted to the channel and the resistance of the channel decreases, generating more current between the source and the drain, the resistive (quasi linear) region. When the gate and the drain voltages are equal, the channel is pinched‐off and, as the drain voltage increases still further, the current remains constant (the saturation region). As the drain voltage increases further and further, at some point the junctions between the substrate and the two n‐type contacts will break down and the current increases drastically, probably burning the MOSFET. I show the voltage/current characteristics of an actual MOSFET on the right of Figure 8.17.

就制造而言，漏极和源极可以互换。该器件是对称的。图 8.14至8.16所示的 MOSFET称为增强模式 Mosfet，增强，因为随着栅极电压的增加，电流也会增加。栅极电压为零时，没有电流。我们说 MOSFET 常闭。

As far as the fabrication is concerned, drain and source are interchangeable. The device is symmetrical. The MOSFET shown in Figures 8.14 to 8.16 is called an enhancement mode Mosfet, enhancement because as the gate voltage increases, the current increases. With the gate voltage zero, there is no current. We say that the MOSFET is normally off.

从上一句话中，您可以假设还有另一种操作 MOSFET 的方法。这就是耗尽模式，这种 MOSFET 在栅极电压为零时导通，即栅极电压为零时导通，而电流随着栅极电压的增加而减小。我在图 8.18中显示了耗尽模式 MOSFET 。

From the previous sentence you can assume that there is another way of operating the MOSFET. This is the depletion mode, and this MOSFET conducts when the gate voltage is zero, i.e. it is ON when the gate voltage is zero and the current decreases as the gate voltage increases. I show the depletion mode MOSFET in Figure 8.18.

你能看出我做的改动吗？首先，我在衬底之间添加了一个薄的 n 型通道，从 p 型变为 n 型。其次，我反转了电池V _GS。现在，如果栅极电压为零，则电流从源极流到漏极，因为电子可以通过友好的 n 型通道从一个 n+ 触点流到另一个 n+ 触点，也就是说，电子具有连续性，电流才能从源极流到漏极。电流受通道电阻的限制。现在假设，如图8.18所示，我在金属栅极上施加负电压。金属板中的负电荷排斥表面附近的自由电子并吸引空穴（正电荷）。通过减少通道中的电子数量，它变得更具电阻性，对于固定的漏极电压，电流会减小。随着我们增加栅极电压，源极和漏极之间的电流会进一步减少。与耗尽型 MOSFET 完全相反。由于栅极与通道之间通过氧化层隔离，因此增强型 MOSFET 可在正栅极电压和负栅极电压下工作。

Can you see the changes I made? First, I added a thin n‐type channel between the substrate from a p‐type to an n‐type. Second, I reversed the battery V_GS. Now, if the gate voltage is zero, there is current from source to drain because the electrons can flow from one n+ contact to the other through the friendly n‐type channel, that is, there is continuity of electrons for the current to flow from source to drain. The current is limited by the resistance of the channel. Now suppose, as I show in Figure 8.18, that I apply a negative voltage at the metal gate. The negative charges in the metal plate repel free electrons near the surface and attract holes (positive charges). By reducing the number of electrons in the channel, it becomes more resistive and the current, for a fixed drain voltage, decreases. As we increase the gate voltage the current between source and drain decreases more. Exactly the reverse of the depletion MOSFET. Since the gate is insulated from the channel by an oxide layer, the enhanced MOSFET works with both positive and negative gate voltages.

8.5 总结与结论

8.5 Summary and Conclusions

由于晶体管在所有现代电子器件中都非常重要，我将重述并强调其主要特性。在图 8.19中，我展示了我讨论过的所有晶体管的图表。

Because the transistor is so fundamental in all modern electronics, I will recapitulate and emphasize the main characteristics. In Figure 8.19 I show a graph of all the transistors I have discussed.

晶体管是一种栅极控制器件不同部分电流的器件。有两种基本器件。第一种是经典且较旧的双极结型晶体管 (BJT)，其中一种半导体（基极）夹在两种不同类型的半导体区域（npn 或 pnp）之间。BJT 是电流控制器件，即基极电流控制发射极和集电极之间的电流（见图8.5）。它也是双极器件，因为电流由穿过两个 pn 结的电子和空穴组成。另一种类型的晶体管是 FET。在这些晶体管中，源极和漏极之间的器件电流由栅极处的电压（而不是电流）控制。

The transistor is any device where one gate controls the current in a different part of the device. There are two basic devices. First, the classic and older bipolar junction transistor (BJT), where one type of semiconductor, the base, is sandwiched between two semiconductor regions of a different type (npn or pnp). The BJT is a current controlled device, that is, the base current controls the current between emitter and collector (see Figure 8.5). It is also a bipolar device because the current is composed of both electrons and holes that cross the two pn‐junctions. The other type of transistor is the FET. In these transistors the current in the device between the source and the drain is controlled by the voltage (not the current) at the gate(s).

场效应晶体管 (FET) 可分为结型场效应晶体管 (JFET) 和金属氧化物半导体场效应晶体管 (MOSFET)。场效应晶体管 (MOSFET) 可在增强模式或耗尽模式下工作。所有场效应晶体管的工作方式基本相同，栅极电压改变自由电荷移动的横截面积，从而增加或减少电阻，进而增加或减少流过器件的电流，使其充当压控电阻器。通过创建一个夹断区来获得恒定电流，该夹断区在源漏电压增加时保持电流恒定。所有场效应晶体管 (FET) 都是单极的，也就是说，主电流（源漏）仅由电子或空穴组成。

FETs can be divided into junction FETs (JFETs) and metal‐oxide semiconductor FETs (MOSFETs). MOSFETs can operate in either enhancement mode or depletion mode. All work in basically the same way, with the gate voltage changing the cross‐sectional area where the free charges move, therefore increasing or decreasing the resistance and thus the current through the device so it acts like a voltage‐controlled resistor. The constant current is obtained by creating a pinch‐off region that keeps the current constant as the source to drain voltage increases. All of the FETs are unipolar, that is, the main current, source to drain, is composed only of electrons or only of holes.

MOSFET 的主要优点是栅极与电路的其余部分绝缘，因此输入电阻几乎为无穷大。与 JFET 相比，MOSFET 的另一个优点是，在 JFET 中，我们必须确保两个结栅极反向偏置。在 MOSFET 中，我们不必担心这一点，栅极电压可以是正的也可以是负的，因为金属与半导体之间被绝缘的二氧化物 SiO ₂隔开。因此，它可以在增强和耗尽模式下工作。

The main advantage of MOSFETs is that the gate is insulated from the rest of the circuit, thus presenting an almost infinite input resistance. Another advantage over JFETs is that in JFETs we have to be sure that the two junction gates are reversed biased. In MOSFETs we do not have to worry about that, and the gate voltage can be either positive or negative since the metal is separated from the semiconductor by an insulating dioxide, SiO₂. Therefore, it can work in both the enhancement and depletion modes.

MOSFET 的优点是功耗更低、尺寸更小，因此在给定面积内器件密度更高，并且可以同时构建模拟和数字电路。还可以在同一基板上制造开和关器件。我将在接下来的章节中讨论这一点。

The advantages of MOSFETs are lower power dissipation, smaller size, thus higher density of devices in a given area, and the possibility of building analog and digital circuits side by side. It is also possible to fabricate on and off devices in the same substrate. I will discuss this in coming chapters.

在讨论微处理器和存储器时，我们还会讨论 CMOS（互补 MOS）（见第 11 章）。这些并不是“新”设备，但它们使用 p 型和 n 型设备作为一个单元，相互补充。它们非常有用，因为它们消耗的电量更少。

We will also talk about CMOS, Complementary MOS, when we discuss microprocessors and memories (see Chapter 11). These are not “new” devices, but they use both a p‐type and an n‐type device as a unit, complementing each other. They are very useful because they use less power.

我们已经讨论了主要的半导体器件：二极管和晶体管。在接下来的章节中，我将讨论如何制造它们（第 10 章），如何使用它们进行数学运算（第 11 章）以及如何创建用于光电子学（第 13 章）和计算机（第 14 章）的更先进的电子元件（第 12 章）。但现在，在下一章（第 9 章）中，我将开始讨论如何在实际有用的电路中偏置和使用这些晶体管。

We have discussed the main semiconductor devices, the diode and the transistor. In the next chapters I discuss how we fabricate them (Chapter 10), and how we use them to perform mathematical operations (Chapter 11) and create more advance electronic components (Chapter 12) used in optoelectronics (Chapter 13) and computers (Chapter 14). But now, in the next chapter (Chapter 9), I start discussing how we bias and use these transistors in actual useful circuits.

附录 8.1 冲孔槽

Appendix 8.1 Punch Trough

图 8.20是一个非常简单的草图，解释了我们如何获得穿通效应，从而产生非常高的电流水平，即突破区域。

A very simple sketch, Figure 8.20, explains how we get punch‐through that results in very high current levels, the breakout regions.

左侧是具有共享费米能级的 npn 晶体管的能带图。随着我们增加集电极到基极二极管的反向偏置（右侧），正向电压进一步侵入过渡区，在某个点（右侧最低的曲线）上，过渡区几乎消失，两个 n 型区域短路，电压较大。电流急剧增加，不再受基极控制。场效应晶体管 (FET) 也发生类似的过程。

On the left we have the band diagram of a npn‐transistor with the shared Fermi level. As we increase the reversed bias of the collector to base diode (on the right), the forward voltage encroaches more into the transition region and at some point, the lowest curve on the right, the transition region all but disappears, shorting two n‐type regions with a large voltage. The current increases drastically, no longer controlled by the base. A similar process occurs with FETs.

9.1 简介

9.1 Introduction

在讨论不同的晶体管偏置方法之前，我想提醒您一件事，那就是晶体管的参数不是恒定的。晶体管的特性会随着温度和电流的变化而发生剧烈变化（记住我在第3 章中所说的内容）。当我在图 8.8中讨论漏电流I _CEO时，我们看到了这一点。虽然集电极电流I _{C应该是基极电流}I _B的函数，但漏电流会随着集电极到发射极电压V _CE的函数而增加。当我们打开设备时，它们会变热，您可能会注意到，当您将笔记本电脑放在膝盖上一段时间时，就会出现这种情况。温度的变化会改变晶体管的增益，并且会改变所有其他组件（例如电阻器）的值，但影响要小得多。我们使用不同的偏置方法来稳定电路的性能，以克服这些变化。即使是来自同一供应商和相同 ID 号的晶体管，其 beta 值也有很大差异。

One thing I want to remind you of before I discuss the different transistor biasing methods is that the transistor parameters are not constant. The characteristics of transistors change drastically with temperature and current (remember what I said in Chapter 3). We saw this when I talked about the leakage current, I_CEO, in Figure 8.8. Although the collector current, I_C, is supposed to be constant as a function of the base current, I_B, the leakage current increases as a function of the collector to emitter voltage, V_CE. As we turn on the devices, they warm up, as you may notice when you have a laptop on your lap for a while. The change in temperature changes the gain of the transistor and also, in much less of an effect, the value of all the other components, such as resistors. We use different biasing methods to stabilize the performance of the circuits to overcome these changes. Even transistors from the same supplier and the same ID number have substantial different beta values.

有多种方法可以偏置晶体管：

There are several ways you can bias a transistor:

1. 固定基极偏置。这涉及一个非常简单的电路，但稳定性较差。我们在开关电路中使用这种固定基极方法，因为它们简单，元件较少，并且晶体管仅用于从开跳到关，因此线性度和稳定性不是什么大问题。
2. Fixed base bias. This involves a very simple circuit, but it has poor stability. We use this fixed base method in switching circuits because they are simple, have fewer components, and the transistors are only used to jump from on to off, so linearity and stability are not much of a concern.
3. 集电极反馈偏置。此方法也使用较少的元件，并且比固定基极偏置具有更好的稳定性。
4. Collector feedback bias. This method also uses few components and it has better stability than fixed base bias.
5. 射极反馈偏置。这比其他两种方法具有更好的稳定性，并且更常用于模拟电路，例如声音放大器、运算放大器（OpAmps）以及精密高精度测量仪器。它具有最大的稳定性。
6. Emitter feedback bias. This has much better stability than the other two methods and is more commonly used in analog circuits such as sound amplifiers, operational amplifiers (OpAmps), and delicate and highly accurate measuring instruments. It has the greatest stability.

让我们从最复杂的方法 3 开始，然后再回到另外两种方法。

Let us start with method 3, the most complex one, and then go back to the other two.

9.2 发射极反馈偏置

9.2 Emitter Feedback Bias

图 9.1显示了仅在直流条件下的发射极反馈偏置电路。在下一节中，我将介绍相同发射极反馈偏置电路的交流正弦电流性能。

Figure 9.1 shows an emitter feedback bias circuit under DC conditions only. In the next section I cover the AC, sinusoidal current, performance of the same emitter feedback bias circuit.

在我开始计算一些值并更详细地解释其工作原理之前，我将定性地解释为什么当我们需要良好或高稳定性时，这是偏置晶体管的首选方法。让我们看看图 9.2中的流程图是否有帮助。我将要求您在图 9.1和9.2之间来回切换，使用图 9.2右侧的数字来识别解释。

Before I start calculating some values and explaining in greater detail how it works, I will qualitatively explain why this is the preferred method to bias a transistor when we need good or high stabilization. Let's see if the flow diagram in Figure 9.2 helps. I will ask you to go back and forth between Figures 9.1 and 9.2 using the numbers on the right of Figure 9.2 to identify the explanations.

让我们按照图 9.2中的步骤开始。

Let's start following the steps in Figure 9.2.

1. 考虑一下当我打开设备时温度上升的情况。
2. Consider the case in which as I turn the device ON the temperature goes up.
3. 电阻 R ₁和 R ₂变化不大。此外，它们都以相同的方向变化，也就是说，它们的电阻会同时增加或减少，因此中间的电压，即基极电压V _B（图 9.1 ）与集电极漏电流I _CEO和增益β的变化相比变化很小，两者都上升了不少。随着温度从 25 °C 升至 100 °C，β很容易从 50 变为 250，即 5 倍。经验法则是，电流I _CEO每升高 10 °C 就会翻一番。如您所见，我们谈论的并不是微小的变化。

   

   

4. The resistors R₁ and R₂ do not change much. Additionally, they both change in the same direction, that is, they would simultaneously either increase or decrease their resistance, thus the voltage in the middle, the base voltage V_B (Figure 9.1), changes very little compared with the changes in the collector leakage current, I_CEO, and the gain β, which both go up quite a bit. β can easily change from 50 to 250, a factor of 5, as the temperature goes from 25 °C to 100 °C. The rule of thumb is that the current I_CEO doubles every 10 °C. As you can see, we are not talking about small changes.

5. 随着ICEO和_β上升，集电极电流IC也_“试图”上升，而基极电压VB （由_R1和 R2_的比率定义_）几乎保持不变。
6. As I_CEO and β go up the collector current, I_C, “tries” to also go up, while the base voltage, V_B, defined by the ratio of R₁ and R₂, remains almost unchanged.
7. 由于发射极电流I _E大约等于集电极电流，因此它也“趋向于”以与集电极电流相同的量增加。
8. Since the emitter current, I_E, is approximately equal to the collector current, it also “tends” to go up by the same amount as the collector current.
9. _{发射极电阻 R E}两端的电压V _E也“趋于”上升，因为它是通过发射极的电流I _E乘以发射极电阻 R E 的乘积，而发射极电阻R _E不会改变或变化很小。
10. The voltage V_E across the emitter resistor R_E also “tends” to go up since it is the product of the current through the emitter, I_E, times the emitter resistance, R_E, which does not change or changes very little.
11. 由于基极电压V _B不变，而电压V _E趋于上升，因此基极和发射极之间的电压V _BE将趋于下降。
12. Since the base voltage, V_B, does not change and the voltage V_E “tends” to go up, the voltage between the base and the emitter, V_BE, will “tend” to go down.
13. 如果电压V _BE趋于下降，则基极电流I _B也会下降。
14. If the voltage V_BE “tends” to go down, so does the base current, I_B.
15. 因此，集电极电流I _C = βI _B “趋于”减小。这与步骤 3 中的情况完全相反。
16. Therefore, the collector current, I_C = βI_B, “tends” to decrease. This is exactly the opposite of the situation in step 3.

按照定义，步骤 3 中的增加和步骤 8 中的反向减少是保持直流条件恒定的负反馈。如果您再次阅读第 8 点，您现在应该明白为什么我在引号中使用“趋向”一词。电流I _C不会增加或减少。它被推向两个方向。

The increase in step 3 and the opposing decrease in step 8 are, by definition, negative feedback that keeps the DC conditions constant. If you read point 8 again you should now understand why I use the word “tend” in quotation marks. The current I_C does not increase or decrease. It is being push in both directions.

现在，我们了解了发射极偏置电路的工作原理，让我们回到图 9.1，确定电阻需要什么值才能在此模式下操作该晶体管电路。这并不复杂。让我们一步一步来。回顾图 9.1。

So, now that we understand how this emitter bias circuit is supposed to work, let's go back to Figure 9.1 and decide what values the resistors need to have to operate this transistor circuit in this mode. This is not that complicated. Let us go one step at a time. Review Figure 9.1.

有一个直流电压源 V _CC，它提供恒定电流。一条路径经过左侧的电阻器 R ₁和 R _{2 ，另一条路径经过右侧的电阻器 R C}、晶体管和电阻器 R _E。这些电流之间的关系为

There is one DC voltage source, V_CC, which provides the constant currents. One path goes through the resistors R₁ and R₂ on the left, and the other through the resistor R_C, the transistor, and the resistor R_E on the right. The relationships between these currents are

(9.1)

由于I _B与所有其他电流相比非常小，因此我可以通过以下公式近似地表示上面(9.1)中的关系

Since I_B is very small compared to all the other currents, I can approximate the relationships in (9.1) above by writing

(9.2)

其中波浪形等号 ≈ 表示近似相等。

where the wiggly equals sign, ≈, means approximately equal.

由于本书的目的不是教您如何设计电路，而是让您了解电路的工作原理，因此在图 9.3中，我告诉您我选择的电阻值，并解释我选择这些值的原因。

Since the purpose of this book is not to teach you how to design circuits, but to give you an understanding of how circuits work, in Figure 9.3 I tell you the resistance values I select and I will explain why I chose these values.

图 9.3与图 9.1相同，但添加了四个电阻和偏置电压V _CC的值。另请参见图9.4 。它与图 8.8右侧相同，但我添加了一条线（称为负载线），并在该线的中间添加了一个点 Q。我将在图 9.3和9.4之间来回切换。

Figure 9.3 is the same as Figure 9.1, with values added for the four resistors and the bias voltage, V_CC. Also look at Figure 9.4. It is the same as the right‐hand side of Figure 8.8 but I have added a line, called the load line, and a point, Q, in the middle of the line. I will go back and forth between Figures 9.3 and 9.4.

室温下，该晶体管的增益约为 50，β = 50。参见图 9.4。当电压V _CE为 2 V（短垂直虚线）时，集电极电流从约 2 变为 3mA，基极电流从 40 变为 60 μA。因此，我们可以说β是

This transistor has a gain of about 50, β = 50, at room temperature. Look at Figure 9.4. When voltage V_CE is 2 V (the short vertical dotted line), the collector current changes from about 2 to 3mA and the base current changes from 40 to 60 μA. Therefore we can say that β is

(9.3)

请看图 9.4中的晶体管特性曲线。首先，我们知道当集电极电流I _C为零时，电阻器 R _C或 R _E两端没有电压降，因此晶体管两端的电压V _{CE必须等于电池电压，即 6V。这是}x轴上的方点，其中I _C = 0 和V _CE = 6V。当晶体管两端的电压为零时，电池电压V _CC被分在电阻器 R _C和 R _E之间，这就是在给定电阻器的特定值的情况下我可以获得的最大电流。我希望最大集电极电流I _C不超过 5mA，因为我不希望电流增加到晶体管的线性区域以上。这是特性曲线垂直线在y轴上的方点，因此集电极电流I _C等于V _CC /( R _C  +  R _E )，必须等于 5mA。这两点定义了一条线，我们称之为负载线，它以图形方式确定了当集电极电流I _C从 0 增加到其最大值 5 mA 时晶体管两端的电压。在负载线中间，在负载线和 40 μA 线的交点处有一个点。此点称为静态点或 Q 点。当仅有恒定的直流电压时，这是晶体管所需的工作条件。我们希望在负载线中间的这个 Q 点操作晶体管，以便当我们添加正弦输入电流（参见下一部分）时，输出电流可以在 0.4 到 4.2 mA 之间摆动，而不会偏离特性曲线的线性部分。Q 点显示未添加信号时晶体管的工作情况，即仅直流，一切安静，没有电压或电流变化。

Look at the transistor characteristic curves in Figure 9.4. First, we know that when the collector current I_C is zero, there is no voltage drop across the resistors R_C or R_E, thus the voltage across the transistor, V_CE, must be equal to the battery voltage, i.e. 6 V. This is the square point on the x axis, where I_C = 0 and V_CE = 6 V. When the voltage across the transistor is zero, the battery voltage, V_CC, is divided between resistors R_C and R_E, and that is the maximum current I can get given the specific values of the resistors. I want the maximum collector current, I_C, not to exceed 5 mA because I don't want the current to increase above the transistor's linear region. This is the square point on the y axis for the vertical line of the characteristic curves, Therefore the collector current, I_C, which is equal to V_CC/(R_C + R_E), must be equal to 5 mA. These two points define a line that we call the load line, which determines graphically what the voltage across the transistor is as the collector current, I_C, increases from 0 to its maximum value of 5 mA. In the middle of the load line there is a dot at the intersection of the load line and the 40 μA line. This point is called the quiescent point, or the Q‐point. This is the desired operating conditions of the transistor when there is only a constant, DC, voltage. We want to operate the transistor at this Q‐point at the middle of the load line so that when we add a sinusoidal input current (see the next section) the output current can swing between 0.4 and 4.2 mA without falling off the linear portion of the characteristic curves. The Q‐point shows the operation of the transistor when there is no signal added, that is, only DC, all quiet, no voltage or current changes.

现在我们知道，当晶体管两端的电压为零时，我们需要 5 mA 电流，电压V _{CC必须在电阻 R C}和 R _E两端下降，因此

Now that we know we want 5 mA when the voltage across the transistor is zero, the voltage V_CC must be dropped across the resistors R_C and R_E, therefore

(9.4)

我选择R _E = 200 Ω 和R _C = 1000 Ω（稍后您将看到为什么我想要R _C  >>  R _E）。

I select R_E = 200 Ω and R_C = 1000 Ω (you'll see why I want R_C >> R_E later).

现在让我们看看图 9.3的左侧。我们希望通过 R ₁和 R ₂的电流至少比I _B大 10 倍，并且我们选择了I _B = 40 μA（负载线上的 Q 点）。然后让我们选择电流I ₁ = 500 μA，例如。因此，两个电阻之和为

Let's now look at the left side of Figure 9.3. We want the current through R₁ and R₂ to be at least 10 times larger than I_B, and we have chosen I_B = 40 μA (the Q‐point on the load line). Let's then select the current I₁ = 500 μA, for example. Therefore, the sum of the two resistances is

(9.5)

现在我们必须将总电阻除以 R ₁和 R ₂。通过查看我选择的静态点，我们发现电流I _C = 2.3 mA，因此电阻 R _E两端的发射极电压V _E必须是

Now we have to divide this total resistance between R₁ and R₂. By looking at where I selected the quiescent point, we see that the current I_C = 2.3 mA, therefore the emitter voltage, V_E, across the resistor R_E must be

(9.6)

基极电压V _B等于 R _E两端的电压加上晶体管的导通电压（记住探测器的导通电压，第 5.2 节中的图 5.9），该电压通常在 0.7 V 左右。因此，电压V _B应该是：

The voltage at the base, V_B, is equal to the voltage across R_E plus the turn‐on voltage of the transistor (remember the detector turn‐on voltage, Figure 5.9 in Section 5.2), which is typically around 0.7 V. Thus, voltage V_B should be:

(9.7)

_{现在我们知道了R2}两端所需的电压和电流，我们就可以计算电阻了：

Now that we know the voltage and the current I want across R₂, we can calculate the resistance:

(9.8)

因此，根据公式 (9.5)和(9.8)

Therefore from Eqs. (9.5) and (9.8)

(9.9)

_{使用最接近的标准电阻值，我选择 R 2}的值为 2.32 kΩ ，R ₁的值为 9.31 kΩ 。再看一下图 9.3。我们设计了一个稳定的晶体管电路。当我们打开这个晶体管并开始升温时，晶体管的进出电流变化很小。

Using the closest standard resistor values, I select the values of 2.32 kΩ for R₂ and a 9.31 kΩ for R₁. Take another look at Figure 9.3. We have designed a stable transistor circuit. When we turn this transistor on and it starts warming up, the currents in and out of the transistor change very little.

9.3 发射极偏置晶体管的正弦工作

9.3 Sinusoidal Operation of a Transistor with Emitter Bias

现在我们已经偏置了晶体管电路，使其稳定下来，让我们看看如何引入正弦信号。请看图 9.5。

Now that we have biased the transistor circuit so that it is stable, let's see how we can introduce a sinusoidal signal. Take a look at Figure 9.5.

在图 9.5中，我向图 9.1添加了以下组件：

In Figure 9.5, I have added the following components to Figure 9.1:

1. 左侧的正弦输入信号源 V _{in通过电容器 C 1}连接到晶体管基极。
2. A sinusoidal input signal source, V_in, on the left, connected to the transistor base with a capacitor C₁.
3. 输出电阻 R _O表示放大器的负载，它与另一个电容器 C ₂一起连接到集电极端子。输出电阻R _O表示连接到输出的任何其他设备，可以是扬声器或另一个放大级。
4. An output resistor, R_O, representing a load to the amplifier, connected to the collector terminal with another capacitor, C₂. The output resistance R_O represents whatever other device is connected to the output, which could be a speaker or another amplifying stage.
5. 另一个电容器 C ₃跨接在发射极电阻 R _E上。
6. Another capacitor, C₃, across the emitter resistor R_E.

您应该立即意识到的一件事是，我们在上一节中开发的直流条件根本没有改变。所有这些添加的元件都通过电容器连接，就直流电流而言，这些电容器是开路。交流电流和电压叠加在直流电流上。就正弦信号而言，发射极电阻 R _{E是短路的，电池也是如此。因此，正弦信号根本看不到电阻 R E}或电池。我可以说，从正弦电压的角度来看，上面的电路看起来像图 9.6。

One thing you should realize right away is that the DC conditions we developed in the previous section have not changed at all. All of these added elements are connected by capacitors which, as far as the DC currents are concerned, are open circuits. The AC currents and voltages are superimposed on the DC currents. The emitter resistor, R_E, as far as the sinusoidal signal is concerned, is shorted, and so is the battery. Therefore, the sinusoidal signal does not see the resistor R_E or the battery at all. I can say then that the circuit above, from a sinusoidal voltage point of view, looks like Figure 9.6.

在图 9.6中，电容器和电池短路。正弦信号看不到它们。我通过虚线表示电容器和电池，并用短路实线代替它们。还请注意，我已将发射极电阻 R _{E完全移除，因为它被电容器 C 3}短路到正弦电压。

In Figure 9.6 the capacitors and the battery are shorted. The sinusoidal signal does not see them. I show this by dashing the capacitors and battery, and replacing them by a shorting solid line. Notice also that I have removed the emitter resistor R_E altogether since it is shorted to the sinusoidal voltage by the capacitor C₃.

如果仔细查看图 9.6，您会注意到所有三个电阻的一侧都连接到地。此外，还有一小股电流I _B流入晶体管。晶体管的输入可以用我们称之为 r _b的输入电阻表示。从输出角度来看，晶体管是一种向集电极（输出）发送电流的器件，该电流等于基极电流乘以晶体管的增益。然后我可以用图 9.7替换图 9.6。晶体管现在用一个带有输入电阻r _b和输出电流βi _b的方框（虚线）表示。（我将电流符号从大写字母改为小写字母，以表示这是正弦可变电流，它是时间的函数。标准符号r _b随温度和操作而变化。）

If you look carefully at Figure 9.6 you will notice that one side of all the three resistors is connected to ground. Also there is a small current, I_B, going into the transistor. The input of the transistor can be represented by an input resistor that we call r_b. From the output point of view, the transistor is a device that sends a current to the collector, the output, equal to the base current times the gain of the transistor. I can then replace Figure 9.6 by Figure 9.7. The transistor is now represented by a box (dotted lines) with an input resistance, r_b, and an output current, βi_b. (I have changed the current symbol from a capital to a lower case letter to indicate that this is the sinusoidal, variable, current, which is a function of time. The standard notation r_b changes with temperature and operation.)

输入正弦电压通过三个并联电阻 R ₁、 R ₂和输入电阻r _b获得。晶体管输入端的电压等于正弦输入电压V _in。实际上，所有三个电阻都获得相同的输入电压。因此，基极电流i _b等于输入电压除以晶体管输入电阻r _b。那么，输入电阻的值是多少呢？通常它非常小，大约为 10 Ω（它可以从 4 或 5 Ω 到 1000 Ω：其值由制造商提供）。让我们再看一下晶体管特性曲线。图 9.8显示了与图 9.4相同的特性曲线，但交流信号叠加在负载线上。

The input sinusoidal voltage sees three resistors is parallel, R₁, R₂ and the input resistance r_b. The transistor input sees a voltage equal to the sinusoidal input voltage, V_in. In fact, all three resistors see the same input voltage. Therefore, the base current, i_b, is equal to the input voltage divided by the transistor input resistance, r_b. So, what is the value of the input resistance? Usually it is very small, in the order of 10 Ω (it can go from 4 or 5 Ω to 1000 Ω: its value is given by the manufacturer). Let us take a look again at the transistor characteristic curves. Figure 9.8 shows the same characteristic curves as in Figure 9.4, but with the AC signals superimposed over the load line.

我们希望将正弦信号限制在线性区域内，该区域基本上为 0 至 80 μA，即从中心 Q 点开始的两个方向均为 40 μA（对角正弦波从 0 到 80 μA）。如果输入信号大于 40 μA，我们将超出线性工作区，使正弦信号的两端失真。因此，由于晶体管输入电阻在我们的例子中为 10 Ω，输入电压不应大于

We want the sinusoidal signal to be restricted to stay in the linear region, which is basically from 0 to 80 μA, that is, 40 μA from the center Q‐point in both directions (the diagonal sinusoidal wave going from 0 to 80 μA). If the input signal is larger than 40 μA, we are going to exceed the linear operating region and distort both ends of the sinusoidal signal. So, since the transistor input resistance is 10 Ω in our case, the input voltage should be no larger than

(9.10)

如果是这种情况，则输出电流为

If this is the case, the output current is

(9.11)

无论如何，曲线就是这么告诉你的。集电极电流_iC从大约 0.5 mA 变为 4.3 mA（参见图 9.8左侧的垂直正弦信号），或者正弦电流为 1.9 mA。

which is what the curves tell you anyway. The collector current, i_C, goes from about 0.5 mA to 4.3 mA (look at the vertical sinusoidal signal at the left of Figure 9.8), or a sinusoidal current of 1.9 mA.

回到图 9.7。电流iC在电阻 R _C和输出电阻 R _O之间分配。假设输出电阻为 25 Ω，与电阻R _{C相比很小，我选择电阻 R C}为 1000 Ω。那么大部分电流会流过输出电阻。输出电压v _out为

Back to Figure 9.7. The current i_C is divided between the resistor R_C and the output resistor R_O. Let us assume that the output resistance is 25 Ω, small compared to the resistance R_C, which I have chosen to be 1000 Ω Then the majority of the current goes through the output resistance. The output voltage v_out is

(9.12)

如果输出电阻R _O非常大，电压将受到集电极电阻R _C（1000 Ω）的限制，因此这种情况下的最大输出电压为

If the output resistance, R_O, is very large, the voltage is limited by the collector resistance, R_C, which is 1000 Ω and thus the maximum output voltage in this case is

(9.13)

这很有趣。虽然晶体管的电流增益β在给定温度下是恒定的，但电压​​增益在很大程度上取决于电路的特性晶体管试图驱动的电压。如果我们看一下v _out / v _in的比率，我们会发现电压增益可以从

This is very interesting. Although the current gain of the transistor, β, is constant at a given temperature, the voltage gain depends very much on the characteristic of the circuit that the transistor is trying to drive. If we look at the ratio of v_out/v_in, we find that the voltage gain can go from

(9.14)

输出电阻极低，最高可达

for a very low output resistance up to

(9.15)

以获得非常高的输出电阻。

for a very high output resistance.

输出电压增益有很大的波动！

Quite a swing of output voltage gain!

现在你明白我为什么选择R _E ≪ R _C了。就正弦信号而言，电阻R _E不存在，它被电容器短路，并且我将R _{C设为越大，电压增益越高。但请记住，我将}R _E设为越小，电路的稳定性越差。

Now you can see why I selected R_E ≪ R_C. As far as the sinusoidal signals is concerned the resistance R_E does not exist, it is shorted by the capacitor, and the larger I make R_C, the higher the voltage gain. Remember though that the smaller I make R_E, the worse the stability of the circuit.

因为我们在本节中做了很多工作，所以我在这里总结一下我们所做的工作：

Because we have done so much in this section, I summarize here what we have done:

1. 给定电源电压（6 V）和我们可以容忍的最大电流（5 mA），以将信号保持在线性区域内，我们画一条负载线。
2. Given a power supply voltage (6 V) and the maximum current we can tolerate to keep the signals in the linear region (5 mA), we draw a load line.
3. 我们在线性工作区域中间的负载线上选择一个工作点，称之为 Q 点。
4. We choose an operating point, which we call the Q‐point, on the load line in the middle of the linear operating region.
5. Q 点告诉我们直流集电极电流I _C是多少，因此也告诉我们I _E是多少，因为它们大致相同。
6. The Q‐point tells us what the DC collector current, I_C, is and therefore also I_E, since they are about the same.
7. 为了获得高稳定性，我选择较大的R _E；为了获得较大的增益，我选择较大的R _C。
8. For high stability I choose a large R_E and for large gain I choose a large R_C.
9. _{我选择流过 R 1}和 R ₂的电流大于I _{B 的}10 倍。
10. I select the current through R₁ and R₂ to be larger than 10 times I_B.
11. 使用通过发射极电阻的选定电流和晶体管的导通电压，我计算出基极电压V _E，并且知道I _{e和通过 R 2 的}电流，我计算出 R ₂的值。
12. Using the selected current through the emitter resistor and the turn‐on voltage of the transistor, I calculate the base voltage, V_E, and knowing I_e and the current through R₂ I calculate the value of R₂.
13. 电路设计已完成，最后一件事就是计算在不使晶体管进入饱和模式的情况下我们可以使用的最大正弦输入电压。
14. The circuit design is complete and the last thing to do is to calculate the maximum sinusoidal input voltage that we can use without running the transistor into the saturation mode.

我们设计了一个电压放大器。

We have designed a voltage amplifier.

9.4 固定偏置电路

9.4 The Fixed Bias Circuit

现在让我解释一下固定偏置电路，它比发射极反馈电路简单得多。我在图 9.9中显示了该电路。这显然比图 9.1中的电路简单得多。这里，直流基极电流I _B等于电流I ₁，等于电池电压V _CC减去基极和发射极之间的电压V _BE，约 0.7 V。因此，基极电流等于

Now let me explain the fixed bias circuit, which is much simpler than the emitter feedback circuit. I show the circuit in Figure 9.9. This is obviously a much simpler circuit that the one in Figure 9.1. Here, the DC base current, I_B, is equal to the current I₁, which is equal to the battery voltage V_CC minus the voltage between the base and the emitter, V_BE, about 0.7 V. So, the base current is equal to

(9.16)

请注意，V _CC、V _BE和R ₁不会改变，因此无论电路的其余部分发生什么，基极电流I _{B都是恒定的。这就是这种偏置被称为固定偏置电路的原因。我们知道集电极电流}I _C是

Notice that V_CC, V_BE and R₁ do not change, therefore the base current, I_B, is constant no matter what happens to the rest of the circuit. That is the reason this bias is called the fixed bias circuit. We know that the collector current I_C is

(9.17)

和

and

(9.18)

我已经指出V _CC和R _C是恒定的，因此如果I _C发生变化，唯一能够改变的值是V _CE。

I have already pointed out that V_CC and R_C are constant, therefore if I_C changes, the only value that can change is V_CE.

我再强调一下，这个电路不稳定性。随着温度升高，β会发生变化，漏电流也会变化，并且会产生正反馈条件，导致失控情况，电流会不断增加，尤其是当我们使用的晶体管具有高β值时。

Let me just point out again that this circuit has no stability. As the temperature goes up, β changes and so does the leakage current, and a positive feedback condition can develop that causes a runaway condition where the current keeps on increasing, especially if the transistor we use has a high β value.

现在让我们再看一下图 9.10中的晶体管特性曲线。这条负载线与图 9.4中的负载线略有不同。是的，当电流I _C为零时，晶体管两端的电压等于V _CC，这没有变化，但现在，当晶体管两端的电压为零时，电流必须为V _CC / R _C。与前一种情况一样，我们可以绘制一条负载线并选择一个 Q 点。

Now let's look again at the transistor characteristic curves in Figure 9.10. There is a slight difference between this load line and the one in Figure 9.4. Yes, when the current I_C is zero the voltage across the transistor is equal to V_CC, that has not changed, but now, when the voltage across the transistor is zero, the current must be V_CC/R_C. As in the previous case we can draw a load line and select a Q‐point.

计算非常简单。查看特性曲线，我们知道β = 50、I _C = 5 mA、V _CC = 6 V，因此

The calculations are very simple. Looking at the characteristic curve we know that β = 50, I_C = 5 mA, and V_CC = 6 V, therefore

(9.19)

我们将选择 130 kΩ 的标准电阻值。

We'll select a standard resistance value of 130 kΩ.

现在让我们看看集电极侧。在 Q 点处，由于β = 50，则

Now let's take a look at the collector side. At the Q‐point since β = 50, then

(9.20)

并且V _{CE = 3.2 V，显然与我们在}图 9.10中的特性曲线中看到的 Q 值一致。因此，电阻R _C为

and V_CE = 3.2 V, agreeing, obviously, with the Q‐values we see in the characteristic curves in Figure 9.10. Therefore, the resistance R_C is

(9.21)

图 9.11与图 9.9相同，但显示了我们计算出的电阻值。

Figure 9.11 is the same as Figure 9.9 but shows the values of the resistors we have calculated.

9.5 集电极反馈偏置电路

9.5 The Collector Feedback Bias Circuit

为了完整起见，让我简单介绍一下第三种偏置模式，即集电极反馈偏置模式。我在图 9.12中展示了该电路。

Just for completeness let me say a few words about the third bias mode, the collector feedback bias mode. I show the circuit in Figure 9.12.

让我们看看我们是否可以简单地展示该电路如何稳定晶体管的操作，而无需过多细节。首先，请注意，由于I _C比I _B大得多，是β倍，我们可以说电流I _C约等于总电流I或

Let see if we can simply show how this circuit stabilizes the transistor operation without going into too many details. First, notice that since I_C is much larger than I_B, by a factor of β, we can say that the current I_C is approximately equal to the total current I or

(9.22)

请注意，流过晶体管的电流大致与β无关。由于发射极接地，直流输出电压V _C等于电压V _CE。正如我对发射极反馈电路所做的那样，让我们​​看看反馈如何稳定电流（图9.13）。

Note that the current through the transistor is, approximately, independent of β. Since the emitter is connected to ground, the DC output voltage, V_C, is equal to voltage V_CE. As I did with the emitter feedback circuit, let's take a look at how the feedback stabilizes the currents (Figure 9.13).

按照图 9.13右侧的数字：

Following the numbers on the right of Figure 9.13:

1. 假设集电极电流I _C呈上升趋势。
2. Suppose that the collector current I_C tends to go up.
3. _{这意味着电阻器 R C}两端的电压也会上升。
4. That means that the voltage across the resistor R_C will also tend to go up.
5. 由于偏置电压V _CC是恒定的，因此晶体管两端的电压V _CE ( V _CE = V _CC  −  V _C ) 趋于下降。
6. Since the bias voltage V_CC is constant, the voltage across the transistor, V_CE (V_CE = V_CC − V_C) tends to go down.
7. 基极电流I _B等于集电极电压V _C减去基极和发射极之间的电压（我们已经知道这个值大约是 0.7V）再除以电阻R _B。由于V _C下降，I _B也趋于下降。
8. The base current, I_B, is equal to the collector voltage, V_C, minus the voltage between the base and the emitter (we already know this is about 0.7 V) divided by the resistance R_B. Since V_C goes down, I_B tends also to go down.
9. 如果电流I B 趋于下降，则等于I _B × β的I _C也趋于下降。这与我们在步骤 1 中假设的上升趋势相反。
10. If the current IB tends to go down, I_C, which is equal to I_B × β, tends to go down. This is the opposite of the tendency to go up that we assumed in step 1.

集电极反馈电路也能提供良好的负反馈。该电路工作的条件之一是β和R _C必须远大于R _{B ，我在}附录9.1中对此进行了扩展。较大的R _C或较小的R _B会对晶体管电路的增益造成问题。

The collector feedback circuit also provides good negative feedback. One of the conditions for this circuit to work, and I expand this in Appendix 9.1, is that β and R_C must be much larger than R_B. Larger R_C or smaller R_B are a problem for the gain of the transistor circuit.

9.6 电源考虑

9.6 Power Considerations

让我们来谈谈功耗。我已经提到过，电子电路中的热量是一个真正的问题，因为它不仅会改变设备的特性，还会增加功耗。那么，晶体管中的功耗是多少？请记住，功率是电压乘以电流或电阻乘以电流平方的乘积。因此，基极/发射极电路中消耗的直流功率是

Let's talk a moment about power dissipation. I have already mentioned that heat in electronic circuits is a real problem because it not only changes the characteristics of the devices, but also increases the power consumed. So, what is the power dissipation in a transistor? Remember that power is the product of voltage times current or resistance times the square of the current. Thus, the DC power dissipated in the base/emitter circuit is

(9.23)

集电极至发射极电路中

and in the collector to the emitter circuit is

(9.24)

因此，晶体管耗散的总直流功率是两个功率的总和。因此，在我们的例子中，晶体管耗散的总功率为

Thus, the total DC power dissipated by the transistor is the sum of the two powers. Therefore, in our case, the total power dissipated by the transistor is

(9.25)

请注意，当V _CE为最大值时，I _C为零（图 9.10），反之亦然，当I _C为最大值时，V _CE为零。在这两个极端情况下，功耗为零。最大功率发生在 Q 点。在我们的第一种情况下，即发射极反馈偏置（图 9.3和9.4），最大功率耗散为

Notice that when V_CE is a maximum, I_C is zero (Figure 9.10) and, vice versa, when I_C is a maximum, V_CE is zero. In these two extremes the power dissipated is zero. The maximum power occurs at the Q‐point. In our first case, the emitter feedback bias (Figures 9.3 and 9.4), the maximum power dissipation is

(9.26)

请注意，基极电流的贡献与集电极电流的贡献相比微不足道，因此我们可以忽略它的贡献。现在，这只是晶体管的耗散。我们还电阻上有耗散。如果晶体管在 Q 点工作，那么我们可以通过两种方式计算电阻中耗散的功率：

Notice that the contribution of the base current is tiny compared to that of the collector, so we can disregard its contribution. Now, this is the transistor dissipation only. We also have the dissipation in the resistors. If the transistor is operating at the Q‐point, then we can calculate the power dissipated in the resistors in two ways:

(9.27)

或者

or

(9.28)

两次计算结果一致（在图 9.10中我对值的直观估计范围内）。请注意，使用我选择的晶体管的固定偏置电路的功率约为 14 mW。与我办公室里的 150 W 灯相比，这似乎微不足道，但如果您考虑到微芯片可能包含多达 1 亿个晶体管，如果我们要使用我们设计的晶体管，该芯片将需要一个具有数千瓦功率的电源。显然，逻辑电路使用更小的晶体管，它们需要的电压要小得多，β值也更低。

The two calculations agree (within my visual approximation of the values in Figure 9.10). Notice that the power of the fixed bias circuit using the transistor I selected is about 14 mW. This may seem very little compared with the 150 W lamp I have in my office but if you consider that a microchip may contain as many 100 million transistors, the chip, if we were to use the transistors we designed, would require a source with multiple kilowatts of power. Obviously, the logic circuits use much smaller transistors that require considerably less voltage and have lower β values.

9.7 多级晶体管放大器

9.7 Multistage Transistor Amplifiers

图 9.14显示了两级电压放大器。这是创建两级放大器的非常简单的方法。由于两个级由电容器 C ₂隔开，因此两个级可以独立偏置。一个晶体管可能具有更高或更低的增益，并相应地偏置。正弦输入信号从一个晶体管流向另一个晶体管，直到到达输出端，我假设输出端是一个扬声器，以增强趣味性。

Figure 9.14 shows a two‐stage voltage amplifier. This is a very trivial way to create a two‐stage amplifier. Because the two stages are separated by a capacitor, C₂, the two stages can be biased independently. One transistor may have a higher or lower gain and be biased accordingly. The sinusoidal input signal flows from one transistor to the other until it reaches the output, which I assume, for fun, is a speaker.

图 9.15显示了图 9.14中两级放大器的细微变化。变化部分显示在虚线椭圆内。电容耦合放大器的一个问题是，在非常低的频率下，电容器具有较高的电阻（您可能还记得我们称之为电抗或阻抗，参见附录 6.1）。随着信号频率越来越低，阻抗会降低增益。电容器 C ₆对此进行了补偿。电阻器 R _C1现在分为两个电阻器，R _C1a和 R _C1b。当频率很高时，电容器 C ₆实际上处于短路状态，使电阻器 R _C1a短路。高频交流信号只能看到较小的电阻器 R _C1b。随着频率的降低，电容的阻抗增加，因此 R _C1a和 C ₆的并联组合变成更大的电阻，最终，在零频率时，两个电阻的总和等于原始电阻器 R _C1。如果您仔细想想，就会发现这是一个非常聪明的想法。集电极电阻/电容电抗值随着信号频率的变化而不断自动变化。

Figure 9.15 shows a slight variation on the two‐stage amplifier shown in Figure 9.14. The changes are shown inside dotted ovals. One of the problems with capacitor coupled amplifiers is that at very low frequencies the capacitors have a higher resistance (you may recall we call it reactance or impedance, see Appendix 6.1). The impedance decreases the gain as the frequency of the signal gets lower and lower. The capacitor C₆ compensates for that. The resistor R_C1 is now divided into two resistors, R_C1a and R_C1b. When the frequency is high, the capacitor C₆ is for all practical purposes shorted, shorting the resistor R_C1a. The high‐frequency AC signal sees only the smaller resistor R_C1b. As the frequency decreases, the capacitance's impedance increases so that the parallel combination of R_C1a and C₆ become a larger resistance, and eventually, at zero frequency, the sum of the two resistor equals the original resistor, R_C1. If you think about it, this is a very clever idea. The collector resistor/capacitor reactive value keeps on changing automatically as the signal frequency changes.

要注意的第二点是，如果没有音量控制，你就无法设计声音放大器。在放大器第一级的输出端添加可变电阻器（电位器）可以实现音量控制。如果指针设置在电阻器 R _P的底部，则第二级的电压输入为零，即接地。如果指针位于电阻器 R _P的顶部，则最大信号进入第二级。现在我们有了一个相当有用的声音放大器。

The second point to note is that you would not design a sound amplifier unless you had a volume control. The addition of the variable resistor, a potentiometer, at the output of the first stage in the amplifier makes volume control possible. If the pointer is set at the bottom of resistor R_P, the voltage input to the second stage is zero, that is, it is grounded. If the pointer is on top of the resistor R_P, then the maximum signal goes to the second stage. Now we have a reasonably useful sound amplifier.

9.8 运算放大器

9.8 Operational Amplifiers

在下一章中，我将解释如何制造复杂的集成电路，但在此之前，我将讨论运算放大器，简称 OpAmp。这是将许多组件组合在一个封装中的第一种实现。它们是在 20 世纪 40 年代初开发的，使用真空管实现。我展示的 OpAmp 741图 9.16中的运算放大器由 Fairchild 于 1968 年开发，目前仍在生产中。我们并不关心里面有什么，我们只是在大量应用中使用运算放大器，而不必担心如何偏置每个单独的组件。图 9.16显示了相对现代的运算放大器的内部结构，图 9.17显示了运算放大器使用的符号。使用运算放大器设计电子设备的工程师使用图 9.17中的符号和制造商提供的特性，而不关心了解封装内部是什么。

In the next chapter I will explain how complex integrated circuits are fabricated, but before I do that, I will talk about operational amplifiers, or OpAmps for short. These are the first implementation of combining many components in a single package. They were developed in the early 1940s and were implemented using vacuum tubes. The OpAmp 741 that I show in Figure 9.16 was developed by Fairchild in 1968 and is still in production. We do not care what is inside, we just use OpAmps in a very large number of applications without worrying about how to bias each individual component. Figure 9.16 shows the inners of a relatively modern OpAmp and Figure 9.17 shows the symbol used for an OpAmp. An engineer designing an electronic device using OpAmps uses the symbol in Figure 9.17 and the characteristics coming from the manufacturer, without caring to understand what is inside the package.

我们将回顾运算放大器的使用，但首先我要指出有关图 9.16所示电路的几点。首先是差分放大器的概念。这是图 9.16右侧大虚线框内的电路。图 9.18是差分输入电路的简化。图 9.18中的两个晶体管是相同的（尽可能相同）。两个发射极连接在一起到恒定电流源。这些是图 9.16所示的两个晶体管 Q ₁和 Q ₂。该框中晶体管的其余部分均衡晶体管操作并产生恒定电流源。

We'll come back to the use of OpAmps, but first I will point out a couple of things about the circuit shown in Figure 9.16. The first is the concept of the differential amplifier. This is the circuit inside the large dotted box on the right of Figure 9.16. Figure 9.18 is a simplification of a differential input circuit. The two transistors in Figure 9.18 are identical (as identical as possible). The two emitters are connected together to a constant current source. These are the two transistors, Q₁ and Q₂, shown in Figure 9.16. The rest of the transistor in that box equalizes the transistor operation and generates a constant current source.

在图 9.18的电路中，我们有两个输入，V ₁和V ₂，以及两个输出，V _out1和V _out2。我们感兴趣的是V _out，它是两个输出之间的差值，因此

In the circuit of Figure 9.18 we have two inputs, V₁ and V₂, and two outputs, V_out1 and V_out2. We are interested in V_out, which is the difference between the two outputs, such that

(9.29)

如果V _out1和V _out2相同，则输出电压V _out为零，但如果我们将其中一个输入接地，则输出与另一个输入电压成比例。这种输入类型的主要优点是，如果有噪声源干扰信号（我们总是有电子噪声源），它会影响两个输入，因此输出电压差为零。这是消除噪声源影响的一种非常好的方法。

If V_out1 and V_out2 are the same, the output voltage, V_out, is zero, but if we ground one of the inputs, the output is proportional to whatever the other input voltage is. The main and great advantage of this type of input is that if there is a noise source that interferes with the signal, and we always have electronic noise sources, it affects both inputs, so the output voltage difference is zero. This is a very good way to eliminate the effect of the noisy sources.

运算放大器中经常使用的另一个电路是电流镜。图 9.16所示的运算放大器中有三个电流镜。图 9.19是一个简化的电流镜电路。在理想的电流镜中，两个晶体管也是相同的。首先要注意的是，由于两个晶体管相同，并且两个发射极都接地，因此两个基极电流必须相同。只有一个电流I ₂，它在两个相同且偏置相同的输入之间分配，因此

Another circuit that is used quite often in an OpAmp is the current mirror. There are three current mirrors in the OpAmp shown in Figure 9.16. Figure 9.19 is a simplified current mirror circuit. In an ideal current mirror, the two transistors, again, are identical. The first thing to notice is that since the two transistors are identical and both emitters are grounded, the two base currents must be the same. There is only one current, I₂, which is split between two identical and equally biased inputs, so

(9.30)

因此，由于I _2比I _C1小得多，我可以说

Therefore, since I₂ is much smaller than I_C1, I can say

(9.31)

请注意，我必须做出所有假设才能表明输出和输入电流必须相同：两个晶体管必须相同，并且β必须足够大以确保I _2与I _C1相比可以忽略不计。

Notice all the assumptions I have to make to show that the output and input currents must be the same: the two transistors have to be identical, and β has to be large enough to ensure that I₂ is negligible compared to I_C1.

为什么我们需要一个只复制电流的电路？原因是我要强制I _C2与I ₁相同，而与连接到输出的电路无关。

Why do we want a circuit that just replicates the current? The reason is that I am forcing I_C2 to be the same as I₁ independently of what circuits are connected to the output.

9.9 理想运算放大器

9.9 The Ideal OpAmp

现在让我们开始使用运算放大器。图 9.20显示了理想的运算放大器。我们假设理想的运算放大器具有以下特征：

Now let's start using OpAmps. Figure 9.20 shows an ideal OpAmp. We assume that the ideal OpAmp has the following characteristics:

1. 无限大输入电阻。这意味着无论输入电压是多少，输入电流都为零（I = V / R，某值除以无穷大始终等于零）。
2. Infinite input resistance. This means that the input current is zero, no matter what the input voltage is (I = V/R and something divided by infinity is always equal to zero).
3. 放大器具有无限增益，因此输入电压也必须为零（同意第 1 点），因为我们不可能有无限高的输出电压。换句话说，输入电压是输出电压除以无限增益，当然，增益为零。
4. The amplifier has an infinite gain, therefore the input voltage must also be zero (agreeing with point 1) since we cannot have an infinitely high output voltage. Another way to say this is that the input voltage is the output voltage divided by an infinite gain, which, of course, is zero.
5. 输出电阻为零，因此无论我将什么电路连接到输出，我们都可以获得任何输出电流，而不会损失任何电压。
6. The output resistance is zero, so we can have any output current no matter what circuit I connect to the output without losing any voltage.

现在让我们考虑一下如何使用这种理想的运算放大器。图 9.21显示了典型的反相电路。让我们看看这个电路的作用。由于正输入 V ₊连接到地 0 V，并且两个输入端之间不能有电压（记住基极电流必须为零），负输入 V _{⁻也必须为 0 V。因此，}图 9.21中点 A 处的电压为零。此外，由于I _B也为零，电流I ₂必须等于电流I ₁，因此（记住点 A 为零）

Now let's consider ways of using this ideal OpAmp. Figure 9.21 shows a typical inverting circuit. Let's see what this circuit does. Since the positive input, V₊, is connected to ground, 0 V, and there cannot be a voltage between the two input terminals (remember the base current has to be zero), the negative input, V_⁻, also has to be 0 V. So, the voltage at point A in Figure 9.21 is zero. Furthermore, since I_B is also zero, the current I₂ must be equal to the current I₁, therefore (remember point A is zero)

(9.32)

如果我们现在计算电压增益，我们会发现一个非常简单的关系

If we now calculate the voltage gain, we find a very simple relationship

(9.33)

注意这个“理想”运算放大器的美妙之处。我可以通过选择两个电阻的值来获得我想要的任何电压增益。你想要 1 的增益？让R ₂ = R ₁。你想要一个增益1000 万？那么R ₂ = 10 000 000 ×  R ₁。（当然，我在开玩笑。你知道事情并不理想。）最常用的运算放大器之一 OpAmp 741 的实际特性如下：

Notice the beauty of this “ideal” OpAmp. I can get any voltage gain I want just by choosing the value of two resistors. You want a gain of 1? Make R₂ = R₁. Do you want a gain of 10 million? Make R₂ = 10 000 000 × R₁. (Of course, I'm kidding. You know things are not ideal.) The actual characteristics of OpAmp 741, one of the most commonly used OpAmps, are:

• 输入电阻>0.1MΩ
• input resistance >0.1 MΩ
• 输出电阻<100 Ω
• output resistance <100 Ω
• 电压增益≈2 000 000。
• voltage gain ≈ 2 000 000.

我将提到另一个应用，即差分放大器，如图 9.22 所示。在这个差分电路中，我们有两个不同的输入电压，V 1 和 V 2。V 1、R 1和R 2_连接到V _–并形成与_图9.21中_所示的_相同的反相电路。现在，我没有将 V _{+接地，而是通过电阻器 R 3}和 R ₄提供的分压器将其连接到不同的电压V _{2 。从我们对反相电路（}图 9.21 ）的了解中，我们知道

I will mention one further application, the differential amplifier, which I show in Figure 9.22. In this differential circuit we have two different input voltages, V₁ and V₂. V₁, R₁, and R₂ are connected to V_– and form the same inverting circuit that I show in Figure 9.21. Now, instead of grounding V₊, I connect it to a different voltage V₂ with a voltage divider provided by resistors R₃ and R₄. From what we learned about the inverting circuit (Figure 9.21) we know that

(9.34)

我们也可以说，由于分压器，

We can also say that, because of the voltage divider,

(9.35)

现在输出V _out将是两个输入的贡献，或者

Now the output V_out is going to be the contribution of the two inputs, or

(9.36)

如果我让所有阻力都相同，我得到

If I make all the resistances the same, I get

(9.37)

这是一个单位增益差分放大器，增益为 1，但拾取的任何噪声都会被抵消。如果我们想要一些增益，我们让R ₁等于R ₃。R ₂等于R 4 _。然后

which is a unit gain differential amplifier, gain of 1, but any noise that has been picked up will cancel out. If we desire some gain, we make R₁ equal to R₃. and R₂ equal to R₄. Then

(9.38)

它产生的增益与我们在反相运算放大器中获得的增益相同，只不过现在我们有了差分运算，可以消除噪声。请注意，如果我将V _{1设为零，我将获得与}公式 (9.33)中所示的相同的增益关系。

which gives the same gain as we obtained in the inverter OpAmp except that now we have the differential operation, which cancels the noise. Notice that if I make V₁ equal to zero, I get the same gain relation as I show in Eq. (9.33).

9.10 总结与结论

9.10 Summary and Conclusions

在本章中，我们学习了如何偏置晶体管以获得一些有用的设备。由于漏电流和电流增益等关键晶体管参数会随温度而变化，我讨论了三种偏置晶体管的方法，其中一些方法采用负反馈，通过具有相反的趋势来抵消变化的影响，当集电极电流上升时，迫使增益下降，反之亦然。我们看到了特性曲线如何让我们选择工作值、电压和电流，使得晶体管在线性区域工作，并且信号被放大而不失真。

In this chapter we learned how to bias a transistor to get some useful devices. Because key transistor parameters like leakage current and current gains change with temperature, I discussed three ways of biasing the transistors, some with negative feedback that cancels the effects of the changes by having opposite trends forcing the gain to go down when the collector current goes up and vice versa. We saw how the characteristic curves allow us to choose the operating values, voltages, and currents so the transistors operate in the linear region and the signals are amplified without distortion.

通过使用电容器隔离或短路电路的各部分，我们看到了如何在不干扰使晶体管正常工作和稳定的直流条件的情况下放大正弦电压。

By isolating or shorting portions of the circuit using capacitors we have seen how sinusoidal voltages are amplified without disturbing the DC conditions that make the transistor functional and stable.

我们还了解了如何添加晶体管电路并将其与其他电路组合以制造有用的放大器的概念。在此过程中，我讨论了第一种也是最原始的集成电路——运算放大器，它使有用的电子设备的设计和制造变得更容易。

We have seen also the concept of how transistors circuit can be added and combined with others to fabricate useful amplifiers. In the process I discussed the first and primitive type of integrated circuits, OpAmps, that make useful electronic devices much easier to design and fabricate.

在本章中，我们使用了大量算术来解释基本电路的行为。在下一章中，我们将放松一下，并研究这些集成电路是如何制造的。暂时不再使用算术。

In this chapter we have used a lot of arithmetic to explain the behavior of the basic circuit. In next chapter we'll relax and examine how these integrated circuits are fabricated. No more arithmetic for a while.

附录9.1 集电极反馈电路稳定性的推导

Appendix 9.1 Derivation of the Stability of the Collector Feedback Circuit

在本附录中，我想更正式地说明为什么发射极反馈偏置非常稳定。请看图 9.23。

In this appendix I want to more formally demonstrate why the emitter feedback bias is quite stable. Take a look at Figure 9.23.

总电流I分为集电极电流和基极电流，由于我知道I _C = βI _B，因此我可以写出

The total current, I, is divided between the collector and the base currents, and since I know that I_C = βI_B, then I can write

(9.39)

根据外环，总电压V _CC必须等于两个电阻两端的电压降加上基极和发射极之间的电压之和，我们知道晶体管中的基极和发射极之间的电压约为 0.7 V。因此，

Following the outside loop, the total voltage, V_CC, must equal the sum of the voltage drop across the two resistors plus the voltage between the base and the emitter, which we know in a transistor is about 0.7 V. So,

(9.40)

我可以解方程（9.40）得出基极电流I _B：

I can solve equation (9.40) for the base current, I_B:

(9.41)

集电极电流I _C为

The collector current, I_C is

(9.42)

现在我知道β远大于 1，因此去掉公式 (9.42) 分母中的 1，我得到

Now I know that β is much larger than 1, so dropping the 1 in the denominator of Eq. (9.42) I get

(9.43)

现在，如果我让βR _C  >>  R _B，那么我可以删除R _B，β就会抵消，最终得到

Now if I make βR_C >> R_B, then I can drop R_B and the βs cancel out and we end up with

(9.44)

因此，I _C大致独立于β。同样，大致而言，β可以改变，但集电极电流不会发生太大变化，这样我们就获得了所需的稳定性。

Therefore, I_C is independent, approximately, from β. Again, approximately, β can change but the collector current will not change much, and we get the stabilization we desire.

我特意使用了两次“大约”这个词。这就是集电极反馈电路的问题，而不是我们讨论的第一个电路，即发射极反馈偏置。要使集电极反馈偏置起作用，需要β   ×   R _C远大于R _{B 。由于我们通常不知道}β值的变化，我们需要使R _C大于R _B，这意味着V _CC必须更大，从而增加成本和功耗，或者R _B必须更小，从而降低集电极和基极结之间的反向偏置值。

I have made a point of using the word “approximately” twice. That is the problem with the collector feedback circuit versus the first one we discussed, the emitter feedback bias. For collector feedback bias to work it requires β  ×  R_C to be much larger than R_B. Since often we do not know the value of β as it changes, we need to make R_C larger than R_B, which implies that V_CC has to be larger, increasing the cost and the power dissipation, or R_B must be smaller, decreasing the reversed bias value between the collector and the base junction.

就像任何设计一样，工程师必须权衡设计的优点和缺点。没有什么是真正免费的。

As is true in any design, the engineer has to balance the advantages and disadvantage of any design. Nothing is truly free.

10.1 基本材料

10.1 The Basic Material

获得电子级硅的基本材料是沙子或二氧化硅。通过各种化学反应和高温处理，首先将硅转化为高纯度气体，然后再次凝固，我们能够去除许多杂质（主要是铁和铝）。由于这些杂质或杂质化合物的沸点不同，我们可以获得纯度高于每 5 × 10 13 ^cm −3^含一个杂质的硅，或者纯度约为 99.9999999%。这是相当纯净的硅，但此时硅晶体是随机排列的，我们称之为多晶硅，一种非晶态材料，就像许多随机排列的小马赛克。我们需要大面积完美排列的单晶硅原子。我们还希望晶体以特定的方向生长。

The basic material to obtain electronic quality silicon is sand or silicon dioxide. With a variety of chemical reactions and high‐temperature treatments, converting silicon first into a high‐purity gas and then solidifying again, we are able to remove many of the impurities (primarily iron and aluminum). Because these impurities or impurity compounds have different boiling points, we are able to get silicon with a purity better than one impurity per 5 × 10¹³ cm⁻³ or about 99.9999999% pure. This is quite a pristine and pure silicon, but at this point the silicon crystals are arranged randomly, what we call polysilicon, a kind of an amorphous material, like a number of small randomly arranged mosaics. We need large areas of perfectly arranged silicon atoms in the form of a single crystal. We also want the crystals to grow in a particular orientation.

10.2 滚球

10.2 The Boule

我们想要的是一根长圆柱形的硅棒，尽可能纯净，没有缺陷和杂质，晶格完美。这就是我们想要的！我们称之为硅晶棒。我们基本上使用两种技术来获得这种近乎完美的晶棒：切克劳斯基法和浮区法。

What we want is a long, cylindrical bar of as pure a silicon, free of defects and impurities, as we can get and with a perfect crystallographic lattice. That's all we want! We call it a silicon boule. There are basically two techniques we use to get this almost perfect boule: the Czochralski method and the float‐zone method.

10.2.1 提拉法

10.2.1 The Czochralski Method

制造硅晶块的主要技术是切克劳斯基法。波兰科学家 Jan Czochralski (1885–1953)（图 10.1）在 1915 年发明了这种方法，这比我们想到电子电路要早得多。

The main technique to manufacture a boule of silicon is the Czochralski method. Jan Czochralski (1885–1953), a polish scientist, Figure 10.1, invented this method in 1915, long, long before we thought about electronic circuits.

提拉法是生产纯硅或受控掺杂硅晶圆的首选方法。我在图 10.2中展示了该过程。我们将最纯的多晶硅材料块放入坩埚中，加热到高于硅熔点的温度，通常高于 1500°C（硅的熔点为 1412°C）。然后，我们将具有正确特性和晶体取向的小硅晶体（我们称之为种子）浸入硅熔体中，开始非常缓慢地将其拉起，同时以相反方向旋转种子和坩埚。旋转速度和垂直拉力决定了最终晶圆的直径。当硅从熔体中拉出时，表面张力将熔体保持在一起，熔体凝固并获得与种子相同的晶体特性，就像烤面包时的酵母一样。上升速度越慢，圆柱形硅棒（晶圆）就会越宽。

The Czochralski process is the favorite way to grow pure or controlled doped silicon boules. I show the process in Figure 10.2. We put into a crucible chunks of the purest polysilicon material we can get, and heat it at a temperature above the melting point of silicon, usually above 1500 °C (the melting point of silicon is 1412 °C). We then dip a small silicon crystal, that we call the seed, of the right properties and crystallographic orientation, into the silicon melt and start pulling it up very slowly at the same time that we rotate both the seed and the crucible, in opposite directions. The speed of rotation and the vertical pull determine the diameter of the final boule. As the silicon is pulled out of the melt, the surface tension holds the melt together, which solidifies and attains the same crystallographic properties as the seed, the same as the yeast in baking bread. The slower it goes up, the wider the cylindrical silicon rod, the boule, is going to be.

我们通常希望晶锭为 n 型或 p 型。在这种情况下，我们在拉晶锭时添加适当的气体，例如添加硼（用于 p 型）或添加磷（用于 n 型）。

Often we want the boule to be n‐ or p‐type. In this case we add the appropriate gasses, such as boron for p‐type or phosphorous for n‐type, as we pull the boule up.

目前，我们可以制造直径为 300 毫米（接近一英尺​​）的晶棒，目前正在研究制造直径为 450 毫米（高达一英尺半）的晶棒。直径越大，我们可以在晶圆上制造的芯片就越多，每个芯片的价格就越便宜。在 20 世纪 60 年代和 70 年代，我们对直径为 2 英寸和 4 英寸的晶棒感到满意。从熔体中取出一个这种大得多的晶棒可能需要长达三天的时间。

Currently, we can fabricate boules that are 300 mm in diameter, close to a foot, and there is research going on to fabricate a 450‐mm boule, a whopping one and a half feet in diameter. The larger the diameter the more chips we can fabricate in a wafer and the cheaper each chip is going to be. In the 1960s and 1970s we were happy with 2‐ and 4‐in. diameter boules. It may take up to three days to get one of these much larger boules out of the melt.

晶圆成型后，我们会将不平整的表面打磨成完美的圆柱体。后续工序要求晶圆的尺寸完全相同。我们制造在晶锭的一侧有一个非常小的凹口或平切口，用于在切割后识别晶片的晶体方向。我在附录 10.1中解释了此过程的原因。

Once the boule is grown, we grind the uneven surface to form a perfect cylinder. The subsequent processes require that the wafers are all exactly the same size. We make a very small notch or flat cut on one side of the boule to identify the crystallographic orientation of the wafers after they are cut. I explain the reasons for this process in Appendix 10.1.

10.2.2 流动区法

10.2.2 The Flow‐zone Method

图 10.3显示了浮区法。我们将尽可能纯净的多晶硅晶棒（深蓝色）放入真空室。多晶硅晶棒只是一根硅棒，其中的原子以随机方式排列。与 Czochralski 工艺一样，底部有一个结晶硅种子（浅蓝色）。高温射频加热器（红点）缓慢向上移动。随着加热器向上移动，它会熔化多晶硅（橙色区域），然后熔体凝固成有序的结晶晶棒（浅蓝色）。此外，由于杂质具有不同的偏析系数，我们会清除许多杂质。幸运的是，杂质更愿意留在熔化区域，而不是进入固体结晶晶棒。因此，当我们完成该过程时，我们只需切割晶棒的两端，其中杂质已经浓缩。这个过程可以重复几次，上下移动，以获得纯度越来越高的晶锭。表面张力可防止晶锭的两个固体区域，即多晶硅（深蓝色）和晶体（浅蓝色）散开，但由于重量的原因，这限制了晶锭的尺寸。整个晶锭都在真空室中，导致氧含量非常低。氧气为晶片提供强度，使它们能够承受集成电路制造所需的许多加热步骤。这也是为什么人们更喜欢 Czochralski 方法的另一个原因。

I show the float‐zone method in Figure 10.3. We place a boule of polysilicon (dark blue), as pure as we can get, in a vacuum chamber. A polysilicon boule is just a rod of silicon in which atoms are arranged in a random way. As in the Czochralski process, there is a crystalline silicon seed (light blue) at the bottom. A high‐temperature radio‐frequency heater (red dots) moves slowly up. As the heater moves up, it melts the polysilicon (orange region) and then the melt solidifies in an orderly crystalline boule (light blue). Furthermore, we sweep many impurities up due to the fact that impurities have different segregation coefficients. Luckily for us, the impurities prefer to stay in the melted region rather than move into the solid crystalline boule. So, when we finish the process, we just cut the two ends of the boule where the impurities have concentrated. The process can be repeated, going up and down a few times, to obtain higher and higher purity boules. The surface tension prevents the two solid regions of the boule, the polysilicon (dark blue) and the crystalline (light blue), from falling apart but, because of the weight, this limits the size of the boule. The fact that the entire boule is in a vacuum chamber results in very low oxygen content. Oxygen provides strength to the wafers so that they can withstand the many heating steps required for integrated circuit fabrication. That is another reason why the Czochralski method is preferred.

10.3 晶圆和外延生长

10.3 Wafers and Epitaxial Growth

晶圆完成后，我们将其切成非常薄的晶片，厚度约为 1/32 英寸。我们希望晶片非常平整，这样当我们将光学图案投射到其表面时，整个晶片都会聚焦。晶片经过机械抛光（研磨抛光）和化学抛光，然后进行清洁和检查，准备进入工艺流程。

Once the boule is completed, we slice it into very thin wafers, about 1/32 of an inch thick. We want the wafers to be very flat so that when we project the optical patterns onto its surface the entire wafer is in focus. The wafers are polished both mechanically (abrasive polishing) and chemically, then they are cleaned and inspected, ready to enter the process.

在大多数情况下，我们想要一种比晶锭所能提供的更完美的材料，并且我们想要引入不同的掺杂。为了实现这一点，我们在晶圆顶部生长外延层。外延过程包括在晶圆顶部沉积硅原子。这些原子以相同的晶体学方式粘附在抛光晶圆的表面上，在晶圆顶部添加一层层的原子。现在整个晶圆充当种子，我们可以更好地控制外延层的质量。这些外延层通常非常薄，在 1 到 4 μm 之间。层越薄，含有杂质或晶体缺陷的可能性就越小。在某些情况下，例如我在第 4 章中讨论的长波红外探测器，我们需要非常厚的外延层，这样穿过该层的光子才有更好的机会被吸收。我们已经生长出厚达 40 μm 的层，但这并不容易。

In most cases we want a more perfect material than the boules can provide and we want to introduce different dopings. We grow epitaxial layers on top of the wafers to achieve this. The epitaxial process consists of depositing silicon atoms on top of the wafers. These atoms adhere to the surface of the polished wafer in the same crystallographic manner, adding layers of atoms on top of the wafer. Now the entire wafer acts as the seed and we have much better control over the quality of the epitaxial layers. These epitaxial layers are usually very thin, between 1 and 4 μm. The thinner the layer, the less likely it is to have impurities or crystallographic imperfections. In some cases, such as the long wave infrared detectors I discussed in Chapter 4, we need very thick epitaxial layers so the photons crossing the layer have a better chance of being absorbed. We have grown layers as thick as 40 μm, but this isn't easy.

我主要讨论的是硅工艺。你可以想象，生产其他半导体材料（如 GaAs 或 HgCdTe）要复杂得多。不过，从理论上讲，这些工艺大致相同。

I have concentrated on talking about the silicon process. You can imagine that growing other semiconductor materials, such a GaAs or HgCdTe, is considerably more complex. Nevertheless, the processes are, in theory, about the same.

10.4 光刻

10.4 Photolithography

现在到了最有趣的部分。我们如何在这些完美、平坦且干净的晶圆上制作电路呢？

Now comes the fun part. How do we fabricate a circuit on these pristine, perfectly flat and clean wafers?

有一道老谜语，问你如何用双筒望远镜、镊子和罐子抓住一头大象。如果你想思考答案，请在此处停止阅读。你转动双筒望远镜并从错误的方向看。大象现在非常小，所以你用镊子把它夹起来，然后扔进罐子里！但说真的，费尔柴尔德的罗伯特·诺伊斯（1927-1990）（图 10.4）也有类似的想法，他知道如何利用光学器件从一张小的照相底片制作出非常大的照片。他灵光一现，意识到他可以反向使用相同的过程，也就是说，他可以从一幅大画中制作出一张非常小的底片，并使用该底片制造设备。

There is an old riddle that asks how you would catch an elephant with binoculars, tweezers, and a jar. Stop reading at this point if you want to think about the answer. You turn the binoculars around and look through them the wrong way. The elephant is now very small, so you pick him up with the tweezers, and drop him into the jar! But seriously, Robert Noyce (1927–1990) (Figure 10.4) at Fairchild had a similar idea, knowing how, from a small photographic negative, using optics, you can create a very large print. His eureka moment was to realize that he could use the same process in reverse, that is, from a large drawing he could make a very small negative and use that negative to fabricate devices.

20 世纪 60 年代，我在研究半导体时，有一项实验室练习是制作晶体管。我使用了红宝石，这是一种透明材料，上面覆盖着一层红色的薄片。在一块大的红宝石薄片（1 × 1 平方米）上，^我画出了想要投射到半导体上的形状材料。我用 X‐acto 刀将红色纸张上的条纹去除，留下一个有透明和不透明区域的图案。使用与暗室中非常相似的设备，我制作了一个小的（~1 × 1 平方厘米^）底片。我用这个底片在硅片上制作晶体管。这是一个 5 厘米的晶片！

When I was studying semiconductors in the 1960s, one laboratory exercise was to fabricate a transistor. I used rubylith, a transparent material covered by a red sheet. On a large rubylith sheet (1 × 1 m²) I drew the shape I wanted to project onto the semiconductor material. With an X‐acto knife, I removed strips of the red sheet, leaving a pattern with transparent and opaque regions. Using equipment very similar to that found in a darkroom, I created a small (~1 × 1 cm²) negative. I used that negative to fabricate my transistor on a silicon wafer. It was a 5 cm wafer!

硅除了是地球上第二丰富的元素之外，还具有许多其他优点。它相对容易制造出半导体器件所需的纯度。砷化镓具有优异的性能，例如噪声比硅低、迁移率更高，但用它制造非常纯净的晶片要困难得多，成本也高得多。它的用途仅限于非常特定的应用，例如超高射频、激光和超快电子开关。

Silicon, in addition to being the second most abundant element on earth, has many other advantages. It is relatively easy to fabricate with the purity needed for semiconducting devices. Gallium arsenide has excellent properties, such as lower noise and higher mobility than silicon, but it is much more difficult and expensive to fabricate very pure wafers from it. Its use is restricted to very specific applications, such as ultra‐high radio frequencies, lasers, and ultra‐fast electronic switches.

硅还有一种天然氧化物 SiO ₂，​​它具有高度绝缘性（GaAs 不具有这种绝缘性），并且具有与硅相似的晶体结构，因此它在硅上的生长不会破坏硅的结构。使用热氧化法（Si + O ₂ = SiO ₂）也非常容易生长。它一次只生长一层，非常均匀，因此它不仅可以提供绝缘，还可以保护硅本身。我在这里介绍 SiO ₂是因为它是集成电路制造不可或缺的一部分。

Silicon has also a natural oxide, SiO₂, that is highly insulating (GaAs is not) and has a crystallographic structure similar to that of silicon so that its growth over the silicon does not corrupt the silicon structure. It is also very easy to grow using thermal oxidation (Si + O₂ = SiO₂). It grows one layer at a time, very uniformly, so it not only provides insulation, but it also protects the silicon itself. I introduce SiO₂ here because it is an integral part of the fabrication of integrated circuits.

10.5 在硅晶片上制作 PNP 晶体管

10.5 The Fabrication of a pnp Transistor on a Silicon Wafer

现在我们已经掌握了几乎所有的关键元件，让我来解释一下如何制作集成电路。假设我们要制造一个简单的 pnp 晶体管。我在图 10.5中显示了要制造的晶体管的横截面，并在图 10.6中显示了同一晶体管的顶视图。

Now that we have almost all the key elements, let me explain how we make integrated circuits. Suppose we want to fabricate a simple pnp transistor. I show the cross‐section of the transistor I want to build in Figure 10.5 and the top view of the same transistor in Figure 10.6.

图 10.5显示的是我们所说的平面硅技术，因为器件的表面是平的。您将看到晶体管由 p（蓝色）层和 n（黄色）层相互叠置而成。下层（浅蓝色表示 p 型）是集电极，它只是我们在支撑晶片顶部沉积了 p 型外延层。外延层（黄色代表 n 型）上方是基极，发射极是第三层，由 p 型半导体（也是浅蓝色）制成，位于基极上方。请注意，在表面我们有深蓝色和深黄色的岛。为了形成良好的接触，我们更喜欢高掺杂材料，p+（深蓝色）和 n+（深黄色），+ 号表示我们有高掺杂材料。这有利于半导体和金属之间的电荷转换，并避免非常突然的连接。最后，顶部的黑色方块是铝金属焊盘，用于将此设备连接到其他设备或用于键合线的焊盘。这些焊盘允许我们将其他组件连接到集电极（C）、基极（B）和发射极（E）。图 10.6显示了将此晶体管连接到其他设备的铝线。

What Figure 10.5 shows is what we call planar silicon technology because the surface of the device is flat. You will recognize the transistor with p (blue) and n (yellow) layers one on top of each other. The lower layer (light blue for p‐type) is the collector, which is just the p‐type epitaxial layer that we have deposited on top of the supporting wafer. Above the epitaxial layer (yellow for n‐type) is the base, and the emitter is the third layer, made of p‐type semiconductor (also in light blue), on top of the base. Notice that at the surface we have darker blue and darker yellow islands. To make good contacts we prefer a highly doped material, p+ (dark blue) and n+ (darker yellow), the + sign indicating that we have highly doped materials. This facilitates the transition of charges between the semiconductor and the metal, and avoids very abrupt junctions. Finally, the black squares on top are aluminum metallic pads that connect this device to other devices or to a pad for bonding wires. These pads allow us to connect other components to the collector (C), the base (B), and the emitter (E). Figure 10.6 shows the aluminum lines that connect this transistor to other devices.

现在，让我们按照该流程来制造这个晶体管（图10.7）。

Now, let's follow the process to fabricate this transistor (Figure 10.7).

1. 我们从 ap 型基板开始。典型晶圆的厚度在 0.3 至 0.8 毫米之间（这就像披萨中的面团，足够厚以容纳所有配料）。
2. We start with a p‐type substrate. The thickness of a typical wafer is between 0.3 and 0.8 mm (this is like the dough in a pizza, thick enough to handle all the toppings).
3. 在衬底顶部，我们外延生长出一个更干净的 p 型区域，其中包含所需数量的 p 型杂质（通常是硼）。外延层厚度在 1 到 4 μm 之间（这是披萨比喻中的番茄酱）。
4. On top of the substrate, we epitaxially grow a much cleaner p‐type region with the desired amount of p‐type impurities, usually boron. The epitaxial layer is between 1 and 4 μm thick (this is the tomato paste in the pizza analogy).
5. 在外延层顶部，我们生长一层氧化物层 SiO ₂（红色）。为此，我们将晶圆放入炉中，加热至 1000 °C 左右，同时将氧气引入炉腔。

   

   

6. On top of the epitaxial layer we grow an oxide layer, SiO₂ (in red). To do this, we place the wafer in a furnace and heat it to around 1000 °C while introducing oxygen into the chamber.

7. _{我们在 SiO 2}上面沉积一层光刻胶（图 10.7中的紫色层）。光刻胶是一种感光材料。光刻胶有正性和负性之分。正性光刻胶在光照下会溶解。负性光刻胶则相反。负性光刻胶性能更好，使用更频繁。为了避免混淆，本章中我将仅使用正性光刻胶。
8. On top of the SiO₂ we deposit a photoresist (the violet layer in Figure 10.7). The photoresist is a light‐sensitive material. There are positive and negative photoresists. The positive photoresist dissolves when we shine light on it. The negative photoresist does the opposite. The negative photoresist has better properties and is used more often. To avoid confusion, I will use only positive photoresist in this chapter.
9. 现在我们应用第一个掩蔽步骤（图 10.8）。
10. Now we apply the first masking step (Figure 10.8).

我在图 10.8的左上角显示了我们使用的第一个掩模。它显示了一个透明的正方形，周围是一个不透明的区域，其尺寸与我们要创建的 n 型区域（黄色）完全相同。我们将这个掩模放在晶圆的顶部（右上）并用光照射它。被照射的正性光刻胶部分被酸化，使其可溶于碱性溶液。我在图 10.9中显示了结果。

I show the first mask we use at the top left of Figure 10.8. It shows a transparent square surrounded by an opaque area with the exact dimensions as the n‐type region (yellow) we want to create. We place this mask on top of the wafer (top right) and shine a light on it. The portion of the positive photoresist that is illuminated is acidified, making it soluble in an alkaline solution. I show the result in Figure 10.9.

现在，我们使用氟化铵等蚀刻溶液去除打开的光刻胶窗口下的氧化物。清洁并去除多余的光刻胶后（图 10.10），我们就可以制作 n 型基极了。

Now we remove the oxide under the open photoresist window with an etching solution such as ammonium fluoride. After we clean and remove the extra photoresist (Figure 10.10) we are ready to fabricate our n‐type base.

10.6 关于兴奋剂的题外话

10.6 A Digression on Doping

现在我们已经打开了光刻胶窗口，我想讨论一下我们可以通过掺杂（即添加所需的杂质）局部改变半导体电气特性的方法。这与晶圆不同，在晶圆中我们希望整个晶圆都具有 p 型或 n 型杂质，并且浓度非常均匀。现在我们只想影响我们打开的区域。我们希望将窗口下的杂质浓度从 p 型改为 n 型。进行局部掺杂有两种方法：热扩散和注入。

Now that we have the photoresist window open, I want to discuss the ways we can locally change the electrical characteristic of the semiconductor by doping, that is, adding the desired impurities. This is different from the boule, where we wanted the entire boule to have either p‐ or n‐type impurities with a very uniform concentration. Now we want to just affect the region that we have opened. We want to change the impurity concentration under the window from p to n. There two ways of doing localized doping: thermal diffusion and implantation.

10.6.1 热扩散

10.6.1 Thermal Diffusion

在热扩散情况下，我们将晶圆放在腔体中，加热晶圆，并引入我们想要用来掺杂晶圆开放区域的气体。图 10.11显示了我们想要使用扩散将 n 型杂质添加到开放区域的情况。

In the thermal diffusion case, we place the wafer in a chamber, heat the wafer, and introduce the gas we want to use to dope the open region of the wafer. Figure 10.11 shows the case where we want to add n‐type impurities into the open area using diffusion.

当我们使用扩散系统时，每个原子层中的 n 型杂质原子数量并不恒定。顶面的杂质原子数量总是比外延层内部的多，但一般来说，这不是问题，因为我们希望在 p 型外延层（蓝色）和 n 型基极（黄色）之间形成 np 型结。此外，由于扩散的工作方式，杂质会在氧化物（红色）下扩散。n 型杂质在 p 型外延层内部的扩散程度主要取决于晶圆的温度以及晶圆在气体下停留的时间。温度越高，杂质原子扩散到晶圆中的速度越快，暴露时间越长，杂质原子进入的越远。典型的 n 型杂质是磷、砷和锑，它们都是五价材料，但对于 p 型材料，掺杂仅限于硼。

When we use the diffusion system, the number of n‐type impurity atoms is not constant in each atomic layer. We are always going to have more impurity atoms at the top surface than inside the epitaxial layer, but, in general, that is not a problem since we want an np‐type junction between the p‐type epitaxial layer (blue) and the n‐type base (yellow). Also, because of the way diffusion works, impurities will diffuse under the oxide (red). How far the n‐type impurities go inside the p‐type epitaxial layer depends primarily on the temperature of the wafer and how long the wafer stays under the gas. The higher the temperature the faster the impurity atoms diffuse into the wafer, and the longer it is exposed the farther the impurity atoms will go in. Typical n‐type impurities are phosphorous, arsenic, and antimony, which are all valance five materials, but for p‐type material the doping is restricted to boron.

这不是我们唯一一次将晶圆放入热炉中，当我们经历不同的热循环时，扩散的杂质会趋于移动并进一步扩散。图 10.12显示了这种效果。

This is not the only time that we will place the wafers in a hot oven and as we go through different thermal cycles the diffused impurities will tend to move and diffuse still more. Figure 10.12 shows this effect.

图 10.12中的曲线 a显示了我们完成沉积后的杂质分布，表面浓度最高，但经过多次后续热处理后，表面杂质减少（曲线 b），杂质原子进一步扩散到 p 型外延层中。杂质原子的总数相同，但分布不同。工艺工程师在计算要使用多少时间和杂质流量时必须考虑这些未来的加热步骤。

Curve a in Figure 10.12 shows the distribution of impurities after we finish the deposition, the largest concentration at the surface, but after many other subsequent heat treatments the impurities at the surface decrease (curve b) and the impurity atoms diffuse further into the p‐type epitaxial layer. The total number of impurity atoms is the same, but the distribution is different. The process engineer must consider these future heating steps when calculating how much time and what impurity flow to use.

10.6.2 植入

10.6.2 Implantation

第二种掺杂方法是注入。随着集成电路中的元件越来越小，我们需要找到在越来越小的空间中插入受控杂质的方法。正如我之前提到的，扩散方法将杂质送到氧化物下面。因此，我们需要在器件之间留出足够的空间，以确保一个器件中的杂质不会进入在氧化物下迁移并与相邻器件接触。此外，大多数掺杂剂都在表面（见图10.12），那里有最多的缺陷和不需要的杂质。图 10.13显示了离子注入机的非常简化的示意图。离子注入机的原理与有人用 BB 枪向软目标射击相同。BB 的速度或动能决定了它们穿透目标的程度。

The second doping method is implantation. As components in an integrated circuit become smaller and smaller, we need to find ways to insert controlled impurities in tinier and tinier spaces. As I mentioned before, the diffusion method sends impurities under the oxide. Thus, we need sufficient space between devices to ensure that none of the impurities in one device migrate under the oxide and make contact with an adjacent device. Additionally, the majority of the dopants are at the surface (see Figure 10.12), where there are the most imperfections and unwanted impurities. Figure 10.13 shows a very simplified diagram of an ion implanter. The idea of the ion implanter is the same as someone shooting a BB gun into a soft target. The speed, or kinetic energy, of the BBs determines the extent to which they penetrate the target.

注入机由离子源组成。离子是带电（正或负）原子。我们只希望将 p 型或 n 型杂质沉积到晶圆中。离子通过磁铁发送，由于原子具有不同的质量，磁铁会将不同的离子分开，只让我们想要的原子通过，并阻挡不需要的原子。这个 90° 磁铁与质量分析仪相同。根据粒子的电荷和质量，它们会以不同的角度弯曲。不需要的粒子会撞击质量分析仪的壁。

The implanter consists of a source of ions. Ions are charged (positive or negative) atoms. We want only the p‐ or n‐type impurities to be deposited into the wafer. The ions are sent through a magnet that, because atoms have different masses, separates the different ions, letting only the atoms we want go through and blocking the unwanted ones. This 90° magnet is the same as a mass analyzer. Depending on the charge and mass of the particles, they bend at different angles. The unwanted ones hit the wall of the mass analyzer.

下一步是加速离子并将它们聚焦到我们想要植入的区域。根据植入器的类型，我们将离子加速从数千到数百万电子伏。我们扫描光束，以便覆盖整个晶圆，并植入晶圆中所有无氧化物的表面。晶圆放在可移动的支架上，因此可以通过移动晶圆以机械方式进行扫描，也可以通过改变光束方向以光学方式进行扫描，或者两者兼而有之。当一个晶圆完成后，另一个晶圆会自动移动到位。

The next step is to accelerate the ions and focus them onto the region we want to implant. We accelerate the ions from thousands to millions of electron‐volts depending on the type of implanter. We scan the beam so that the entire wafer is covered and all the oxide‐free surfaces in the wafer are implanted. The wafers sit in holders that move, so the scanning can be done mechanically by moving the wafers or optically by changing the direction of the beam, or both. When one wafer is completed, another automatically moves into place.

植入晶圆中的杂质分布与扩散法中的杂质分布不同（图 10.14）。正如您所预料的，掺杂杂质的最高浓度不再位于表面，而是位于材料内部，具体取决于光束能量（曲线 a）。在任何后续热处理之后，浓度都会扩散到晶体管主体中，分布趋于平缓（曲线 b）。杂质原子的总数保持不变。

The distribution of impurities in an implanted wafer is different from that in the diffuse method (Figure 10.14). As you would expect, the highest concentration of dopant impurity is no longer at the surface but inside the material, depending on the beam energy (curve a). After any of the subsequent heat treatments, the concentration diffuses into the body of the transistor and the distribution flattens out (curve b). The total number of impurity atoms remains the same.

高速原子轰击半导体表面会损坏表面。因此，最后一步是对表面进行退火，我们通常在 700 至 1000°C 之间加热表面。这比硅的熔点 (1414°C) 低得多，因此表面质量得以恢复，而不会像扩散法那样扩散氧化物下的杂质。这也是为什么植入是首选方法的另一个原因。

The bombarding of the surface of the semiconductor with high‐speed atoms damages the surface. The final step is therefore to anneal the surface, which we typically do while heating it at between 700 and 1000 °C. This is considerably lower than the melting point of silicon (1414 °C) so the surface quality is restored without diffusing the impurities under the oxide, as happens with the diffusion method. This is one more reason why implantation is the preferred method.

使用离子注入机，我们在 n 型基极上制作 p 型发射极。光刻工艺与之前解释的相同（图 10.15）。

Using an ion implanter, we fabricate the p‐type emitter on top of the n‐type base. The photolithographic process is the same as explained before (Figure 10.15).

现在，掩模版中的开口（左侧）比基极的开口要小，定义了我们想要的基极内部的较小的 p 型区域。正如我们对 n 型所做的那样扩散基极之前，我们首先在整个晶圆上生长氧化物，然后用光刻胶覆盖。我们将掩模放在晶圆顶部，照亮晶圆，去除酸化光刻胶，然后用显影剂和蚀刻剂去除暴露的 SiO ₂和剩余的光刻胶。这会打开我们想要更改为 p 型的区域，这次使用离子注入机。这样就完成了晶体管的制造。

The opening in the mask (on the left) is now smaller than the one we had for the base, defining the smaller p‐type region that we want inside the base. As we did with the n‐type diffusion of the base, we first grow the oxide on the entire wafer and then cover it with photoresist. We place the mask on top of the wafer, illuminate it, remove the acidified photoresist, and remove the exposed SiO₂ and the remaining photoresist, with developer and etching. This opens the region we want to change to p‐type, this time using an ion implanter. This completes the fabrication of the transistor.

10.7 恢复晶体管处理

10.7 Resume the Transistor Processing

10.7.2 金属化

10.7.2 Metallization

我们工艺的最后一步是金属化。保持接触孔打开，现在我们用一层薄薄的金属覆盖整个晶圆，即图 10.17中的黑色层。图 10.18显示了我们用来定义导电线的掩模层。

The final step in our process is metallization. Leaving the contact holes open we now cover the entire wafer with a thin layer of metal, the black layer in Figure 10.17. Figure 10.18 shows the mask layer we use to define the conductive lines.

铝掩模不仅连接了所有与相同晶体管功能相关的接触点，而且还提供了更大的区域，因此我们有足够的面积来焊接外部电线。

The aluminum mask not only connects all the contact points going to the same transistor function, but also provides a larger region so we have enough area to solder the external wires.

10.7.3 多重互连

10.7.3 Multiple Interconnects

^{关于互连的最后一件事。目前，我们可以在1}平方厘米的芯片中制造多达 10 亿个晶体管，大约是标准邮票大小的四分之一。正如 Larry Zaho 在一篇关于互连的文章 ( https://semiengineering.com/all-about-interconnects ) 中提到的那样，要连接所有这些设备，需要相当于 30 英里长的电线。我们不可能用单层铝来做到这一点。图 10.19显示了其中一些互连级别。

One final thing on interconnects. Right now, we can fabricate as many as one billion transistors in a 1‐cm² chip, about a quarter of a size of a standard postage stamp. As Larry Zaho mentions in an article on interconnects (https://semiengineering.com/all‐about‐interconnects), to make contact with all of these devices requires an equivalent of 30 miles of wires. We can't possibly do this with a single aluminum layer. Figure 10.19 shows some of these levels of interconnection.

底部是单个晶体管和其他电子元件。晶体管上方是局部互连线。这些线通常是细而短的线。在局部互连线上方是全局互连线，更厚更长。每一层都需要重复我上面解释的相同金属化工艺。并非所有层都是金属的。其中一些使用高掺杂多晶硅。

At the bottom there are the individual transistors and other electronic components. Above the transistors are the local interconnects. These are usually thin and short lines. Above those, there are the global interconnects, thicker and longer. Each layer requires the repetition of the same metallization process I explain above. Not all the layers are metallic. Some of them use highly doped polysilicon.

10.8 其他部件的制造

10.8 Fabrication of Other Components

为了偏置和使用晶体管，我们还需要电阻器和电容器。我们使用与制造晶体管相同的技术来制造它们。

In order to bias and use the transistors, we need also resistors and capacitors. We use the same techniques to fabricate them as we use to build transistors.

10.8.1 集成电阻

10.8.1 The Integrated Resistor

图 10.20显示了电阻器的制造过程。

Figure 10.20 shows the process of fabricating a resistor.

图 10.20 A 显示了电阻的横截面。它看起来非常像我们已经制造的晶体管。我们使用 n 型区域（黄色）作为隔离岛。在顶部，我们像晶体管一样植入 p 型区域（浅蓝色）和顶部 p 型区域两端的两个 p+ 区域，以前是发射极触点（深蓝色）。我们用铝触点覆盖它。我们制造了与外延衬底隔离的电阻路径（图 10.20 B）。该电阻的值取决于我们对 p 型区域的掺杂程度。如果我们想要高电阻，我们使用轻掺杂。我们做相反的事情，高掺杂，如果我们想要低电阻，则使用低掺杂。我们还可以改变线的厚度和长度，如图10.20 C 所示，在这个特定示例中使电阻高出三倍。

Figure 10.20A shows the cross‐section of a resistor. It looks very much like the transistor that we have already fabricated. We use the n‐type region (yellow) as an isolation island. On top we implant, as we did with the transistor, a p‐type region (light blue) and two p+ regions at the two ends of the top p‐type region, what used to be the emitter contact (dark blue). We cap this with aluminum contacts. We have fabricated a resistive path isolated from the epitaxial substrate (Figure 10.20B). The value of this resistor depends on how high, or low, we dope the p‐type region. If we want a high resistance, we use light doping. We do the opposite, high doping, if we want low resistance, and use low doping. We also have the ability to change both the thickness and the length of the line, as I show in Figure 10.20C, making the resistance three times higher in this particular example.

使用多晶硅层制造电阻器也很常见，但这是一个不同的过程。我们必须沉积多晶硅层，然后像蚀刻金属一样进行蚀刻。我们已经在一些多层连接层中使用了多晶硅层，因此我们不需要额外的步骤来将这些层之一用作电阻器。

It is also common to fabricate resistors using a polysilicon layer, but this is a different process. We have to deposit a polysilicon layer and then etch as we did with the metal. We already use polysilicon layers in some multilevel connecting layers, thus we do not need an extra step to use one of these layers as a resistor.

还有另一种制造电阻的方法，即使用位于衬底顶部的外延层。尽管两者都是 p 型材料，但衬底的电阻率几乎总是比外延层高得多。诀窍是在非常薄的外延层上蚀刻出一个围绕电阻的沟槽，以确定其面积（图 10.21）。

There is also another way of fabricating a resistor by using an epitaxial layer which sits on top of the substrate. Even though both are p‐type materials, the substrate almost always has a much higher resistivity than the epitaxial layer. The trick then is to etch in the very thin epitaxial layer a trench all around the resistor to define its area (Figure 10.21).

在隔离区域的两端，我们像之前一样创建了 p+ 触点和金属触点。隔离蚀刻孔（我现在说的是真正的孔，而不是带电的孔）也经常用于隔离晶体管等其他设备。

At the two ends of the isolated area, as we have done before, we create a p+ contact and a metal contact. Isolation etched holes (and now I am talking about real holes, not electronically charged holes) are also used quite often to isolate other devices like transistors.

10.8.3 集成电感

10.8.3 The Integrated Inductor

使用集成工艺制造电感器并不容易。频率越高，电感器需要越小。对于远高于 1 GHz 的超高频率，我们可以使用螺旋图案，这种图案可以嵌入到芯片中（图 10.23）。最常见的形状是矩形（图 10.23 A）或圆形螺旋。请注意，我们需要两层金属，因为图 10.23 A右侧的触点必须与形成螺旋的金属线交叉，但不能短接。图 10.23 B 显示了顶部有交叉的圆形金属线，而不是螺旋结构，这可以有多个金属圈，而不仅仅是我所示的两个。这提供了更对称的磁场。最后，我们还可以有几层，正如我在图 10.23 C 中所示，这样我们就可以在更小的空间中获得更高的电感。由于目前的加工线已经有四、五层或更多的金属化层，这种多层工艺可以在不占用太多空间的情况下增加电感。大多数手机的工作频率在 0.8 到 2.1 GHz 之间，因此它们可能会使用其中一种嵌入式电感器。对于较低的频率，电感器太大而无法与其他电子设备集成。

There is no easy way to fabricate inductors using the integrated process. The higher the frequency, the smaller the inductor needs to be. For very high frequencies, well above 1 GHz, we can use spiral patterns, which can be imbedded into a chip (Figure 10.23). The most common shape is the rectangular (Figure 10.23A) or circular spiral. Notice that we need two levels of metal since the contact to the right of Figure 10.23A has to cross, but not short, the metal lines that form the spiral. Figure 10.23B shows circular metal lines with a crossover on top instead of the spiral formation, and this can have several metal circles, not just the two I show. This provides a more symmetrical magnetic field. Finally, we can also have several layers, as I show in Figure 10.23C, so we can have a higher inductance in a smaller space. Since the present processing lines already have four or five or more levels of metallization, this process of multiple layers increases the inductance without occupying too much space. Most mobile phones work with frequencies between 0.8 and 2.1 GHz, so they may use one of these imbedded inductors. For lower frequencies the inductors are too big to be integrated with other electronic devices.

10.9 测试和包装

10.9 Testing and Packaging

晶圆完成加工后，我们必须测试每个芯片，以确保没有导致芯片无法运行的缺陷或瑕疵。图 10.24中展示了一个经过完整加工的晶圆，图 10.25中展示了一个探针测试仪。测试仪握住晶圆和一些非常小的探针（图 10.25右侧），这些探针将测试仪连接到每个芯片的重要焊盘，以确定其功能。如果芯片有缺陷，测试仪会在特定的坏芯片顶部放置一个墨点。

Once the wafers have completed the processing, we have to test each die to see that there are no defects or imperfections that makes the die inoperable. I show a full processed wafer in Figure 10.24 and in Figure 10.25 I show a probe tester. The tester holds the wafer and some very tiny probes (right of Figure 10.25) that connect the tester to the important pads of each die that determine its functionality. If the die is defective, the tester deposits an ink dot on top of the specific bad die.

下一步是用金刚石锯切割晶圆并分离骰子。我们丢弃带点的骰子，并将好的骰子放在交易台上。然后对它们进行检查并送去包装。

The next step is to saw the wafers with a diamond saw and separate the dice. We discard the dice that have a dot and place the good dice on a trade. They are them inspected and sent for packaging.

这些电子设备的封装方式有很多种。我们必须考虑多种特性，以确定哪种封装方式最好，包括引线数量、产生的热量、对热或辐射的脆弱性，以及这些精密芯片的物理保护。

There are many different ways of packaging these electronic devices. We have to consider many properties that determine which is the best packaging, the number of leads, the heat generated, the vulnerability to heat or radiation, and the physical protection of these delicate chips.

图 10.26显示了晶体管和二极管等单个器件的封装。典型的单个晶体管封装（图 10.26 A 和 B）具有用于发射极、基极和集电极的三根引线。图 10.26 C 和 D 显示了功率器件的封装。两者都可以用螺栓固定在金属底盘上，有助于散热。请注意，图 10.26 D 中的电源封装只有两个用于发射极和基极触点的引线。主体本身是与集电极的触点，集电极接地。

Figure 10.26 shows the packaging of single devices like transistors and diodes. The typical single transistor package (Figure 10.26A and B) has the three leads for the emitter, base, and collector. Figure 10.26C and D shows packages for power devices. Both can be bolted into a metallic chassis that helps dissipate the heat. Notice that the power package in Figure 10.26D has only two leads for the emitter and base contacts. The body itself is the contact to the collector, which is grounded.

随着输入和输出的复杂性和数量的增加，封装也变得更加复杂。图 10.27显示了运算放大器等电子元件的常见封装方式。芯片牢固地固定在封装的中心，然后用细铝线或金线将芯片的焊盘连接到外部引线。然后，我们可以将封装放在主板上并焊接引线。

As the complexity and number of inputs and outputs increases, packaging has also become more complex. Figure 10.27 shows a very common way of packaging electronic components such as operational amplifiers. The chip is firmly attached at the center of the package and then thin aluminum or gold wires connect the chip's pads to the external leads. We can then place the package on a motherboard and solder the leads.

对于更复杂的电路，例如处理器或存储器，我们使用具有 100 个或更多触点的封装（图 10.28）。

For much more complex circuits, such as processors or memories, we use packages with 100 or more contacts (Figure 10.28).

最后，为了完成封装主题，还有倒装芯片接合。当我们拥有具有大量输入和输出的芯片，需要将其连接到包含其他类型电路的另一个芯片时，我们会使用倒装芯片接合。例如，这种情况发生在许多光学红外设备中，其中探测器由一种材料制成（汞镉碲酸盐或铟锑酸盐，参见第 4 章），电子元件则制造在硅晶片上。每个探测器像素都必须连接到其等效电子输入放大器。倒装芯片封装还可用于在硅芯片和陶瓷主板之间建立许多连接。

Finally, just to complete the topic of packaging, there is flip‐chip bonding. We use this when we have chips with lots of inputs and outputs that are to be connected to another chip containing other type of circuits. This happens, for example, in many optical infrared devices where the detectors are made of one material (mercury‐cadmium‐tellurite or indium‐antimonite, see Chapter 4) and the electronics are fabricated on silicon wafers. Each detector pixel has to be connected to its equivalent electronic input amplifier. Flip‐chip packaging can also be used to make many connections between the silicon chip and a ceramic motherboard.

图 10.29左侧显示了倒装键合概念。我们有两片晶圆，上面有大量电池，每片晶圆上有多达一百万个电池，这些电池必须逐个连接到另一个芯片。图 10.29右侧显示了这些金属凸块的示意图。凸块之间的距离仅为 20 微米。通常，硅片之间的接触集成电路和主板比探测器技术少得多，因此垫片和金属烧蚀可以更大。

Figure 10.29 shows on the left the flip bonding concept. We have two wafers with a large number of cells, as many as a million cells in each wafer, that have to be connected cell to cell to another chip. A diagram of these metallic bumps is shown on the right of Figure 10.29. The distance separating the bumps is just 20 μm. Usually the contacts between a silicon integrated circuit and the motherboard are much fewer than in detector technology so the pads and metal bums can be larger.

10.10 洁净室

10.10 Clean Rooms

最后，我要提一下洁净室。为了帮助直观地了解超洁净室在处理集成电路方面的需求，我们假设较新的处理器芯片约为 5 cm2 ^，包含 1 × 10 ^{10 个}晶体管（10 000 000 000）以及所有附带设备和铝连接。简单的换算可以告诉你，每个晶体管必须占用小于 5 × 10 ⁻¹⁰ cm2^的面积。图 10.30将现代处理中最小设计规则的尺寸与典型粒子的尺寸进行了比较。

Finally, I will mention something about clean rooms. To help visualize the need for ultraclean rooms to process integrated circuits, consider that the newer processor chips are about 5 cm² and contain 1 × 10¹⁰ transistors (10 000 000 000) plus all the accompanying devices and aluminum connections. Simple conversion tells you that each transistor must occupy an area smaller than 5 × 10⁻¹⁰ cm². Figure 10.30 compares the size of the minimum design rules in modern processing to those of typical particles.

最小设计规则决定了两个电气元件（例如铝线、触点、p 型或 n 型区域或器件的许多固定装置）之间允许的最小距离。目前，典型的最小设计规则约为 0.25 μm。图 10.30将最小设计规则与人类头发的直径（比最小设计规则大 300 倍）或甚至指纹（大约大 10 倍）进行了比较。您可以看到，如果这些漂浮颗粒停留在其中一个晶圆上，或者更糟的是，如果它们落在掩模上，它们中的任何一个都可能造成损坏。整个批次可能需要多达 50-200 个处理步骤、15-30 个光刻板和三个月的工作，但一个指纹可能会完全毁掉！

Minimum design rules determine the minimum distance allowed between two electrical components such as aluminum lines, contacts, p‐ or n‐ type regions or any of the many fixtures of the devices. Right now, typical minimum design rules are about 0.25 μm. Figure 10.30 compares the minimum design rules with the diameter of a human hair (300 times larger than the minimum design rules) or even a fingerprint (about 10 times larger). You can see the damage that any of these floating particles can cause if they sit on one of the wafers, or worse still if they fall on a mask. The entire lot, which may take as many as 50–200 processing steps, 15–30 photolithographic plates and three months of work can be totally destroyed by a fingerprint!

晶圆加工过程中产生的杂质和缺陷成本极高。举个例子，一块没有缺陷的 100 平方毫米晶圆的成本为 1 美元。如果每平方厘米有一个缺陷^，成本将增加 3 倍。如果有两个缺陷，成本将增加 10 倍。这些晶圆尺寸相对较小。对于一块 200 平方毫米^晶圆，同样假设没有缺陷时成本为 1 美元，如果每平方厘米有一个缺陷，成本将增加 10 倍，^{如果每平方}厘米有两个缺陷，成本将增加 25 倍。我们现在使用的是 300 平方毫米^晶圆，因此您可以看到保持实验室超超洁净的重要性。

Impurities and defects in processing wafers are extremely expensive. To give you an idea, a 100 mm² wafer with no defects costs, say, 1. If I have one defect per cm², the cost goes up by a factor of 3. If I have two defects the cost goes up by a factor of 10. These are relatively small size wafers. For a 200 mm² wafer, again assuming the cost to be 1 if there are no defects, the cost increases by a factor of 10 if we have one defect per cm² and by a factor of 25 if we have two defects per cm². We work now with 300 mm² wafers so you can see how important is to keep laboratories ultra‐super clean.

制程良品率是良好裸片数除以裸片总数的比率。请看图 10.31。三块晶圆的缺陷数都相同，都是 5 个，而且缺陷位置也相同。每块晶圆上的芯片大小各异。左边是小芯片。我数了数，有 196 个芯片，其中 5 个受损。该晶圆的良品率是 (196 - 5)/196 或 97.5%。如果芯片大四倍，良品率就是 41/49 或 90%。如果我把芯片做得更大，就像图 10.31右边的情况一样，良品率现在就降到 11/16 或 69%，也就是说，我必须丢弃大约三分之一的裸片。

The process yield is the ratio of good dice divided by the total number of dice. Take a look at Figure 10.31. All three wafers have the same number of defects, that is, five, and they are located in the same place. The chips on each of the wafers have different sizes. On the left we have small chips. I count 196 chips and 5 of them are damaged. The yield of the wafer is (196 – 5)/196 or 97.5%. If the chip is four times larger, the yield is 41/49 or 90%. If I make the chip larger still, the situation on the right of Figure 10.31, the yield now goes down to 11/16 or 69%, that is, I have to discard about one‐third of the dice I fabricate.

为了保持这些洁净室“电子”洁净，我们使用层流系统，如图10.32所示。空气经过多个过滤器后，均匀地向下流动，尽可能避免湍流（人们移动、桌子和其他物体可能会产生大量湍流）。此外，工作站有自己的吹风系统。空气从工作站顶部流出，从桌子前面流出，不允许任何漂浮在空气中的物质进入工作站。空气穿过地板，经过几个精密的过滤器，然后再循环。

To keep these clean rooms “electronically” clean we use laminar flow systems, as I show in Figure 10.32. After the air goes through many filters it then flows uniformly down, avoiding as many turbulences as possible (people moving, tables, and other objects can create a lot of turbulence). Additionally, workstations have their own clean‐blowing systems. The air flows from the top of the station and out of the front of the table, not allowing anything floating in the air to go inside the station. The air goes through the floor, passes several fancy filters, and is then recirculated.

洁净实验室的两侧和外面设有服务区大厅。这些大厅允许在清洁区外维修机器和进行任何必要的维修和维护。

On the sides and out of the of the clean laboratory there are service area halls. These allow the servicing of machines and any required repairs and the maintenance to be done outside the cleaning areas.

就像房间非常干净一样，进入实验室的人员必须从头到脚穿着完全干净的白色衣服，并通过一系列带有空气冲洗的门，就像空气淋浴一样，以确保他们不会将任何颗粒带入实验室。（我曾多次进入这些实验室，我很钦佩那些在里面工作数小时的技术人员。这不是一个舒适的环境。）所有进入实验室的人员在接触任何东西之前都必须接地，以避免静电，这是超灵敏集成电路芯片的另一个杀手。大部分过程由机器自动完成，减少了必须在实验室内的人员数量。

In the same way that the rooms are extraordinary clean, the personal entering the laboratory must dress in completely clean white clothes, head to toe, and go through a series of doors with flushes of air, like an air shower, to ensure that they do not bring any particles into the laboratory. (I have been inside these laboratories a few times and I admire the technical personnel that work inside them for hours. It is not a comfortable environment.) All the personnel entering the laboratory must wire themselves to ground before they touch anything to avoid any static electricity, another killer of ultra‐sensitive integrated circuit chips. Much of the process is done automatically by machines, reducing the number of human beings that have to be inside the laboratories.

YouTube 上有一段精彩的 10 分钟视频，由集成电路制造公司 Global Foundries 制作，带您参观其巨大的洁净室，并详细介绍了我在本章中介绍的许多步骤。请访问https://www.youtube.com/watch?v=qm67wbB5GmI。我相信您会喜欢的。另一个值得一看的 YouTube 视频是台积电半导体技术公司制作的，内容非常丰富（https://www.youtube.com/watch?v=4Q_n4vdyZzc）。

There is an excellent 10‐minute video on YouTube from Global Foundries, an integrated circuit fabrication company, that gives you a tour of their immense clean room and goes over many of the steps I cover in this chapter. Go to https://www.youtube.com/watch?v=qm67wbB5GmI. I am sure you will enjoy it. Another YouTube video worth watching is one from Semiconductor Technology at TSMC, which is very informative (https://www.youtube.com/watch?v=4Q_n4vdyZzc).

10.11 关于处理的补充思考

10.11 Additional Thoughts About Processing

我上面解释的是当今半导体加工中使用的基本技术，但您可能会怀疑当前使用的加工设备比我所描述的要复杂一些（这是极大的轻描淡写）。

What I have explained above is the basic technology used in semiconductor processing today, but as you may suspect the processing equipment currently used is a little more complicated (huge understatement) that what I have described.

我在第 10.4 节中解释并在第 10.5 节和第 10.7节中反复使用的光刻工艺是准确的，但非常简陋。这就是我在 20 世纪 70 年代初所做的方法。该过程在理论上仍然相同，但你可以想象实际技术已经改进了几千倍。

The photolithographic process I explained in Section 10.4 and use repeatedly in Sections 10.5 and 10.7 is accurate but very rudimentary. That is the way I did it in the early 1970s. The process is still theoretically the same, but you can imagine that the actual technology has improved several thousand times over.

我们将照相底片称为光罩。当图案占据整个晶圆时，可以使用“掩模”一词。光罩包含单个芯片或裸片的图案。我们在步进投影系统中使用光罩来重复相同的图案，直到相同的芯片被复制到整个晶圆上。光罩由计算机控制的电子束创建。图 10.33显示了先进的光刻步进机（来自 ASM Lithographic Co.）和众多复杂光学系统之一（来自 Corning Troper Co.）的照片。

We call the photographic plate a reticle. The word “mask” applies when the pattern occupies the entire wafer. The reticle contains the pattern of a single chip or die. We use reticles in the stepper projection system to repeat the same pattern over and over until the same chip is replicated on the entire wafer. The reticle is created by a computer‐controlled electron beam. Figure 10.33 shows a photograph of an advanced photolithography stepper (from ASM Lithographic Co.) and one of the many sophisticated optical systems (from Corning Troper Co.).

我们使用激光来获得更高的分辨率。在 20 世纪 90 年代，我们能够获得大约半微米的分辨率。现在我们可以制造设计规则接近 10 纳米的电路，分辨率比 30 年前高出约 50 倍。其中一些进步，例如带有特殊透镜系统、重复曝光、晶圆处理和特殊光源的光刻系统，可能耗资超过 10 亿美元。一些非常大的加工中心每月可以制造多达 30,000 个晶圆。

We use lasers for higher resolution. In the 1990s we were able to get resolutions of maybe half a micron. Now we can fabricate circuits with design rules close to 10 nm, about 50 times higher resolution than 30 years ago. Some of these advances, for example photolithographic systems with special lens systems, repetitive exposure, wafer handling, and fancy light sources, can cost over a billion dollars. Some very large processing centers can fabricate up to 30 000 wafers a month.

摩尔定律是电子学中被重复最多、最流行的定律之一。戈登·摩尔在 1965 年表示，每平方英寸（6.5 平方厘米）上的晶体管数量^每年都会翻一番。至少到今天为止，情况都是如此。图 10.34^显示了从 1970 年到 2016 年的工艺改进，从每平方英寸约 2000 个晶体管增加到 1 平方英寸空间内的 100 亿个以上。当你读到这句话时，图 10.34中的图表已经过时了。去 Wikipedia 看看新的数字。它们会更令人印象深刻！

One of the most repeated and popular laws of electronics is Moore's law. Gordon Moore stated in 1965 that the number of transistors per square inch (6.5 cm²) would double every year. That has been true at least until today. Figure 10.34 shows the process improvements from 1970 to 2016, going from about 2000 transistors per square inch to over 10 billion in the same space, 1 in.². By the time you read this sentence, the graph in Figure 10.34 will be already obsolete. Go to Wikipedia and look at the new numbers. They will be more impressive!

10.12 总结与结论

10.12 Summary and Conclusions

在本章中，我描述了制造集成电路的工艺，从纯硅到制造完美的圆形硅锭，再切割和标记以生成均匀的晶片。我们已经看到，这可以通过从熔体中生长硅锭（即切克劳斯基法）或使用平区法对其进行净化来实现。我们还看到，为了获得更高的纯度和规则性，我们可以通过外延法添加一层更受控制的材料薄膜，即外延层。

In this chapter I have described the process used to fabricate integrated circuits, from pure silicon to the fabrication of perfect circular boules, diced and marked to generate uniform wafers. We have seen that this can be done by growing a boule from a melt, the Czochralski method, or by purifying it using the flat‐zone method. We also saw that for additional purity and regularity we can add by epitaxial methods a thin film of much more controlled material, an epitaxial layer.

通过反复在半导体表面生长氧化物、用光刻胶覆盖氧化物、将光刻胶暴露在光线下、去除光刻胶的暴露区域以及去除其下方的氧化物，我们可以创建一个具有受保护区域和未受保护区域的晶圆。然后，我们可以通过热扩散在这些隔离区域中添加杂质，或在这些区域上植入不同的杂质以形成半导体的 p 区和 n 区。类似的程序使我们能够沉积连接不同半导体元件的金属。最后，我将简要讨论制造这些设备所需的设备。

By repeatedly growing oxide on the surface of the semiconductor, covering the oxide with photoresist, exposing the photoresist to light, removing the exposed area of the photoresist, and removing the oxide under it, we can create a wafer with protected and unprotected regions. We can then add impurities in these isolated areas by thermal diffusion or implant different impurities on them to form the p‐ and the n‐regions of the semiconductor. A similar procedure allows us to deposit the metals that connect the different semiconductor components. Finally, I discuss very briefly the equipment needed to make these devices.

附录 10.1 钻石结构中的米勒指数

Appendix 10.1 Miller Indices in the Diamond Structure

在第 10.2.1 节的末尾，我提到，当我们完成晶圆的生长后，我们会将其研磨成完美的圆柱体。这是有道理的，因为我们希望所有晶片的直径完全相同。然后我提到，我们在晶圆的一侧做一个凹口，这样当我们滑动晶圆时，我们就知道晶片的晶体学方向是哪个。我们为什么要这样做？

At the end of Section 10.2.1 I mentioned that when we finish growing the boule, we grind it to make a perfect cylinder. This makes sense since we want all the wafers to have exactly the same diameter. Then I mentioned that we make a notch on one side of the boule so that when we slide the boule, we know which is the crystallographic direction of the wafers. Why do we do this?

让我介绍一下米勒指数的概念。图 10.35显示了钻石的晶体结构，与图 3.1中的图相同，以及我可以切割晶片的三种方式。在图 10.35的中间，我展示了切割钻石晶格晶体结构的三种方式。在图 10.35的顶部，切口指定为 (1,0,0)，我沿着立方体的一个面切割晶体，显示为阴影区域。如果将 (1,0,0) 切口与左侧的晶体结构进行比较，您会注意到此切口在四个角包含四个原子，中间还有一个原子（带有两个切断键的球）。只有四分之一的角原子属于每个单位面积，但中间的原子（结构中的蓝色原子）位于盒子内，因此切口不会切割该原子。因此，(1,0,0) 切口中的每个单位面积包括两个原子：

Let me introduce the concept of Miller indices. Figure 10.35 shows the crystal structure of diamond, the same drawing as in Figure 3.1, and three ways in which I can slice the wafers. In the middle of Figure 10.35 I show three ways I can slice a diamond lattice crystal structure. At the top of Figure 10.35, the cut designated as (1,0,0), I slice the crystal along one face of the cube, shown as a shaded area. If you compare the (1,0,0) cut to the crystal structure on the left, you will notice that this cut contains four atoms at the four corners and one more in the middle (the ball with the two chopped bonds). Only one quarter of the corner atoms belongs to each unit area, but the atom in the middle, the blue atom in the structure, is inside the box so the cut does not slice that atom. Thus, each unit area in the (1,0,0) cut includes two atoms:

(10.1)

如果原子之间的原子距离为a，则该切片的单位面积为a2 ^。

If the atomic distance between atoms is a, then the unit area for this slice is a².

中间的对角线切割，即 (1,1,0) 方向，再次观察晶体结构，从一个角到另一个角，在中间切割原子，角上有四分之一的四个原子，中间有两个半原子，里面有两个完整的原子。与此平面相关的等效原子数为四个：

The diagonal cut in the middle, the (1,1,0) orientation, again looking at the crystal structure, goes from one corner to the opposite one, cutting the atom in the middle and contains a quarter of four atoms in the corners, two half atoms in the middle, and two full atoms inside. The number of equivalent atoms associated with this plane is four:

(10.2)

然而，面积更大，因为切口的垂直边是晶格常数，但切口的水平边是直角三角形的斜边，因此其长度由下式给出：

However, the area is larger because the vertical side of the cut is a, the lattice constant, but the horizontal side of the cut is the hypothenuse of a right‐angled triangle, so its length is given by

面积是

and the area is

(10.3)

最后，三角形切割 (1,1,1) 有三个角原子和三个中间原子。角上的原子现在由六个切片共享，中间的三个原子由两个平面共享，因此单位面积等效原子总数为

Finally, the triangular cut (1,1,1) has three corner atoms and three middle atoms. The atoms in the corners now are shared by six slices and the three in the middle by two planes, so the total number of equivalent atoms per unit area is

(10.4)

等边三角形的面积是其中一条边的长度的乘积，在本例中是，因此 (1,1,1) 切割的三角形的面积是

The area of an equilateral triangle is times the length of one of the sides, which in this case is , thus the area of the triangle in the (1,1,1) cut is

(10.5)

已知硅的晶格常数为a = 5.43 Å = 5.43 × 10 ^—8 cm，则a ² = 2.95 × 10 ^–15，我们现在可以计算出每个切片的原子密度，并按递增顺序获得：

Knowing that the lattice constant for silicon is a = 5.43 Å = 5.43 × 10^—8 cm, then a² = 2.95 × 10^–15 and we can now calculate the atomic density of atoms for each slice and we get, in incremental order:

对角切割 (1,1,0) 具有最高的每层原子密度，因此这种切割方式适合空穴传导。对于电子传导，直切割 (1,0,0) 是首选，因为它具有最少的不完整键和最少的悬空键。每个表面都有悬空键。表面的硅原子使用两个或三个电子与其他原子结合，但在固体外部没有任何东西可以结合，从而导致悬空键。

The diagonal cut (1,1,0) has the highest density of atoms per layer and therefore this cut is preferred for hole conduction. For electron conduction, the straight cut (1,0,0) is preferred because it has the smallest number of incomplete bonds and the fewest dangling bonds. At every surface there are dangling bonds. The silicon atoms at the surface use two or three electrons to bond with the other atoms, but there is nothing to bond outside the solid, resulting in the dangling bonds.

晶圆切割后，无法知道晶圆的类型或方向。有一个惯例，以便我们知道处理的是哪种晶圆。图 10.36显示了我们使用的惯例。所有晶圆上的主平面或凹槽沿 (1,1,0) 方向切割。第二个切口比底部的切口小得多，与主平面成 45°、90° 或 180° 角，分别表示晶圆为 (1,1,1) n 型、(1,0,0) p 型或 (1,0,0) n 型。如果没有第二个切口，水是 (1,1,1) p 型。对于较大的晶圆，我们使用凹口而不是平面。随着晶圆变大，平面会失去宝贵的面积。我们需要知道方向，因为有些工艺可能是各向异性的，也就是说，当它们以不同的方向使用时，它们具有不同的特性。

After the wafers have been cut, there is no way of knowing what type of wafer it is or what orientation it has. There is a convention so we know what wafer we are dealing with. Figure 10.36 shows the convention we use. The main flat or notch is cut along the (1,1,0) direction on all the wafers. The second cuts, which are much smaller than the one at the bottom, are at 45°, 90° or 180° from the main flat, indicating that the wafer is (1,1,1) n‐type, (1,0,0) p‐type or (1,0,0) n‐type, respectively. If there is no second cut, the water is a (1,1,1) p‐type. For the larger wafers, we use a notch instead of a flat. The flat loses valuable area as the wafers get larger. We need to know the orientation because some processes can be anisotropic, that is, they have different properties when they are used in different orientations.

11.1 布尔代数

11.1 Boolean Algebra

大家都知道数字计算机使用 1 和 0。计算机无法识别数字 3。计算机必须执行的所有计算才能给出有意义的结果，这些计算都是使用 ON 和 OFF 条件完成的，ON 表示 1，OFF 表示 0。大电视屏幕可以给我们带来色彩鲜艳、清晰美丽的画面，而电视屏幕则基于数百万个可以 ON 或 OFF 的点。每个光点由三个不同颜色的微型 LED 组成。计算机如何处理所有这些数据是基于布尔代数的概念。（忘掉代数这个词吧。除了加法和减法之外，没有其他方程式。）

Everybody knows that digital computers work with 1s and 0s. Computers do not understand the number 3. All the computations that computers have to carry out to give us any meaningful results are done using the ON and OFF conditions, ON for 1 and OFF for 0. The large TV screen that give us beautiful and sharp pictures with bright colors is based on millions of points that can be ON or OFF. Each point of light consists of three miniscule LEDs of three different colors. How a computer manipulates all this data is based on the concepts of Boolean algebra. (Forget about the word algebra. There are no equations involved outside of adding and subtracting.)

乔治·布尔 (1815-1864；图 11.1 ) 是一位英国数学家和哲学家，他对强化逻辑概念感兴趣。亚里士多德以其著名的三段论创造了逻辑思维，例如“所有人都会死，我是人，所以我会死”，或者更抽象地说，“所有的 A 都是 B，所有的 B 都是 C，所以所有的 A 都是 C”。他想确保人们在提出任何想法时都是合乎逻辑且一致的。布尔所做的是将数学形式主义、符号逻辑添加到亚里士多德的逻辑中。现在布尔逻辑或布尔代数是所有数字计算机计算的基础。布尔逻辑基本上由三个运算组成：AND、OR 和 NOT（实际上他还有 IMPLY 运算，但我们在计算机中不使用它）。让我们来看看这些运算。首先，我将使用继电器来解释这三个操作的工作原理，然后我们将逐步使用 CMOS。

Mr. George Boole (1815–1864; Figure 11.1) was a British mathematician and philosopher with interest in strengthening the logic concepts. Aristotle is credited with creating logic thinking with his famous syllogisms, such as “All men are mortal, I am a man, therefore I am mortal” or, more abstractly, “All A are B, all B are C, therefore all A are C”. He wanted to be sure that people were logical and consistent in advancing any idea. What Boole did was to add mathematical formalism, symbolic logic, to Aristotle's logic. Now Boolean logic or Boolean algebra is the basis of all digital computer calculations. Boolean logic consists basically of three operations: AND, OR, and NOT (actually he also had the operation IMPLY but we do not use it in computers). Let's take a look at these operations. First, I will use relays to explain how the three operations work and then we'll step up to using CMOS.

11.2 逻辑符号和继电器电路

11.2 Logic Symbols and Relay Circuits

继电器是一种简单的机电开关，其工作原理与远程开关相同。按下按钮，信号传送至继电器，电流通过其线圈，线圈充当磁铁并打开开关。图 11.2显示了两个继电器的草图。左侧的继电器是常闭继电器，也就是说，开关通常是打开的，当我施加电压时，它会闭合并打开。右侧的继电器是常开继电器，也就是说，当我们向线圈施加电压时，继电器会打开并关闭。

A relay is a simple electromechanical switch that works in the same way as a remote switch. You press a button, a signal goes to the relay, a current goes through its coil and this acts as a magnet and turns the switch ON. Figure 11.2 shows sketches of two relays. The one on the left is a normally OFF relay, that is, the switch is normally open, and it closes, turns ON, when I apply a voltage. The relay on the right is a normally ON, that is, the relay opens, turns OFF, when we apply a voltage to the coil.

现在让我们看看如何使用这些继电器制作逻辑电路。图 11.3左上角的图显示了逻辑运算 AND 的电路。继电器可以有两个值，ON 和 OFF，但只有继电器 A 和 B 都处于 ON 状态时，灯才会亮。这些条件显示在图 11.3右侧的真值表中。我们将这些表称为真值表，因为它们根据两个输入的状态显示真实输出（当一个开关关闭而另一个开关打开时，输出（灯）关闭，这是真的）。​​真值表这个名称来自逻辑学家，他们的兴趣在于从逻辑上知道什么逻辑思维的真正结果是。在电子学中，我们使用图 11.3左下角的符号表示 AND 运算。当我们使用此符号时，我们并不关心符号里面是什么（可能是继电器、晶体管或受过训练的猴子），只关心两个输入 A 和 B 之间的关系会产生一个满足 AND 函数条件的输出 C。

Now let us see how we can use these relays to make a logic circuit. The diagram at the top left of Figure 11.3 shows the circuit for the logic operation AND. The relays can have two values, ON and OFF, but the light will turn ON only if both relays A and B are ON. These conditions are shown in the truth table on the right of Figure 11.3. We call these tables truth tables because they show the true output based on the state of the two inputs (it is true that when one switch is OFF and the other is ON the output, the light, is OFF). The name truth table came from the logicians whose interest was to logically know what the true result of a logical thought is. In electronics we use the symbol at the bottom left of Figure 11.3 for AND operations. When we use this symbol, we do not care what is inside the symbol (could be relays, transistors or a trained monkey), just that the relation between the two inputs, A and B, results in an output, C, that satisfies the conditions of the AND function.

图 11.4显示了 OR 函数。现在，只要开关 A 或 B 之一或两者同时打开，灯就会亮起。右边是我们用于 OR 函数的符号，中间是 OR 函数的真值表。最后，图 11.5显示了电路、真值表和 NOT 运算（也称为反转运算）的符号。

Figure 11.4 shows the OR function. Now the light is ON if either switch A or B or both are ON. On the right is the symbol we use for the OR function and in the middle is the truth table for the OR function. Finally, Figure 11.5 shows the circuit, the truth table and the symbol for the NOT operation, also called the inversion operation.

这三个电路，AND、OR 和 NOT，是我们在电子设计中使用的主要布尔运算。对于数字函数的设计，以及纯粹为了方便起见，我们喜欢使用四个附加运算。第一个称为排他或 XOR 运算。我将其显示在图 11.6中。我没有显示 XOR 电路的等效继电器网络，因为这会造成更多混淆，而不是帮助。但您可以看到，根据定义，当且仅当输入中只有一个为 ON 时，XOR 才为 ON。如果两个输入都为 ON 或都为 OFF，则输出为 OFF。

These three circuits, AND, OR, and NOT, are the main Boolean operations that we use in electronic designs. For the design of digital functions, and for pure convenience, we like to use four additional operations. The first one is called the exclusive OR or XOR operation. I show it in Figure 11.6. I do not show the equivalent relay network for the XOR circuit because it would be more confusing than helpful. But you can see that, by definition, the XOR is ON if and only if just one, and only one, of the inputs is ON. If both are ON or both are OFF, the output is OFF.

这些符号是电子学中使用的基本元件，我们可以从中定义其他元件，这些元件将在后续章节中使用。添加的元件基本上是前三个元件的反转。图 11.7显示了我们使用的所有逻辑符号。记住这些符号其实很简单，记住它们将有助于您理解我稍后解释的电路。唯一带有三角形的符号是 NOT 电路。如果椭圆顶部的线是直线，则该符号是 AND 函数，如果是曲线，则它是 OR 函数，如果顶部有两条曲线，则它是 XOR 函数。最后三个符号在输出端可能有一个小球，正如我在图 11.7的第二行中所示。这个球表示真值表与上面没有球的真值表完全相反，也就是说，NAND 电路总是 ON，除非两个输入都为 ON，与 AND 相反。其他两个电路也是如此。我们添加这些“否定”电路是为了方便。我们可以通过在任何其他“正”符号上添加一个非电路来得到其中的任何一个。

These symbols are the basic components used in electronics and from them we can define others that we'll use in subsequent sections. The added ones are basically the reversal of the first three. Figure 11.7 shows all the logic symbols that we use. It is actually quite simple to remember these symbols and memorizing them will help you to follow the circuits that I explain later on. The only symbol with a triangle is the NOT circuit. If the line on top of the ovals is straight, the symbol is the AND function, if curved, it is the OR function, and if it has two curves on top, it is the XOR function. These last three may have a small ball at the output terminal, as I show in the second row of Figure 11.7. This ball indicates that the truth table is exactly the opposite of the one above without the ball, that is, the NAND circuit is always ON except when the two inputs are ON, the opposite of AND. The same for the other two circuits. We added these “negation” circuits for convenience. We can get any one of them by adding a NOT circuit to any of the other “positive” symbols.

11.3 符号内的电子元件

11.3 The Electronics Inside the Symbols

我们在电子电路中不使用继电器（尽管在 20 世纪 40 年代和 50 年代，包括我在内的一些工程师使用继电器设计了逻辑机器 [计算机？]，请参阅附录 11.5），因此接下来我将讨论如何使用半导体器件创建这些真值表，首先使用二极管，然后使用 MOSFET（金属氧化物半导体场效应晶体管）。对于 MOSFET，我使用术语 CMOS（互补 MOS），代表互补 MOS。这是一种表示我在许多电路结构中同时使用 p 型和 n 型 MOS 的方式。

We do not use relays in electronic circuits (although in the 1940s and 1950s some engineers, including myself, designed logic machines [computers?] using relays, see Appendix 11.5) so next I discuss how to create these truth tables using semiconductor devices, first using diodes and then using MOSFETs (Metal‐Oxide‐Semiconductor Field‐Effect‐Transistor). For MOSFETs I use the terminology CMOS (Complementary MOS), which stands for complementary MOS. It is a way of indicating that I use both p‐ and n‐type MOS in many circuit constructions.

11.3.1 二极管实现

11.3.1 Diode Implementation

您可能想知道图 11.7中显示的符号里面是什么。由于本书的目的是让您了解半导体器件的工作原理，因此让我解释一下这些逻辑模块内部的电子元件。首先，我们只使用二极管。图 11.8显示了使用二极管实现 AND 函数。在此真值表和所有后续真值表中，我将使用 1 和 0 代替 ON 和 OFF。

You may wonder what is inside the symbols I show in Figure 11.7. Since the purpose of this book is to give you an idea of how semiconductor devices work, let me explain the electronics inside these logic modules. First, let's use just diodes. Figure 11.8 shows the implementation of the AND function using diodes. In this and all following truth tables I will use 1 and 0 instead of ON and OFF.

在这个实现中，我们假设两个二极管都是理想的，也就是说，当它们反向偏置时，二极管关闭，其电阻为无穷大。当它们正向偏置时，二极管导通，其电阻为零。我还假设输出连接到高输入电阻设备，因此输出电阻不会影响 AND 电路的操作。

In this implementation, we assume that both diodes are ideal, that is, when they are reversed biased, the diodes are OFF and their resistance is infinite. When they are forward biased the diodes are ON and their resistance is zero. I also assume that the output is connected to a high input resistance device so the output resistance does not affect the operation of the AND circuit.

如果两个输入电压V _A和V _B都为 ON（等于 1 V），则输出电压V _out也必须为 1 V。为什么？如果V _out大于 1 V（比如说 1.5 V），则二极管将正向偏置。但正向偏置二极管两端的电压为零，因此V _out必须等于V _A或V _{B ，电阻器 R C}两端的压降为 1 V。如果输出小于 1 V（比如说 0.5 V），则二极管将反向偏置，即开路，R _C中将没有电流通过，因此其两端也没有电压，V _out必须等于V _C（等于 2 V），但这会使二极管正向偏置，从而迫使输出再次等于V _A或V _{B ，这与}V _out小于 1 的假设相矛盾。

If both input voltages, V_A and V_B, are ON, equal to 1 V, the output voltage, V_out, has to be 1 V. Why? If V_out were larger than 1 V, let us say 1.5 V, the diodes would be forward biased. But a forward biased diode has zero voltage across it, so V_out has to be equal to V_A or V_B. and there will be a 1 V voltage drop across the resistor R_C. If the output were to be less than 1 V, let us say 0.5 V, then the diodes would be reversed biased, that is OPEN and there would be no current through R_C and therefore no voltage across it, and V_out would have to be equal to V_C, which is equal to 2 V, but that would make the diodes forward biased which would force the output again to be equal to V_A or V_B, which contradicts the assumption that V_out is less than 1.

现在假设V _A或V _{B或两者均为零。然后一个或两个二极管正向偏置，短路接地，输出为零。这满足}图 11.8所示的真值表。

Now suppose either V_A or V_B or both is zero. Then one or both diodes are forward biased, shorted to ground, and the output is zero. This satisfies the truth table shown in Figure 11.8.

使用理想二极管实现的“或”电路更容易理解（图 11.9）。

The implementation of an OR circuit using ideal diodes is easier to follow (Figure 11.9).

请注意，OR 电路与 AND 电路相同，但两个二极管是反向的。在这种情况下，如果V _A或V _B或两者都为 1，则其中一个二极管或两个二极管正向偏置，即短路，输出电压为 1，从而产生真值表中 I 所示的条件。如果V _A为 1 且V _B为零，则二极管 D _A正向偏置，因此短路，但二极管 D _B反向偏置，因此断开，从而阻止电流流向地面。只有当V _A和V _B都为零时，输出才为零。这定义了 OR 电路的操作。

Notice that the OR circuit is the same as the AND circuit but with the two diodes reversed. In this case, if either V_A or V_B or both is 1, then one of the diodes, or both, is forward biased, that is, shorted, and the output voltage is 1, creating the conditions I show in the truth table. If V_A is 1 and V_B is zero, then the diode D_A is forward biased and therefore shorted, but diode D_B is reversed biased thus open, preventing the current from flowing to ground. Only when both V_A and V_B are both zero will the output be zero. This defines the operation of an OR circuit.

11.3.2 CMOS 实现

11.3.2 CMOS Implementation

我将使用图 11.10中所示的符号来表示 CMOS。我在与基极接触处使用一个空心圆圈来表示 MOSFET 是 p 型，如果它是 n 型，则不使用圆圈。您可以在草图中看到 CMOS 的栅极在哪里，但请注意，我没有告诉您哪个端子是源极，哪个端子是漏极。CMOS 是双向的，因此哪个端子是哪个端子取决于我如何连接它们以及电流流动的方向。

I will use the symbols shown in Figure 11.10 for the CMOS. I use an open circle at the contact with the base to indicate that the MOSFET is a p‐type or no circle if it is an n‐type. You can see in the sketches where the gates of the CMOS are, but notice that I do not tell you which terminal is the source and which is the drain. CMOS are bidirectional, so which terminal is which depends on how I connect them and in which direction the current flows.

11.4 反相器或非门电路

11.4 The Inverter or NOT Circuit

图 11.11显示了或门电路的反相器，即非门电路，以及真值表和符号。我使用了 p 型和 n 型 MOSFET。这就是我们使用 CMOS 这一术语的原因。

Figure 11.11 shows the inverter of the OR circuit, the NOT circuit, with the truth table and its symbol. I use both p‐ and n‐type MOSFETs. This is why we use the term CMOS.

请注意，当V _in为 OFF（0）时，n 型 MOSFET 关断，p 型 MOSFET 导通。我通过将 n 型 MOSFET 替换为开路、将 p 型 MOSFET 替换为短路来表示这种情况。导通的 MOSFET 电阻很小，因此输出电压非常接近电压V _{CC 。因此输出为导通，如图}11.11中的真值表所示。

Notice that, when V_in is OFF, 0, the n‐type MOSFET is turned OFF and the p‐type MOSFET is ON. I represent this condition by replacing the n‐type MOSFET by an open circuit and the p‐type MOSFET by a short circuit. The ON MOSFET has very little resistance so the output voltage is very close to voltage V_CC. The output is therefore ON, as the truth table shows in Figure 11.11.

当输入电压V _in为 1，即 ON 时，情况正好相反：p 型 MOS 为 OFF，即开路，n 型 MOS 为 ON，即短路。此时输出通过 ON 的 n 型 MOS 短路至地，迫使V _out = 0，确认电路反转输入电压。当输入电压高，输出电压低，反之亦然。这就是反相或非电路。很简单。

When the input voltage, V_in, is 1, that is, ON, the opposite occurs: the p‐type MOS is OFF, open, and the n‐type MOS is ON, shorted. Now the output is shorted through the ON n‐type MOS to ground, forcing V_out = 0, confirming that the circuit inverts the input voltage. When the input voltage is high, the output voltage is low and vice versa. That is an inversion or the NOT circuit. Quite simple.

我应该说，这个电路以及我接下来讨论的所有其他电路都可以用更复杂的方式实现。我只是展示了最简单的方法，这样你就可以了解这些逻辑电路是如何创建的以及它们是如何工作的。

I should say that this circuit, as well as all the others I discuss next, can be implemented in much more sophisticated ways. I am just showing the simplest way, so you can get an idea of how these logic circuits are created and how they work.

11.5 或非门电路

11.5 The NOR Circuit

您可能想知道为什么我首先讨论 NOR 电路而不是 OR 电路。NOR 电路实际上比 OR 电路更容易实现，并且要从一个电路转换为另一个电路，我们只需要使用我在上一节中讨论过的非电路，也就是说，负或反相 NOR 是 OR，反之亦然。

You may wonder why I discussed the NOR circuit first instead of the OR. The NOR circuit is actually easier to implement than the OR and to get from one to the other we just need to use the NOT circuit I discussed in the previous section, that is, the negative or inverted NOR is OR and vice versa.

图 11.13显示了 NOR 电路、真值表及其符号，图 11.14显示了 0 和 1 的四种输入组合的 MOSFET 状态。我将这些图放在一起，以便您可以轻松地从一个图转到另一个图。

Figure 11.13 shows the NOR circuit, the truth table, and its symbol, and Figure 11.14 shows the MOSFET status for the four input combinations of 0s and 1s. I place these to figures together so you can easily go from one to the other.

虽然这些图可能会吓到你，但实际上它们相当简单。让我们先看看图11.13。它由四个 MOSFET 组成，两个 p 型（记住栅极处有圆圈的那些）和两个 n 型。每个输入 X 和 Y 连接到一个p 型和一个 n 型 MOS。输入 X 连接到 CMOS M1 和 M3 的栅极，输入 Y 连接到 M2 和 M4 的栅极。这两个 n-CMOS 一侧接地，在输出端连接在一起。

Although the figures may scare you, they are actually quite simple. Let's first take a look at Figure 11.13. It consists of four MOSFETS, two p‐type (remember the ones that have the circle at the gates) and two n‐type. Each input, X and Y, is connected to the gate of one p‐type and one n‐type MOS. The input X is connected to the gates of CMOSs M1 and M3 and the input Y to the gates of M2 and M4. These two n‐CMOS are grounded on one side and joined together at the output.

现在看一下图 11.14。如果 X 和 Y 都为零（左上角），则 M1 和 M2 为 ON，因此它们充当短路，而 M3 和 M4 为开路，因此输出直接连接到 V _CC，所以输出为 ON。

Now take a look at Figure 11.14. If both X and Y are zero (top left), M1 and M2 are ON so they act as shorts and M3 and M4 are open, thus the output is directly connected to V_CC, so the output is ON.

如果 X = 0 且 Y = 1（右上），则 M1 从闭合变为断开，M3 从断开变为闭合。现在，输出与电源 V _CC断开，并通过 M3 短接至地。输出为零。当 X = 1 且 Y = 0（左下）或 X 和 Y 均为 1（右下）时，情况相同。在这三种情况下，输出都短接至地。我们已为 NOR 电路创建了真值表。只有当两个输入都为 OFF 时，输出才为 ON。

If X = 0 and Y = 1 (top right) then M1 changes from closed to open and M3 from open to closed. Now the output is disconnected from the source V_CC and shorted to ground through M3. The output is zero. The same happens when X = 1 and Y = 0 (bottom left) or when both X and Y are 1 (bottom right). In all of these three cases the output is shorted to ground. We have created the truth table for the NOR circuit. The output is only ON when the two inputs are OFF.

如果我们想创建模块 OR，我们只需在 NOR 模块的输出中添加一个 NOT 模块，然后将图 11.13真值表中的所有V_输出从 0 更改为 1，反之亦然。

If we want to create the module OR, we just add a NOT module to the output of the NOR module and we change all the V_out in the truth table of Figure 11.13 from 0 to 1 and vice versa.

11.6 NAND 电路

11.6 The NAND Circuit

与上一节一样，我在这里讨论 NAND 电路，因为它更容易实现和理解。与前面一样，图 11.15显示了 NAND 电路的 CMOS 实现，其中带有符号和真值表，图 11.16显示了输入从 1 变为 0 时的 MOSFET 状态。

As in the previous section, I discuss here the NAND circuit because it is easier to implement and understand. As before, Figure 11.15 show the CMOS implementation of the NAND circuit with the symbol and the truth table, and Figure 11.16 shows the MOSFET status as the input changes from 1 to 0.

到现在为止，我认为我不需要解释一切。您可以看到，当 X 和 Y 从 0 变为 1 时，输出如何连接到V _CC或接地。只有当两个输入都是 1 时，它才为 0。同样，如果您想要一个 AND 电路，只需将 NOT 电路添加到 NAND 即可获得结果。

By this time, I do not think I need to explain everything. You can follow how as X and Y change from 0 to 1, the output is connected to V_CC or to ground. It is only 0 when both inputs are 1. Again, if you want an AND circuit just add a NOT circuit to the NAND to get the result.

11.7 XNOR 或排他或非

11.7 The XNOR or Exclusive NOR

正如我上面对 NAND 和 NOR 电路所做的那样，我可以向您展示另一个由 CMOS 组成的电路，该电路将产生 XNOR 模块，但现在我们已经找到了表示 NAND 和 OR 电路的方法，我可以使用我们已经看到的方法来构建 XNOR 模块。稍后，当我解释一些算术运算时，我将使用相同的方法。

As I did above with the NAND and NOR circuits, I could show you another circuit consisting of CMOS that would result in the XNOR module, but now that we have found ways to represent the NAND and the OR circuits, I can construct the XNOR module by using those that we have already seen. I use the same approach later when I explain some of the arithmetic operations.

参见图 11.17。为了方便起见，我在逻辑符号中写了 NAND 和 OR，尽管符号本身就足够了。此外，我在真值表中添加了两个中间列，以便更容易解释其工作原理。

Look at Figure 11.17. For convenience I have written NAND and OR inside the logic symbols, although the symbols themselves should suffice. Also, I have added two intermediate columns in the truth table to make the explanation about how it works a little easier.

首先考虑点 A，只看真值表的前三列。只有当两个输入都为 1 时，NAND 的输出才为 0。因此，只有当 X 和 Y 都为 1 时，点 A 才为 0。这就是真值表 A 列所表示的内容。现在查看两个输入列 X 和 Y，以及第四列 B 列。B 列是 OR 电路的输出，因此只有当 X 和 Y 都为 0 时，点 B 才为 0。最后，点 A 和 B 现在是第二个 NAND 的输入，因此，正如我们在将点 A 视为输出时所看到的，只有当 A 或 B 为零时， V _out才为 1。现在不要看 A 和 B 列只需看一下前两个输入列和最后一个输出列V _out。仅当 X 和 Y 都为 1 或都为 0 时，输出电压才为 1，这正好是 XOR 的否定。

First consider point A and look only at the first three columns in the truth table. The output of a NAND is 0 only when the two inputs are 1. So, point A is 0 only when both X and Y are 1. That is what the truth table, column A states. Now look at the two input columns, X and Y, and the fourth column, the B column. The B column is the output of an OR circuit, so point B is 0 only when both X and Y are 0. Finally, points A and B are now the inputs to the second NAND, therefore, as we saw when looking at point A as an output, V_out is 1 only when either A or B is zero. Don't look now at columns A and B and just take a look at the first two input columns and the final output column, V_out. The output voltage is 1 only when either both X and Y are 1 or both are 0, exactly the negation of the XOR.

我们不仅构建了一个新的逻辑模块，而且您还可以开始了解如何组合逻辑电路以获得许多其他更复杂、更精密的操作，正如我们将在下一节中看到的那样。

Not only we have constructed a new logic module, but you can start to see how logic circuits can be combined to get many other more complex and sophisticated operations, as we'll see in the next section.

11.8 半加器

11.8 The Half Adder

在十进制中，4 + 8 = 12，这等于 10 + 2。2 前面的 1 不是 1，而是 10。我们可以说，在数字 9 以上，我们进位 1，并将其放在 2 前面，以表示 2 后面有零。类似地，在基于 6 的数字系统中，4 + 5 = 13。在 6 之后我们进位 1 并继续计数，因此十进制数 7 变成 11，8 变成 12，9 变成 13。

In the decimal system, 4 + 8 = 12, and that is equal to 10 + 2. The 1 in front of the 2 is not a 1 but a 10. We could say that above number 9 we carry a 1 which we placed in front of the 2 to indicate that there is zero behind the 2. Similarly, in a number system based 6, 4 + 5 = 13. After 6 we carry a 1 and proceed to count so the decimal number 7 becomes 11, 8 becomes 12, and 9 becomes 13.

在二进制系统中，只有 1 和 0，因此 0 + 0 = 0、0 + 1 = 1 和 1 + 1 = 10。我们需要进位 1，并将其放在零之前的单独列中。使用逻辑门，我们现在可以实现两个一位数的加法运算（图 11.18 ）。我们将图 11.18中的模块称为半加器，因为它只加两个一位数。基本上，它们每次只对一个数字进行运算。

In the binary system there are only 1s and 0s, therefore 0 + 0 = 0, 0 + 1 = 1 and 1 + 1 = 10. We need to carry a 1 and place it in a separate column, ahead of the zero. Using the logic gates, we can now implement the addition of two one‐digit operations (Figure 11.18). We call the module in Figure 11.18 a half adder because it adds only two single‐digit numbers. Basically, they operate on one number at a time.

半加器可以使用 XOR 和 AND 模块实现。如果输入 X 和 Y 为 0，则 XOR 输出V _S（表示信号值）和 AND 输出V _C（表示进位结果）的输出均为 0。XOR 的输出（真值表中的第三列）仅当其中一个输入为 1 时才为 1；否则输出为 0。AND 电路的输出（真值表的第四列）仅当 X 和 Y 都为 1 时才为 1。这与两个二进制数之和的真值表一致，我在第五列中显示了该真值表。半加器的符号只是一个方框，带有两个输入 X 和 Y 以及两个输出V _S和V _C，为清楚起见，方框中间标有“半加器”字样。

The half adder can be implemented using XOR and AND modules. If the inputs X and Y are 0, the outputs of both the XOR output, V_S for signal value and the AND output, V_C, for the carry‐on result are 0. The output of the XOR, the third column in the truth table, is 1 only if one of the inputs is 1; otherwise the output is 0. The output of the AND circuit, the fourth column of the truth table, is 1 only if both X and Y are 1. This agrees with the truth table for the sum of two binary numbers, which I show in the fifth column. The symbol for a half adder is just a square box with two inputs, X and Y, and two outputs, V_S and V_C, with the word “half adder” in the middle of the box for clarity.

11.9 全加器

11.9 The Full Adder

半加器的问题在于它只能加两个个位数，类似于十进制系统只能加两个介于 0 和 9 之间的数字。如果我们要加更大的数字，比如 15 + 3，该怎么办？除了 5 和 3，我们还需要数字 1（不是 1，而是 10），将其包含在和中。在二进制系统中，情况也类似。使用半加器，我们可以加 1 + 0 或 1 + 1，但如何将 10 加到 1 呢？这时我们就需要全加器了，我在图 11.19中展示了它。

The problem with the half adder is that it can add only two single‐digit numbers, similar to the decimal system limited to adding just two numbers between zero and nine. What happens when we want to add larger numbers like 15 + 3? In addition to the 5 and the 3, we have the digit 1 (which is not 1 but a 10) that we need to include in our sum. In the binary system we have a similar situation. With the half adder we can add 1 + 0 or 1 + 1 but how about 10 to 1? That is when we need the full adder, which I show in Figure 11.19.

我使用了之前用过的相同技巧。是的，我可以使用 CMOS 或逻辑模块向您展示全加器的结构，但我可以更轻松地使用两个半加器和一个 OR 模块来创建全加器。

I am using the same trick I used before. Yes, I could show you the structure of the full adder using CMOS or logic modules, but I can more easily create a full adder by using two half adders and an OR module.

首先请注意，全加器有三个输入，两个数字 X 和 Y，以及来自前一个操作的进位数字 C*。第一个半加器与我在图 11.18中解释的加法器完全相同。第二个半加器将前一个操作的进位 C* 添加到第一个半加器的输出。然后，第二个半加器的进位与第一个半加器的进位进行或运算。因此，当两个或所有三个输入为 1 时，新的进位V _C为 1，而当只有一个或所有三个输入为 1 时，新的进位V _{S为 1。看看你是否能理解这个逻辑。我在}附录 11.2中详细解释了这个逻辑。

Note first that the full adder has three inputs, the two digits X and Y, and the carry‐on digit from a previous operation, C*. The first half adder is exactly the same as the adder I explained in Figure 11.18. The second half adder adds the carry‐on of a previous operation, C*, to the output of the first half adder. Then the carry‐on of the second half adder is OR with the carry‐on of the first half adder. So, the new carry‐on V_C is 1 when two or all three inputs are 1 and V_S is 1 when just one or all three inputs are 1. See if you can follow the logic. I explain the logic, step by step, in detail in Appendix 11.2.

11.10 两个以上数字的加法

11.10 Adding More than Two Digital Numbers

在绝大多数算术运算中，我们希望相加的不仅仅是两个一位数。图 11.20显示了如何相加两个三位数。根据最后的进位，最终的和可能不是三位而是四位。这就是进位 C4 的作用。如果有三位数以上或两个以上的数字，则需要向链中添加越来越多的全加器。（请注意，我在图 11.20中将和的方向从右向左反转，因为这样更容易绘制。）

In the great majority of arithmetic operations, we want to add more than just two one‐digit numbers. Figure 11.20 shows how to add two three‐digit numbers. The resulting sum may have not three but four digits, depending on the last carry‐over. That is what the carry‐on, C4, does. If you have more than three digits or more than two numbers, you add more and more full adders to the chain. (Note that I reversed the direction of the sum in Figure 11.20 from right to left, because it is much easier to draw it.)

11.11 减法器

11.11 The Subtractor

要了解计算机如何减去两个数字，我们必须回顾孩子们学习减法的方式。小学生试图从 5 中减去 7（图 11.21 A），但只有将 5 改为 15 才能做到这一点（图 11.21 B）。他得到了 8。然后，他将减数中的 3 增加 1 得到 4（图 11.21 C），然后用 3 减去它，同样，只要将其改为 13 就可以做到这一点（图 11.21 D）。他写下 9 并将减数中的 1 改为 2（图 11.21 E），得到最终结果 0（图 11.21 F）。高中生可以在心算中做同样的运算（右边的减法）。

To see how a computer subtracts two numbers we have to go back to the way children learn how to subtract. The child in elementary school tries to subtract 7 from 5 (Figure 11.21A) but he can only do it if he changes the number 5 to a 15 (Figure 11.21B). He gets an 8. Then he increases the number 3 in the subtrahend by 1 to 4 (Figure 11.21C) and subtracts it from 3, which again he can do as long as he makes it 13 (Figure 11.21D). He writes a 9 and changes the 1 in the subtrahend to 2 (Figure 11.21E) and he gets the final result, a 0 (Figure 11.21F). The high school student can do this same operation in his head (the substraction on the right).

现在让我们减去两个数字（图 11.22）。假设我们要从数字 59 中减去 38。运算是 111011 减去 100110。让我慢慢来。在块 A 中，我减去最后两个数字。这些很容易，1-0 = 1 和 1-1 = 0。接下来的数字有问题。现在我们必须从 0 中减去 1，这是我们做不到的。因此，我们从被减数的左边借 1，这样右边的第三位数字就变成了10，而右边第四位数字丢失 1 并变为 0。我在块 B 中展示了这一点。数字 10 是十进制中的数字 2，所以数字 10 - 1 = 1。减去第三位数字的结果为 1。第四位数字现在在被减数和减数中都是 0，所以结果为 0。左边剩下的两位数字是 1 - 0 = 1 和 1 - 1 = 0（块 C），完成减法（块 D）。

Let's now subtract two digital numbers (Figure 11.22). Suppose we want to subtract 38 from 59 in digital numbers. The operation is 111011 minus 100110. Let me do this slowly. In block A, I subtract the last two numbers. These are easy, 1–0 = 1 and 1–1 = 0. We have a problem with the next digits. Now we have to subtract 1 from 0, which we cannot do. So, we borrow the 1 from the left digit of the minuend so the third digit from the right becomes 10 and the fourth digit from the right loses the 1 and changes to 0. I show this in block B. Digital 10 is number 2 in decimal, so in digital 10 – 1 = 1. The result of the subtraction of the third digits is 1. The fourth digits are now 0 in the minuend and in the subtrahend, so the result is 0. The remaining two digits on the left are 1 – 0 = 1 and 1 – 1 = 0 (block C), completing the subtraction (block D).

执行数字减法的另一种方法是使用补数，这实际上在数字电路中更容易实现。我在附录 11.3中介绍了使用补数进行减法。

Another way of performing digital subtractions is to use complementary numbers, and this is actually easier to implement in a digital circuit. I cover subtraction using complementary numbers in Appendix 11.3.

计算机不像高中生那么聪明，它用二进制数做变电站的方式和小学的孩子一样。图 11.23显示了半减法器和真值表的电路实现。它几乎与图 11.18中的半加法器相同。唯一的变化是我在输入 X 和 AND 模块之间添加了一个反相器，即 NOT 模块。输出信号V _S与加法器相同，即当 X 或 Y 为 1 但不同时为 1 时，它为 1。这正是 XOR 模块所做的。AND 模块的输出是“借位”数字V _B。只有当减数 Y 大于被减数 X 时，它才为 1。NOT 模块会改变 X 的值，因此 AND 电路看到两个 1 的唯一时间是 X = 0 和 Y = 1，这正是我们想要的。这就是我在 X – Y 运算的真值表中显示的内容。

A computer is not as smart as a high school student and does the substation with binary numbers in the same way as the child in elementary school. Figure 11.23 shows the circuit implementation of the half subtractor and the truth table. It is almost identical to the half adder in Figure 11.18. The only change is that I have added an inverter, a NOT module, between the input X and the AND module. The output signal, V_S, is the same as the adder, that is, it is 1 when either X or Y are 1 but not both. That is exactly what the XOR module does. The output of the AND module is the “borrow” digit, V_B. which is only 1 if the subtrahend, Y, is larger than the minuend, X. The NOT module changes the value of X so the only time that the AND circuit sees two 1s is when X = 0 and Y = 1, which precisely what we want. This is what I show in the truth table for the operation X – Y.

如果您想要一个全减法器，您可以做与全加法器相同的事情，只需稍作改动（图 11.24）。

If you want a full subtractor you'll do the same thing we did with the full adder, with minor changes (Figure 11.24).

加法器中给出V _C结果的或电路现在给出V _S结果，反之亦然，这就是它的全部变化。在附录 11.3中，我讨论了互补数，这有助于我们理解为什么我们通过将一个数字与另一个数字的补码相加来减去两个数字。

The OR circuit that in the adder gave the result for V_C now gives the result for V_S, and vice versa, and that is all it changes. In Appendix 11.3 I discuss complementary numbers which help us to understand why we subtract two digital number by adding one to the complement of the other.

11.12 题外话：触发器、锁存器和移位器

11.12 Digression: Flip‐flops, Latches, and Shifters

为了解释其他算术运算，例如数字乘法，我们需要了解一种移位数字的方法。要进行移位，我们需要两个不同的、操作相似的电路，即触发器和锁存器。图 11.25左侧显示了触发器，右侧显示了锁存器。

To explain other arithmetic operations, like multiplication of digital numbers, we need to understand a way of shifting numbers. To do the shifting we need two different operationally similar circuits, the flip‐flop and the latch. Figure 11.25 shows a flip‐flop on the left and the latch on the right.

这些电路看上去与两只互相咬尾巴的狗非常相似。首先看一下左边的图。它由两个 NOT 模块组成。如果 A 为 1 则 A* 必须为 0，反之亦然，如果 A 为 0 则 A* 为 1，这两种情况下都非常稳定。我们可以使用此配置来存储数字。尽管它是任意的，但我们选择一个输入（在本例中为 A）来定义触发器的状态。我们说当 A 为 0 时触发器为 0，反之亦然，当 A 为 1 时触发器为 1。我在图 11.25右下方的真值表中显示了这一点。如果我添加两个 OR 模块，在 NOT 电路的每个输入处各添加一个，那么我就可以将 A 和 A* 从 0 更改为 1 或从 1 更改为 0。一旦我这样做了，A 和 A* 就会保持这种状态不变，直到我决定使用复位输入来更改它们。我们将中间的电路称为锁存器。现在我们有了一个电路，一个锁存器，它允许我们在输出 A 处保留一个值 1 或 0，时间长短由我们决定。我在图 11.25右侧显示了锁存器的符号。根据锁存器的状态，1 和 0 可以互换。

These circuits look strangely similar to two dogs biting each other's tails. Take a look first at the figure on the left. It consists of two NOT modules. If A is 1 then A* must be 0 and vice versa, if A is 0 then A* is 1, which is very stable in both cases. We can use this configuration to store a digit. Although it is arbitrary, we select one input, in this case A, to define the state of the flip‐flop. We say the flip‐flop is 0 when A is 0 and, vice versa, 1 when A is 1. I show this in the truth table at the lower right of Figure 11.25. If I add two OR modules, one at each input of the NOT circuits, then I have a way of changing A and A* from 0 to 1 or from 1 to 0. Once I have done that, A and A* remain in this status, unchanged, until I decide to change them by using the reset input. We call the circuit in the middle a latch. Now we have a circuit, a latch, that allow us to keep a value, 1 or 0, at output A, for as long as we want. I show the symbol for a latch on the right of Figure 11.25. The 1 and the 0 can be interchanged depending on the status of the latch.

我想要讨论的下一个电路是移位运算，也称为旋转运算，因为我们需要它来理解乘法。图 11.26显示了三输入移位电路（请注意，为了方便起见，我用黑点表示连接点，因此如果两条线相交而没有点，则表示它们没有连接。）

The next circuit I want to discuss, because we need it to understand multiplication, is the shift operation, also known as the rotation operation. Figure 11.26 shows a three‐input shift circuit (Note that for convenience I show connecting points with black dots so if two lines cross each other without a dot, it means that they are not connected.)

电路左侧有输入，右侧有输出，顶部有寄存器，在我们的例子中只有三个，但可能有数百个。每个寄存器连接到一个垂直列。三个输入连接到每个水平行中 CMOS 的源极。每个 CMOS 的集电极与输出线的连接有点棘手。查看 CMOS 的第一列 R1。输入 I1 通过其第一个 CMOS 连接到输出 O1。类似地，I2 和 I3 通过第一列的相应 CMOS 连接到 O2 和 O3。

The circuit has inputs on the left, outputs on the right, and the registers on the top, in our case just three, but there can be hundreds. Each register is connected to all the gates of a vertical column. The three inputs are connected to the source of the CMOS in each horizontal row. The connection of the collector of each of the CMOS to the output line is a little trickier. Look at the first column, R1, of CMOS. The input I1 is connected through its first CMOS to output O1. Similarly, I2 and I3 are connected to O2 and O3 through the respective CMOS of the first column.

第二列 CMOS 集电极 R2 的连接发生了偏移；第二列顶部 CMOS 的集电极连接到 O3，第二个连接到 O1，第三个连接到 O2。最后，让我们看看第三列 R3 的集电极。第一个 CMOS 连接到 O2，第二个连接到 O3，第三个连接到 O1。我应该提到，如果我们有一个 10 × 10 矩阵，第二列的第一个 MOS 将连接到第十个输出，即最后一个输出，第二个连接到第一个输出，第三个连接到第二个输出，等等。第三列将连接到第九个输出，第二列将连接到第十个输出，第三列将连接到第一个输出，等等。我想你可以看到这种模式。

The connections to the collector of the CMOS of the second column, R2, are shifted; the collector of the top CMOS on the second column is connected to O3, the second to O1, and the third to O2. Finally, let’s look at the collectors of the third column, R3. The first CMOS is connected to O2 the second to O3 and the third of O1. I should mention that if we had a 10 × 10 matrix, the first MOS of the second column would be connected to the tenth, the last, output, the second to the first, the third to the second, etc. The first transistor of the third column would be connected to the ninth output, the second to the tenth, the third to the first, etc. I think you can see the pattern.

现在回到我们的 3 × 3 示例。请记住，我们将这些 CMOS 用作开关。例如，假设我们打开 R2。使用开关，图 11.26中的电路看起来就像图 11.27中的电路。

Now go back to our 3 × 3 example. Remember that we use these CMOS as switches. Assume, for example, that we turn ON R2. Using switches, the circuit of Figure 11.26 looks like the one in Figure 11.27.

第二列的所有 CMOS 都处于 ON 状态，而其他所有 CMOS 都处于 OFF 状态。如果您顺着所有闭合开关（粗线）的路径走，您会看到第一个输出连接到第二个输入 O1 = I2，第二个输出连接到第三个输入 O2 = I3，第三个输出连接到第一个输入 O3 = I1。我们将所有输出移到了输入后面一步。您还可以看到为什么我们将此电路也称为旋转电路。

All the CMOSs of the second column are ON and all the others are OFF. If you follow the path of all the closed switches (in bold lines), you'll see that the first output is connected to the second input O1 = I2, the second output to the third input, O2 = I3, and the third output to the first input, O3 = I1. We have shifted all the outputs one step behind the input. You can also see why we call this circuit also a rotation circuit.

现在我们准备讨论乘法运算。

Now we are ready to discuss the multiplication operation.

11.13 二进制数的乘法和除法

11.13 Multiplication and Division of Binary Numbers

请看图 11.3中 AND 模块的真值表。只有当两个二进制数字都为 1（ON）时，AND 电路的输出才为 1，这与乘法的作用完全相同。任何数字乘以零都是零，只有当两个数字都为 1（1 × 1 = 1）时结果才为 1，因此简单的 AND 电路只是将两个数字相乘。当我们想要将两个数字各有 1 以上的数字相乘时，情况就更加复杂了。假设我们要将 110101（相当于十进制中的 53）乘以 1101（相当于 13）（图 11.28）。我们手动做的是将上面的数字（被乘数）乘以第二个数字（乘数）的第一位，然后将乘数的第二个数字与被乘数相乘，移位第二个乘积，并将两个结果相加（图 11.28左侧）。我们对数字执行相同的操作乘法，如中间块所示。由于乘数的第一位是 1，因此第一个结果与被乘数完全相同。然后我们取乘数的第二位，在我们的例子中恰好是零，因此将第二位零乘以被乘数的结果全为零。但现在我们将结果向左移动了一位。乘数的第三位也是 1，因此我们只需将被乘数写在第三行，将数字向左移动一位，等等。最后，我们将所有部分乘法结果相加。

Take a look at the truth table of the AND module in Figure 11.3. The output of the AND circuit is 1 only when both binary digits are 1, ON, exactly what multiplication does. Any digit multiplied by zero is zero and the only time the result will be 1 is when both digits are 1 (1 × 1 = 1), therefore just the simple AND circuit multiplies two digital numbers. What is more involved is when we want to multiply two numbers with more than 1 digit each. Let us say we want to multiply 110101 (equivalent to 53 in the decimal system) by 1101 (equivalent to 13) (Figure 11.28). What we do manually is multiply the upper number, the multiplicand, by the first digit of the second number, the multiplayer, and then we multiply the second number of the multiplier with the multiplicand, shift this second product, and add the two results (left of Figure 11.28). We do the same with the digital multiplication, shown in the middle block. Since the first digit of the multiplier is 1, the first result is just the same as the multiplicand. Then we take the second digit of the multiplier, which in our case happens to be zero and therefore the results of multiplying this second digit, zero, by the multiplicand is all zeros. But now we have shifted the result one position to the left. The third digit of the multiplier is also 1 so we just write the multiplicand in the third row, shifting the numbers one more position to the left, etc. Finally we add all the partial multiplication results.

计算机很难同时将两个以上的数字相加，因此它先将前两个数字相加，然后将这个结果添加到第三个数字，再将新结果添加到第四个数字，因此计算机操作看起来就像图 11.28右侧的框。计算机将每个部分和的结果存储在累加器、一堆锁存器中，然后将下一个乘积移位并添加到前一个结果并发送回累加器等，直到完成所有数字的乘法（或添加和移位）。

A computer has difficulty adding more than two numbers at the same time, so it does this by adding the first two numbers and then this result is added to the third number and then the new result to the fourth number, so the computer operation looks like the box on the right in Figure 11.28. The computer stores the results of each partial sum in an accumulator, a bunch of latches, then the next product is shifted and added to the previous result and sent back to the accumulator etc. until it finishes multiplying (or adding and shifting) all the digits.

就像我们通过对每个中间结果进行加法和移位来执行乘法一样，我们通过对结果进行减法和移位来除两个数，然后继续减法和移位，直到所有数字都被计算出来（参见附录 11.4）。

In the same way that we perform multiplications by adding and shifting each intermediate result, we divide two numbers by subtracting and shifting the result, and then keep subtracting and shifting until all the digits are accounted for (see Appendix 11.4).

11.14 附加评论：速度和力量

11.14 Additional Comments: Speed and Power

您可能已经想到，除了我在这里向您展示的方法之外，还有许多其他方法可以从 CMOS 和结型晶体管中获得逻辑模块。由于我们需要速度、功率甚至电路布局配置，这些其他组合中的许多组合可能是理想的。您可以在许多技术书籍中找到所有这些选项，但我希望本章能让您了解工程师如何使用半导体器件来创建复杂的算术和处理系统。

As you might expect there are many other ways to obtain logic modules from CMOS and junction transistors than the ones I have shown you here. Many of these other combinations may be desirable because of the speed or the power or even the circuit layout configuration that we need. You can find all of these options in many technical books, but I hope that this chapter has given you an idea of how engineers use semiconductor devices to create complex arithmetic and processing systems.

我还想谈一谈这些电路的速度。我们希望快速逻辑能够在最短的时间内执行复杂的操作。这通常是工程师必须处理的最重要的布局和电路设计考虑因素之一。请看图 11.29。假设在诸如 NOT 模块之类的电路中，输入电压V _in瞬间从 0 变为 1，正如我在图中上半部分所示。我们希望响应时间非常快，以便输出电压V _out瞬间从 1 变为 0。实际情况是，在 CMOS 或晶体管从 1 变为 0（图的下半部分）之前，输出电压需要一些时间。输出从 1 变为 0 所需的时间是下降时间。当输入从 1 变为 0 时，另一端的上升时间为t _R – t ₂，我们称之为上升时间。由于线路和半导体器件本身的特性，存在许多电容和电阻效应。这些效应会减慢并限制操作速度。我们可以通过考虑信号何时达到其最终值的 50% 来定义传播延迟t _R和t _F（任何衰减函数都需要很长时间才能达到其最终值，因此 50% 的测量对于了解我们的系统有多快是有意义的）。在任何电子电路中都有数千个晶体管，因此传播延迟是最关键的设计考虑因素之一。

Another comment I would like to make is about the speed of these circuits. We want fast logic to perform complex operations in the shortest amount of time. This is usually one of the most important layout and circuit designs considerations that the engineer has to deal with. Take a look at Figure 11.29. Suppose that the input voltage, V_in, in a circuit such as a NOT module, for example, changes instantaneously from 0 to 1, as I show in the upper part of the figure. We would like the response time to be so fast that the output voltage, V_out, goes from 1 to 0 instantaneously. The reality is that the output voltage takes some time before the CMOSs or transistors change from 1 to 0 (lower part of the figure). The time it takes for the output to go from 1 to 0 is the fall time. The rise time at the other end, when the input goes from 1 to 0, is t_R – t₂, and we call this the rise time. There are lots of capacitive and resistive effects due to the lines and the properties of the semiconductor devices themselves. These effects slow down and limit the speed of the operation. We can define a propagation delay, t_R and t_F, by considering when the signal reaches 50% of its final value (any decaying function takes forever to reach its final value, so the 50% measure makes sense to get an idea of how fast our systems are). In any electronic circuit there are thousands of transistors, so propagation delays are one of the most critical design considerations.

我想讨论的另一点是功率耗散。在数字开关电路中，我们考虑两种电源：直流电源和开关电源。

Another point I want to discuss is power dissipation. In digital switching circuits, we consider two sources of power: DC power and switching power.

我们首先考虑直流情况。当 CMOS 器件关闭时，没有直流电流，只有微小的漏电流。当它们打开时，功率是源电压乘以流过器件的电流。然而，大多数开关系统在电路中都由 n 型和 p 型 MOS 组成，如图11.11 – 11.16所示，因此当其中一个打开时，另一个关闭。因此，大多数直流电流基本上是由于漏电流造成的。

Let's consider first the DC case. When CMOS devices are OFF, there is no DC current, except for a tiny leakage current. When they are ON, the power is the source voltage times the current through the device. Nevertheless, most switching systems consist of both n‐ and p‐type MOS in the circuit, as you can see in Figures 11.11–11.16, so when one of them is ON the other is OFF. So, most DC currents are basically due to leakage currents.